Change in coreboot[master]: mb/google/dedede: Add Jasper Lake memory initialization support
Meera Ravindranath has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/39136 )
Change subject: mb/google/dedede: Add Jasper Lake memory initialization support ......................................................................
mb/google/dedede: Add Jasper Lake memory initialization support
Update memory parameters based on memory type supported by dedede 1. Update dq/dqs mappings 2. Update spd data for Micron Memory 3. Add SPD data binary files for supported memory types 4. Update other FSPM UPDs as part of memory initialization
BUG=none BRANCH=none TEST= Build dedede, flash and boot to kernel
Change-Id: I7248861efd1ecd5a0df0e17d39a44c168cab200e Signed-off-by: Meera Ravindranath meera.ravindranath@intel.com --- M src/mainboard/google/dedede/Kconfig M src/mainboard/google/dedede/Makefile.inc M src/mainboard/google/dedede/romstage.c A src/mainboard/google/dedede/spd/Makefile.inc A src/mainboard/google/dedede/spd/Micron_MT53E512M32D2NP_2GB.spd.hex A src/mainboard/google/dedede/spd/empty.spd.hex M src/mainboard/google/dedede/variants/baseboard/include/baseboard/variants.h A src/mainboard/google/dedede/variants/waddledoo/Makefile.inc A src/mainboard/google/dedede/variants/waddledoo/memory.c 9 files changed, 230 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/39136/1
diff --git a/src/mainboard/google/dedede/Kconfig b/src/mainboard/google/dedede/Kconfig index 3eddabc..43c104b 100644 --- a/src/mainboard/google/dedede/Kconfig +++ b/src/mainboard/google/dedede/Kconfig @@ -13,6 +13,7 @@ select MAINBOARD_HAS_SPI_TPM_CR50 select MAINBOARD_HAS_TPM2 select SOC_INTEL_JASPERLAKE + select GENERIC_SPD_BIN
if BOARD_GOOGLE_BASEBOARD_DEDEDE
@@ -68,4 +69,8 @@ default "dedede" if BOARD_GOOGLE_DEDEDE default "waddledoo" if BOARD_GOOGLE_WADDLEDOO
+config DIMM_SPD_SIZE + int + default 512 + endif #BOARD_GOOGLE_BASEBOARD_DEDEDE diff --git a/src/mainboard/google/dedede/Makefile.inc b/src/mainboard/google/dedede/Makefile.inc index 2be3feb..9af93dd 100644 --- a/src/mainboard/google/dedede/Makefile.inc +++ b/src/mainboard/google/dedede/Makefile.inc @@ -13,6 +13,8 @@ smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c
subdirs-y += variants/baseboard +subdirs-y += spd + CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/baseboard/include
VARIANT_DIR:=$(call strip_quotes,$(CONFIG_VARIANT_DIR)) diff --git a/src/mainboard/google/dedede/romstage.c b/src/mainboard/google/dedede/romstage.c index bba6e1a..ce014bb 100644 --- a/src/mainboard/google/dedede/romstage.c +++ b/src/mainboard/google/dedede/romstage.c @@ -1,15 +1,24 @@ /* * This file is part of the coreboot project. * - * Copyright 2020 The coreboot project Authors. + * Copyright (C) 2020 Intel Corporation. * - * SPDX-License-Identifier: GPL-2.0-or-later - */ + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. +*/
-#include <fsp/api.h> +#include <baseboard/variants.h> +#include <soc/jsl_memcfg_init.h> #include <soc/romstage.h>
void mainboard_memory_init_params(FSPM_UPD *memupd) { - /* ToDo : Fill FSP-M memory params */ + jasperlake_memcfg_init(&memupd->FspmConfig, variant_memcfg_config()); } + diff --git a/src/mainboard/google/dedede/spd/Makefile.inc b/src/mainboard/google/dedede/spd/Makefile.inc new file mode 100644 index 0000000..97a4dfd --- /dev/null +++ b/src/mainboard/google/dedede/spd/Makefile.inc @@ -0,0 +1,32 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2018 Intel Corporation. +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; version 2 of the License. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## + +ifneq ($(SPD_SOURCES),) +SPD_BIN = $(obj)/spd.bin + +SPD_DEPS := $(foreach f, $(SPD_SOURCES), src/mainboard/$(MAINBOARDDIR)/spd/$(f).spd.hex) + +# Include spd ROM data +$(SPD_BIN): $(SPD_DEPS) + for f in $+; \ + do for c in $$(cat $$f | grep -v ^#); \ + do printf $$(printf '\%o' 0x$$c); \ + done; \ + done > $@ + +cbfs-files-y += spd.bin +spd.bin-file := $(SPD_BIN) +spd.bin-type := spd +endif diff --git a/src/mainboard/google/dedede/spd/Micron_MT53E512M32D2NP_2GB.spd.hex b/src/mainboard/google/dedede/spd/Micron_MT53E512M32D2NP_2GB.spd.hex new file mode 100644 index 0000000..71e5456 --- /dev/null +++ b/src/mainboard/google/dedede/spd/Micron_MT53E512M32D2NP_2GB.spd.hex @@ -0,0 +1,32 @@ +23 11 11 0E 15 21 90 08 00 40 00 00 02 22 00 00 +00 00 04 0F 92 54 05 00 87 00 90 A8 90 C0 08 60 +04 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 E1 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 20 00 00 00 20 20 20 20 20 20 20 +20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/src/mainboard/google/dedede/spd/empty.spd.hex b/src/mainboard/google/dedede/spd/empty.spd.hex new file mode 100644 index 0000000..67b46cd --- /dev/null +++ b/src/mainboard/google/dedede/spd/empty.spd.hex @@ -0,0 +1,32 @@ +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 80 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 80 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/src/mainboard/google/dedede/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/dedede/variants/baseboard/include/baseboard/variants.h index 32b2c8b..4987bb2 100644 --- a/src/mainboard/google/dedede/variants/baseboard/include/baseboard/variants.h +++ b/src/mainboard/google/dedede/variants/baseboard/include/baseboard/variants.h @@ -27,5 +27,5 @@ * @return 0 on success or negative integer for errors. */ int board_info_get_fw_config(uint32_t *fw_config); - +const struct jsl_mb_cfg *variant_memcfg_config(void); #endif /*__BASEBOARD_VARIANTS_H__ */ diff --git a/src/mainboard/google/dedede/variants/waddledoo/Makefile.inc b/src/mainboard/google/dedede/variants/waddledoo/Makefile.inc new file mode 100644 index 0000000..4f3b453 --- /dev/null +++ b/src/mainboard/google/dedede/variants/waddledoo/Makefile.inc @@ -0,0 +1,26 @@ +## +## This file is part of the coreboot project. +## +## Copyright (C) 2020 Intel Corporation. +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; version 2 of the License. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## + +SPD_SOURCES = empty # 0b000 +SPD_SOURCES += empty # 1b001 +SPD_SOURCES += Micron_MT53E512M32D2NP_2GB + +bootblock-y += gpio.c + +romstage-y += memory.c + +ramstage-y += gpio.c + +smm-y += gpio.c diff --git a/src/mainboard/google/dedede/variants/waddledoo/memory.c b/src/mainboard/google/dedede/variants/waddledoo/memory.c new file mode 100644 index 0000000..b00ab86 --- /dev/null +++ b/src/mainboard/google/dedede/variants/waddledoo/memory.c @@ -0,0 +1,86 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2017 Google Inc. + * Copyright 2018 Intel Corp. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <baseboard/variants.h> +#include <baseboard/gpio.h> +#include <gpio.h> +#include <soc/jsl_memcfg_init.h> +#include <soc/romstage.h> + +static const struct jsl_mb_cfg baseboard_memcfg_cfg = { + /* Access memory info through SMBUS. */ + + .spd[0] = { + .read_type = READ_SPD_CBFS, + .spd_spec = {.spd_index = 0x2} + }, + .spd[2] = { + .read_type = READ_SPD_CBFS, + .spd_spec = {.spd_index = 0x2} + }, + + .dq_map[DDR_CH0] = { + {0xf, 0xf0}, + {0xf, 0xf0}, + {0xff, 0x0}, + {0x0, 0x0}, + {0x0, 0x0}, + {0x0, 0x0} + }, + .dq_map[DDR_CH1] = { + {0xf, 0xf0}, + {0xf, 0xf0}, + {0xff, 0x0}, + {0x0, 0x0}, + {0x00, 0x0}, + {0x00, 0x0} + }, + + /* + * The dqs_map arrays map the ddr4 pins to the SoC pins + * for both channels. + * + * the index = pin number on ddr4 part + * the value = pin number on SoC + */ + .dqs_map[DDR_CH0] = {1, 3, 0, 2, 7, 5, 4, 6}, + .dqs_map[DDR_CH1] = {3, 1, 2, 0, 4, 5, 7, 6}, + + /* Baseboard uses 100, 100 and 100 rcomp resistors */ + .rcomp_resistor = {100, 100, 100}, + + /* + * Baseboard Rcomp target values. + */ + .rcomp_targets = {80, 40, 40, 40, 30}, + + /* Baseboard is an interleaved design */ + .dq_pins_interleaved = 0, + + /* Baseboard is using config 2 for vref_ca */ + .vref_ca_config = 2, + + /* Disable Early Command Training */ + .ect = 1, + + /* User Board Type */ + .UserBd = BOARD_TYPE_MOBILE, +}; + +const struct jsl_mb_cfg *variant_memcfg_config(void) +{ + return &baseboard_memcfg_cfg; +}
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39136 )
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
Patch Set 4:
This change is ready for review.
Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39136 )
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
Patch Set 5:
(4 comments)
This change is ready for review.
https://review.coreboot.org/c/coreboot/+/39136/5/src/mainboard/google/dedede... File src/mainboard/google/dedede/Kconfig:
https://review.coreboot.org/c/coreboot/+/39136/5/src/mainboard/google/dedede... PS5, Line 16: select GENERIC_SPD_BIN Nit: Sorted in alphabetical order. Move it after select EC_GOOGLE_CHROMEEC_SPI
https://review.coreboot.org/c/coreboot/+/39136/5/src/mainboard/google/dedede... PS5, Line 72: config DIMM_SPD_SIZE Nit: Move it after config DEVICETREE. This is sorted in alphabetical order.
https://review.coreboot.org/c/coreboot/+/39136/5/src/mainboard/google/dedede... File src/mainboard/google/dedede/romstage.c:
https://review.coreboot.org/c/coreboot/+/39136/5/src/mainboard/google/dedede... PS5, Line 4: * Copyright (C) 2020 Intel Corporation. : * : * This program is free software; you can redistribute it and/or modify : * it under the terms of the GNU General Public License as published by : * the Free Software Foundation; version 2 of the License. : * : * This program is distributed in the hope that it will be useful, : * but WITHOUT ANY WARRANTY; without even the implied warranty of : * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the : * GNU General Public License for more details. Not sure if it is the appropriate license header. I thought we are adopting "The coreboot project Authors" and SPDX License Identifier.
https://review.coreboot.org/c/coreboot/+/39136/5/src/mainboard/google/dedede... File src/mainboard/google/dedede/variants/waddledoo/memory.c:
https://review.coreboot.org/c/coreboot/+/39136/5/src/mainboard/google/dedede... PS5, Line 23: SMBUS CBFS
Subrata Banik has uploaded a new patch set (#6) to the change originally created by Meera Ravindranath. ( https://review.coreboot.org/c/coreboot/+/39136 )
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
mb/google/dedede: Add memory initialization support for dedede
Update memory parameters based on memory type supported by dedede 1. Update dq/dqs mappings 2. Update spd data for Micron Memory 3. Add SPD data binary files for supported memory types 4. Update other FSPM UPDs as part of memory initialization
BUG=none BRANCH=none TEST= Build dedede, flash and boot to kernel
Change-Id: I7248861efd1ecd5a0df0e17d39a44c168cab200e Signed-off-by: Meera Ravindranath meera.ravindranath@intel.com --- M src/mainboard/google/dedede/Kconfig M src/mainboard/google/dedede/Makefile.inc M src/mainboard/google/dedede/romstage.c A src/mainboard/google/dedede/spd/Makefile.inc A src/mainboard/google/dedede/spd/Micron_MT53E512M32D2NP_2GB.spd.hex A src/mainboard/google/dedede/spd/empty.spd.hex M src/mainboard/google/dedede/variants/baseboard/Makefile.inc M src/mainboard/google/dedede/variants/baseboard/include/baseboard/variants.h A src/mainboard/google/dedede/variants/baseboard/memory.c A src/mainboard/google/dedede/variants/waddledoo/Makefile.inc A src/mainboard/google/dedede/variants/waddledoo/memory.c 11 files changed, 249 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/39136/6
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39136 )
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
Patch Set 6:
(1 comment)
https://review.coreboot.org/c/coreboot/+/39136/5/src/mainboard/google/dedede... File src/mainboard/google/dedede/romstage.c:
https://review.coreboot.org/c/coreboot/+/39136/5/src/mainboard/google/dedede... PS5, Line 4: * Copyright (C) 2020 Intel Corporation. : * : * This program is free software; you can redistribute it and/or modify : * it under the terms of the GNU General Public License as published by : * the Free Software Foundation; version 2 of the License. : * : * This program is distributed in the hope that it will be useful, : * but WITHOUT ANY WARRANTY; without even the implied warranty of : * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the : * GNU General Public License for more details.
Not sure if it is the appropriate license header. […]
I think this header we are using since a while, is there any change happen lately ? i don;t see any communication in cb.org ?
Subrata Banik has uploaded a new patch set (#7) to the change originally created by Meera Ravindranath. ( https://review.coreboot.org/c/coreboot/+/39136 )
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
mb/google/dedede: Add memory initialization support for dedede
Update memory parameters based on memory type supported by dedede 1. Update dq/dqs mappings 2. Update spd data for Micron Memory 3. Add SPD data binary files for supported memory types 4. Update other FSPM UPDs as part of memory initialization
BUG=none BRANCH=none TEST= Build dedede, flash and boot to kernel
Change-Id: I7248861efd1ecd5a0df0e17d39a44c168cab200e Signed-off-by: Meera Ravindranath meera.ravindranath@intel.com --- M src/mainboard/google/dedede/Kconfig M src/mainboard/google/dedede/Makefile.inc M src/mainboard/google/dedede/romstage.c A src/mainboard/google/dedede/spd/Makefile.inc A src/mainboard/google/dedede/spd/Micron_MT53E512M32D2NP_2GB.spd.hex A src/mainboard/google/dedede/spd/empty.spd.hex M src/mainboard/google/dedede/variants/baseboard/Makefile.inc M src/mainboard/google/dedede/variants/baseboard/include/baseboard/variants.h A src/mainboard/google/dedede/variants/baseboard/memory.c A src/mainboard/google/dedede/variants/waddledoo/Makefile.inc A src/mainboard/google/dedede/variants/waddledoo/memory.c 11 files changed, 250 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/39136/7
Hello Karthik Ramasubramanian, Subrata Banik, build bot (Jenkins), Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/39136
to look at the new patch set (#9).
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
mb/google/dedede: Add memory initialization support for dedede
Update memory parameters based on memory type supported by dedede 1. Update dq/dqs mappings 2. Update spd data for Micron Memory 3. Add SPD data binary files for supported memory types 4. Update other FSPM UPDs as part of memory initialization
BUG=none BRANCH=none TEST= Build dedede, flash and boot to kernel
Change-Id: I7248861efd1ecd5a0df0e17d39a44c168cab200e Signed-off-by: Meera Ravindranath meera.ravindranath@intel.com --- M src/mainboard/google/dedede/Kconfig M src/mainboard/google/dedede/Makefile.inc M src/mainboard/google/dedede/romstage.c A src/mainboard/google/dedede/spd/Makefile.inc A src/mainboard/google/dedede/spd/Micron_MT53E512M32D2NP_2GB.spd.hex A src/mainboard/google/dedede/spd/empty.spd.hex M src/mainboard/google/dedede/variants/baseboard/Makefile.inc M src/mainboard/google/dedede/variants/baseboard/include/baseboard/variants.h A src/mainboard/google/dedede/variants/baseboard/memory.c A src/mainboard/google/dedede/variants/waddledoo/Makefile.inc A src/mainboard/google/dedede/variants/waddledoo/memory.c 11 files changed, 245 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/39136/9
Meera Ravindranath has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39136 )
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
Patch Set 9:
(3 comments)
https://review.coreboot.org/c/coreboot/+/39136/5/src/mainboard/google/dedede... File src/mainboard/google/dedede/Kconfig:
https://review.coreboot.org/c/coreboot/+/39136/5/src/mainboard/google/dedede... PS5, Line 16: select GENERIC_SPD_BIN
Nit: Sorted in alphabetical order. […]
Done
https://review.coreboot.org/c/coreboot/+/39136/5/src/mainboard/google/dedede... PS5, Line 72: config DIMM_SPD_SIZE
Nit: Move it after config DEVICETREE. This is sorted in alphabetical order.
Done
https://review.coreboot.org/c/coreboot/+/39136/5/src/mainboard/google/dedede... File src/mainboard/google/dedede/variants/waddledoo/memory.c:
https://review.coreboot.org/c/coreboot/+/39136/5/src/mainboard/google/dedede... PS5, Line 23: SMBUS
CBFS
Done
Hello Karthik Ramasubramanian, Subrata Banik, Aamir Bohra, Maulik V Vaghela, build bot (Jenkins), Furquan Shaikh, Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/39136
to look at the new patch set (#10).
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
mb/google/dedede: Add memory initialization support for dedede
Update memory parameters based on memory type supported by dedede 1. Update dq/dqs mappings 2. Update spd data for Micron Memory 3. Add SPD data binary files for supported memory types 4. Update other FSPM UPDs as part of memory initialization
BUG=none BRANCH=none TEST= Build dedede, flash and boot to kernel
Change-Id: I7248861efd1ecd5a0df0e17d39a44c168cab200e Signed-off-by: Meera Ravindranath meera.ravindranath@intel.com --- M src/mainboard/google/dedede/Kconfig M src/mainboard/google/dedede/Makefile.inc M src/mainboard/google/dedede/romstage.c A src/mainboard/google/dedede/spd/Makefile.inc A src/mainboard/google/dedede/spd/Micron_MT53E512M32D2NP_2GB.spd.hex A src/mainboard/google/dedede/spd/empty.spd.hex M src/mainboard/google/dedede/variants/baseboard/Makefile.inc M src/mainboard/google/dedede/variants/baseboard/include/baseboard/variants.h A src/mainboard/google/dedede/variants/baseboard/memory.c A src/mainboard/google/dedede/variants/waddledoo/Makefile.inc A src/mainboard/google/dedede/variants/waddledoo/memory.c 11 files changed, 256 insertions(+), 9 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/39136/10
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39136 )
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
Patch Set 10:
(1 comment)
https://review.coreboot.org/c/coreboot/+/39136/10/src/mainboard/google/deded... File src/mainboard/google/dedede/romstage.c:
https://review.coreboot.org/c/coreboot/+/39136/10/src/mainboard/google/deded... PS10, Line 26: 0x2 can't we read SKU ID like https://github.com/coreboot/coreboot/blob/master/src/mainboard/google/voltee... ?
Hello Karthik Ramasubramanian, Subrata Banik, Aamir Bohra, Maulik V Vaghela, build bot (Jenkins), Furquan Shaikh, Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/39136
to look at the new patch set (#11).
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
mb/google/dedede: Add memory initialization support for dedede
Update memory parameters based on memory type supported by dedede 1. Update dq/dqs mappings 2. Update spd data for Micron Memory 3. Add SPD data binary files for supported memory types 4. Update other FSPM UPDs as part of memory initialization
BUG=none BRANCH=none TEST= Build dedede, flash and boot to kernel.
Change-Id: I7248861efd1ecd5a0df0e17d39a44c168cab200e Signed-off-by: Meera Ravindranath meera.ravindranath@intel.com --- M src/mainboard/google/dedede/Kconfig M src/mainboard/google/dedede/Makefile.inc M src/mainboard/google/dedede/romstage.c A src/mainboard/google/dedede/spd/Makefile.inc A src/mainboard/google/dedede/spd/Micron_MT53E512M32D2NP_2GB.spd.hex A src/mainboard/google/dedede/spd/empty.spd.hex M src/mainboard/google/dedede/variants/baseboard/Makefile.inc M src/mainboard/google/dedede/variants/baseboard/include/baseboard/variants.h A src/mainboard/google/dedede/variants/baseboard/memory.c A src/mainboard/google/dedede/variants/waddledoo/Makefile.inc A src/mainboard/google/dedede/variants/waddledoo/memory.c 11 files changed, 256 insertions(+), 9 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/39136/11
Hello Karthik Ramasubramanian, Subrata Banik, Aamir Bohra, Maulik V Vaghela, build bot (Jenkins), Furquan Shaikh, Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/39136
to look at the new patch set (#12).
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
mb/google/dedede: Add memory initialization support for dedede
Update memory parameters based on memory type supported by dedede 1. Update dq/dqs mappings 2. Update spd data for Micron Memory 3. Add SPD data binary files for supported memory types 4. Update other FSPM UPDs as part of memory initialization
BUG=none BRANCH=none TEST= Build dedede, flash and boot to kernel.
Change-Id: I7248861efd1ecd5a0df0e17d39a44c168cab200e Signed-off-by: Meera Ravindranath meera.ravindranath@intel.com --- M src/mainboard/google/dedede/Kconfig M src/mainboard/google/dedede/Makefile.inc M src/mainboard/google/dedede/romstage.c A src/mainboard/google/dedede/spd/Makefile.inc A src/mainboard/google/dedede/spd/Micron_MT53E512M32D2NP_2GB.spd.hex A src/mainboard/google/dedede/spd/empty.spd.hex M src/mainboard/google/dedede/variants/baseboard/Makefile.inc M src/mainboard/google/dedede/variants/baseboard/include/baseboard/variants.h A src/mainboard/google/dedede/variants/baseboard/memory.c A src/mainboard/google/dedede/variants/waddledoo/Makefile.inc A src/mainboard/google/dedede/variants/waddledoo/memory.c 11 files changed, 254 insertions(+), 9 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/39136/12
Hello Karthik Ramasubramanian, Subrata Banik, Aamir Bohra, Maulik V Vaghela, build bot (Jenkins), Furquan Shaikh, Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/39136
to look at the new patch set (#13).
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
mb/google/dedede: Add memory initialization support for dedede
Update memory parameters based on memory type supported by dedede 1. Update dq/dqs mappings 2. Update spd data for Micron Memory 3. Add SPD data binary files for supported memory types 4. Update other FSPM UPDs as part of memory initialization
BUG=none BRANCH=none TEST= Build dedede, flash and boot to kernel.
Change-Id: I7248861efd1ecd5a0df0e17d39a44c168cab200e Signed-off-by: Meera Ravindranath meera.ravindranath@intel.com --- M src/mainboard/google/dedede/Kconfig M src/mainboard/google/dedede/Makefile.inc M src/mainboard/google/dedede/romstage.c A src/mainboard/google/dedede/spd/Makefile.inc A src/mainboard/google/dedede/spd/Micron_MT53E512M32D2NP_2GB.spd.hex A src/mainboard/google/dedede/spd/empty.spd.hex M src/mainboard/google/dedede/variants/baseboard/Makefile.inc M src/mainboard/google/dedede/variants/baseboard/include/baseboard/variants.h A src/mainboard/google/dedede/variants/baseboard/memory.c A src/mainboard/google/dedede/variants/waddledoo/Makefile.inc A src/mainboard/google/dedede/variants/waddledoo/memory.c 11 files changed, 255 insertions(+), 8 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/39136/13
Hello Karthik Ramasubramanian, Subrata Banik, Aamir Bohra, Maulik V Vaghela, build bot (Jenkins), Furquan Shaikh, Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/39136
to look at the new patch set (#14).
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
mb/google/dedede: Add memory initialization support for dedede
Update memory parameters based on memory type supported by dedede 1. Update dq/dqs mappings 2. Update spd data for Micron Memory 3. Add SPD data binary files for supported memory types 4. Update other FSPM UPDs as part of memory initialization
BUG=none BRANCH=none TEST= Build dedede, flash and boot to kernel.
Change-Id: I7248861efd1ecd5a0df0e17d39a44c168cab200e Signed-off-by: Meera Ravindranath meera.ravindranath@intel.com --- M src/mainboard/google/dedede/Kconfig M src/mainboard/google/dedede/Makefile.inc M src/mainboard/google/dedede/romstage.c A src/mainboard/google/dedede/spd/Makefile.inc A src/mainboard/google/dedede/spd/Micron_MT53E512M32D2NP_2GB.spd.hex A src/mainboard/google/dedede/spd/empty.spd.hex M src/mainboard/google/dedede/variants/baseboard/Makefile.inc M src/mainboard/google/dedede/variants/baseboard/include/baseboard/variants.h A src/mainboard/google/dedede/variants/baseboard/memory.c A src/mainboard/google/dedede/variants/waddledoo/Makefile.inc A src/mainboard/google/dedede/variants/waddledoo/memory.c 11 files changed, 255 insertions(+), 8 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/39136/14
Meera Ravindranath has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39136 )
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
Patch Set 14:
(1 comment)
https://review.coreboot.org/c/coreboot/+/39136/10/src/mainboard/google/deded... File src/mainboard/google/dedede/romstage.c:
https://review.coreboot.org/c/coreboot/+/39136/10/src/mainboard/google/deded... PS10, Line 26: 0x2
can't we read SKU ID like https://github. […]
Ack
Implementation under progress, Subrata.
Hello Karthik Ramasubramanian, Subrata Banik, Aamir Bohra, Maulik V Vaghela, build bot (Jenkins), Furquan Shaikh, Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/39136
to look at the new patch set (#16).
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
mb/google/dedede: Add memory initialization support for dedede
Update memory parameters based on memory type supported by dedede 1. Update dq/dqs mappings 2. Update spd data for Micron Memory 3. Add SPD data binary files for supported memory types 4. Update other FSPM UPDs as part of memory initialization
BUG=none BRANCH=none TEST= Build dedede, flash and boot to kernel.
Change-Id: I7248861efd1ecd5a0df0e17d39a44c168cab200e Signed-off-by: Meera Ravindranath meera.ravindranath@intel.com --- M src/mainboard/google/dedede/Kconfig M src/mainboard/google/dedede/Makefile.inc M src/mainboard/google/dedede/romstage.c A src/mainboard/google/dedede/spd/Makefile.inc A src/mainboard/google/dedede/spd/Micron_MT53E512M32D2NP_2GB.spd.hex A src/mainboard/google/dedede/spd/empty.spd.hex M src/mainboard/google/dedede/variants/baseboard/Makefile.inc M src/mainboard/google/dedede/variants/baseboard/include/baseboard/gpio.h M src/mainboard/google/dedede/variants/baseboard/include/baseboard/variants.h A src/mainboard/google/dedede/variants/baseboard/memory.c A src/mainboard/google/dedede/variants/waddledoo/Makefile.inc A src/mainboard/google/dedede/variants/waddledoo/memory.c 12 files changed, 280 insertions(+), 8 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/39136/16
Meera Ravindranath has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39136 )
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
Patch Set 16:
(1 comment)
https://review.coreboot.org/c/coreboot/+/39136/10/src/mainboard/google/deded... File src/mainboard/google/dedede/romstage.c:
https://review.coreboot.org/c/coreboot/+/39136/10/src/mainboard/google/deded... PS10, Line 26: 0x2
Ack […]
Done
Hello Karthik Ramasubramanian, Subrata Banik, Aamir Bohra, Maulik V Vaghela, build bot (Jenkins), Furquan Shaikh, Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/39136
to look at the new patch set (#17).
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
mb/google/dedede: Add memory initialization support for dedede
Update memory parameters based on memory type supported by dedede 1. Update dq/dqs mappings 2. Update spd data for Micron Memory 3. Add SPD data binary files for supported memory types 4. Update other FSPM UPDs as part of memory initialization
BUG=none BRANCH=none TEST= Build dedede, flash and boot to kernel.
Change-Id: I7248861efd1ecd5a0df0e17d39a44c168cab200e Signed-off-by: Meera Ravindranath meera.ravindranath@intel.com --- M src/mainboard/google/dedede/Kconfig M src/mainboard/google/dedede/Makefile.inc M src/mainboard/google/dedede/romstage.c A src/mainboard/google/dedede/spd/Makefile.inc A src/mainboard/google/dedede/spd/Micron_MT53E512M32D2NP_2GB.spd.hex A src/mainboard/google/dedede/spd/empty.spd.hex M src/mainboard/google/dedede/variants/baseboard/Makefile.inc M src/mainboard/google/dedede/variants/baseboard/include/baseboard/gpio.h M src/mainboard/google/dedede/variants/baseboard/include/baseboard/variants.h A src/mainboard/google/dedede/variants/baseboard/memory.c A src/mainboard/google/dedede/variants/waddledoo/Makefile.inc A src/mainboard/google/dedede/variants/waddledoo/memory.c 12 files changed, 275 insertions(+), 8 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/39136/17
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39136 )
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
Patch Set 17: Code-Review+2
Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39136 )
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
Patch Set 17: Code-Review+2
Aamir Bohra has removed a vote from this change. ( https://review.coreboot.org/c/coreboot/+/39136 )
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
Removed Code-Review+2 by Aamir Bohra aamir.bohra@intel.com
Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39136 )
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
Patch Set 17:
(2 comments)
https://review.coreboot.org/c/coreboot/+/39136/17/src/mainboard/google/deded... File src/mainboard/google/dedede/romstage.c:
https://review.coreboot.org/c/coreboot/+/39136/17/src/mainboard/google/deded... PS17, Line 29: nit: can we remove the extra line.
https://review.coreboot.org/c/coreboot/+/39136/17/src/mainboard/google/deded... File src/mainboard/google/dedede/variants/baseboard/include/baseboard/gpio.h:
https://review.coreboot.org/c/coreboot/+/39136/17/src/mainboard/google/deded... PS17, Line 20: : /* Memory configuration board straps */ : #define GPIO_MEM_CONFIG_0 GPP_C0 : #define GPIO_MEM_CONFIG_1 GPP_C3 : #define GPIO_MEM_CONFIG_2 GPP_C4 : #define GPIO_MEM_CONFIG_3 GPP_C5 can you please add below entry in gpio.c(early gpio table)
/* C0 : RAM_STRAP_0 */ PAD_CFG_GPI(GPP_C0, NONE, DEEP), /* C3 : RAM_STRAP_1 */ PAD_CFG_GPI(GPP_C3, NONE, DEEP), /* C4 : RAM_STRAP_2 */ PAD_CFG_GPI(GPP_C4, NONE, DEEP), /* C5 : RAM_STRAP_3 */ PAD_CFG_GPI(GPP_C5, NONE, DEEP),
Hello Karthik Ramasubramanian, Subrata Banik, Aamir Bohra, Maulik V Vaghela, build bot (Jenkins), Furquan Shaikh, Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/39136
to look at the new patch set (#18).
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
mb/google/dedede: Add memory initialization support for dedede
Update memory parameters based on memory type supported by dedede 1. Update dq/dqs mappings 2. Update spd data for Micron Memory 3. Add SPD data binary files for supported memory types 4. Update other FSPM UPDs as part of memory initialization
BUG=none BRANCH=none TEST= Build dedede, flash and boot to kernel.
Change-Id: I7248861efd1ecd5a0df0e17d39a44c168cab200e Signed-off-by: Meera Ravindranath meera.ravindranath@intel.com --- M src/mainboard/google/dedede/Kconfig M src/mainboard/google/dedede/Makefile.inc M src/mainboard/google/dedede/romstage.c A src/mainboard/google/dedede/spd/Makefile.inc A src/mainboard/google/dedede/spd/Micron_MT53E512M32D2NP_2GB.spd.hex A src/mainboard/google/dedede/spd/empty.spd.hex M src/mainboard/google/dedede/variants/baseboard/Makefile.inc M src/mainboard/google/dedede/variants/baseboard/gpio.c M src/mainboard/google/dedede/variants/baseboard/include/baseboard/gpio.h M src/mainboard/google/dedede/variants/baseboard/include/baseboard/variants.h A src/mainboard/google/dedede/variants/baseboard/memory.c A src/mainboard/google/dedede/variants/waddledoo/Makefile.inc A src/mainboard/google/dedede/variants/waddledoo/memory.c 13 files changed, 283 insertions(+), 8 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/39136/18
Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39136 )
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
Patch Set 18: Code-Review+2
(2 comments)
https://review.coreboot.org/c/coreboot/+/39136/17/src/mainboard/google/deded... File src/mainboard/google/dedede/romstage.c:
https://review.coreboot.org/c/coreboot/+/39136/17/src/mainboard/google/deded... PS17, Line 29:
nit: can we remove the extra line.
Done
https://review.coreboot.org/c/coreboot/+/39136/17/src/mainboard/google/deded... File src/mainboard/google/dedede/variants/baseboard/include/baseboard/gpio.h:
https://review.coreboot.org/c/coreboot/+/39136/17/src/mainboard/google/deded... PS17, Line 20: : /* Memory configuration board straps */ : #define GPIO_MEM_CONFIG_0 GPP_C0 : #define GPIO_MEM_CONFIG_1 GPP_C3 : #define GPIO_MEM_CONFIG_2 GPP_C4 : #define GPIO_MEM_CONFIG_3 GPP_C5
can you please add below entry in gpio.c(early gpio table) […]
Done
Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39136 )
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
Patch Set 18:
(1 comment)
https://review.coreboot.org/c/coreboot/+/39136/5/src/mainboard/google/dedede... File src/mainboard/google/dedede/romstage.c:
https://review.coreboot.org/c/coreboot/+/39136/5/src/mainboard/google/dedede... PS5, Line 4: * Copyright (C) 2020 Intel Corporation. : * : * This program is free software; you can redistribute it and/or modify : * it under the terms of the GNU General Public License as published by : * the Free Software Foundation; version 2 of the License. : * : * This program is distributed in the hope that it will be useful, : * but WITHOUT ANY WARRANTY; without even the implied warranty of : * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the : * GNU General Public License for more details.
I think this header we are using since a while, is there any change happen lately ? […]
Please refer to 4.11 release notes - https://doc.coreboot.org/releases/coreboot-4.11-relnotes.html#shorter-file-h...
The authors file has been created and Intel Corporation is already part of the coreboot authors. The recommendation is to mention as Copyright 2020 The coreboot project Authors.
SPDX license header is also mentioned as a future effort in the same file.
Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39136 )
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
Patch Set 18:
(2 comments)
https://review.coreboot.org/c/coreboot/+/39136/18/src/mainboard/google/deded... File src/mainboard/google/dedede/variants/baseboard/memory.c:
https://review.coreboot.org/c/coreboot/+/39136/18/src/mainboard/google/deded... PS18, Line 23: ; Should we have a default config here instead of NULL. I think NULL will cause the memory initialization code to die. Below we are passing empty SPD. I am wondering if something similar for memcfg be done.
https://review.coreboot.org/c/coreboot/+/39136/18/src/mainboard/google/deded... File src/mainboard/google/dedede/variants/waddledoo/memory.c:
https://review.coreboot.org/c/coreboot/+/39136/18/src/mainboard/google/deded... PS18, Line 28: 0xff, 0x0 As per the available documentation, 0xff corresponds to CS signal used for all the 8 bytes in a package. But looking at the schematics
LPD4x_0_CS[0:1] is used for bytes 0 - 3. LPD4x_1_CS[0:1] is used for bytes 4 - 7. So shouldn't it also be {0xf, 0xf0} like how it is done for CLK and CMD signals.
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39136 )
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
Patch Set 18:
(5 comments)
https://review.coreboot.org/c/coreboot/+/39136/18/src/mainboard/google/deded... File src/mainboard/google/dedede/romstage.c:
https://review.coreboot.org/c/coreboot/+/39136/18/src/mainboard/google/deded... PS18, Line 25: extra tab not required.
https://review.coreboot.org/c/coreboot/+/39136/18/src/mainboard/google/deded... PS18, Line 26: same here.
https://review.coreboot.org/c/coreboot/+/39136/18/src/mainboard/google/deded... File src/mainboard/google/dedede/variants/baseboard/gpio.c:
https://review.coreboot.org/c/coreboot/+/39136/18/src/mainboard/google/deded... PS18, Line 117: RAM_STRAP_0 These straps should be configured in gpio_table above as well.
https://review.coreboot.org/c/coreboot/+/39136/18/src/mainboard/google/deded... File src/mainboard/google/dedede/variants/waddledoo/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/39136/18/src/mainboard/google/deded... PS18, Line 16: empty So, ID 0 is empty on waddledoo? Why are we leaving empty slots. We should start indexing from 0. This comment is more from our board hardware design standpoint.
https://review.coreboot.org/c/coreboot/+/39136/18/src/mainboard/google/deded... File src/mainboard/google/dedede/variants/waddledoo/memory.c:
https://review.coreboot.org/c/coreboot/+/39136/18/src/mainboard/google/deded... PS18, Line 23: /* Access memory info through CBFS */ Comment seems misplaced.
Meera Ravindranath has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39136 )
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
Patch Set 18:
(3 comments)
https://review.coreboot.org/c/coreboot/+/39136/5/src/mainboard/google/dedede... File src/mainboard/google/dedede/romstage.c:
https://review.coreboot.org/c/coreboot/+/39136/5/src/mainboard/google/dedede... PS5, Line 4: * Copyright (C) 2020 Intel Corporation. : * : * This program is free software; you can redistribute it and/or modify : * it under the terms of the GNU General Public License as published by : * the Free Software Foundation; version 2 of the License. : * : * This program is distributed in the hope that it will be useful, : * but WITHOUT ANY WARRANTY; without even the implied warranty of : * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the : * GNU General Public License for more details.
Please refer to 4.11 release notes - https://doc.coreboot.org/releases/coreboot-4.11-relnotes. […]
Ack
https://review.coreboot.org/c/coreboot/+/39136/18/src/mainboard/google/deded... File src/mainboard/google/dedede/variants/baseboard/memory.c:
https://review.coreboot.org/c/coreboot/+/39136/18/src/mainboard/google/deded... PS18, Line 23: ;
Should we have a default config here instead of NULL. […]
Ack. A default config would mean the memory initialization code to die again. How about a simple die function?
https://review.coreboot.org/c/coreboot/+/39136/18/src/mainboard/google/deded... File src/mainboard/google/dedede/variants/waddledoo/memory.c:
https://review.coreboot.org/c/coreboot/+/39136/18/src/mainboard/google/deded... PS18, Line 28: 0xff, 0x0
As per the available documentation, 0xff corresponds to CS signal used for all the 8 bytes in a pack […]
There is no 1:1 mapping between the board value we are passing and the schematics of Waddledoo. The values we are passing are to the FSP UPD structure. Here is a snippet of the value to be filled according to FSP.
///< DQByteMap[2] - CtlDQByteMap : Always program to [0xFF, 0] since we have 1 CTL / rank ///< Variable only exists to make the code easier to use
Hello Karthik Ramasubramanian, Subrata Banik, Aamir Bohra, Maulik V Vaghela, build bot (Jenkins), Furquan Shaikh, Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/39136
to look at the new patch set (#20).
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
mb/google/dedede: Add memory initialization support for dedede
Update memory parameters based on memory type supported by dedede 1. Update dq/dqs mappings 2. Update spd data for Micron Memory 3. Add SPD data binary files for supported memory types 4. Update other FSPM UPDs as part of memory initialization
BUG=none BRANCH=none TEST= Build dedede, flash and boot to kernel.
Change-Id: I7248861efd1ecd5a0df0e17d39a44c168cab200e Signed-off-by: Meera Ravindranath meera.ravindranath@intel.com --- M src/mainboard/google/dedede/Kconfig M src/mainboard/google/dedede/Makefile.inc M src/mainboard/google/dedede/romstage.c A src/mainboard/google/dedede/spd/Makefile.inc A src/mainboard/google/dedede/spd/Micron_MT53E512M32D2NP_2GB.spd.hex A src/mainboard/google/dedede/spd/empty.spd.hex M src/mainboard/google/dedede/variants/baseboard/Makefile.inc M src/mainboard/google/dedede/variants/baseboard/gpio.c M src/mainboard/google/dedede/variants/baseboard/include/baseboard/gpio.h M src/mainboard/google/dedede/variants/baseboard/include/baseboard/variants.h A src/mainboard/google/dedede/variants/baseboard/memory.c A src/mainboard/google/dedede/variants/waddledoo/Makefile.inc A src/mainboard/google/dedede/variants/waddledoo/memory.c 13 files changed, 249 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/39136/20
Meera Ravindranath has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39136 )
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
Patch Set 20:
(5 comments)
https://review.coreboot.org/c/coreboot/+/39136/18/src/mainboard/google/deded... File src/mainboard/google/dedede/romstage.c:
https://review.coreboot.org/c/coreboot/+/39136/18/src/mainboard/google/deded... PS18, Line 25:
extra tab not required.
Done
https://review.coreboot.org/c/coreboot/+/39136/18/src/mainboard/google/deded... PS18, Line 26:
same here.
Done
https://review.coreboot.org/c/coreboot/+/39136/18/src/mainboard/google/deded... File src/mainboard/google/dedede/variants/baseboard/gpio.c:
https://review.coreboot.org/c/coreboot/+/39136/18/src/mainboard/google/deded... PS18, Line 117: RAM_STRAP_0
These straps should be configured in gpio_table above as well.
Done
https://review.coreboot.org/c/coreboot/+/39136/18/src/mainboard/google/deded... File src/mainboard/google/dedede/variants/waddledoo/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/39136/18/src/mainboard/google/deded... PS18, Line 16: empty
So, ID 0 is empty on waddledoo? Why are we leaving empty slots. We should start indexing from 0. […]
ID 0 is for the vendor Hynix and ID 2 is for vendor Samsung. But we do not have the spd data from them as of now. Will definitely update once we get the spd data from other vendors.
https://review.coreboot.org/c/coreboot/+/39136/18/src/mainboard/google/deded... File src/mainboard/google/dedede/variants/waddledoo/memory.c:
https://review.coreboot.org/c/coreboot/+/39136/18/src/mainboard/google/deded... PS18, Line 23: /* Access memory info through CBFS */
Comment seems misplaced.
Ack
Hello Karthik Ramasubramanian, Subrata Banik, Aamir Bohra, Maulik V Vaghela, build bot (Jenkins), Furquan Shaikh, Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/39136
to look at the new patch set (#21).
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
mb/google/dedede: Add memory initialization support for dedede
Update memory parameters based on memory type supported by dedede 1. Update dq/dqs mappings 2. Update spd data for Micron Memory 3. Add SPD data binary files for supported memory types 4. Update other FSPM UPDs as part of memory initialization
BUG=none BRANCH=none TEST= Build dedede, flash and boot to kernel.
Change-Id: I7248861efd1ecd5a0df0e17d39a44c168cab200e Signed-off-by: Meera Ravindranath meera.ravindranath@intel.com --- M src/mainboard/google/dedede/Kconfig M src/mainboard/google/dedede/Makefile.inc M src/mainboard/google/dedede/romstage.c A src/mainboard/google/dedede/spd/Makefile.inc A src/mainboard/google/dedede/spd/Micron_MT53E512M32D2NP_2GB.spd.hex A src/mainboard/google/dedede/spd/empty.spd.hex M src/mainboard/google/dedede/variants/baseboard/Makefile.inc M src/mainboard/google/dedede/variants/baseboard/gpio.c M src/mainboard/google/dedede/variants/baseboard/include/baseboard/gpio.h M src/mainboard/google/dedede/variants/baseboard/include/baseboard/variants.h A src/mainboard/google/dedede/variants/baseboard/memory.c A src/mainboard/google/dedede/variants/waddledoo/Makefile.inc A src/mainboard/google/dedede/variants/waddledoo/memory.c 13 files changed, 242 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/39136/21
Maulik V Vaghela has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39136 )
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
Patch Set 21:
(1 comment)
https://review.coreboot.org/c/coreboot/+/39136/18/src/mainboard/google/deded... File src/mainboard/google/dedede/variants/waddledoo/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/39136/18/src/mainboard/google/deded... PS18, Line 16: empty
ID 0 is for the vendor Hynix and ID 2 is for vendor Samsung. […]
Furquan, we're reading gpio straps from board and directly using that as index for spd instead of hard-coding indices for board.
Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39136 )
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
Patch Set 21:
(1 comment)
https://review.coreboot.org/c/coreboot/+/39136/18/src/mainboard/google/deded... File src/mainboard/google/dedede/variants/waddledoo/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/39136/18/src/mainboard/google/deded... PS18, Line 16: empty
Furquan, we're reading gpio straps from board and directly using that as index for spd instead of ha […]
As Meera mentioned, ID0 is used for Hynix, ID1 is used for Micron and ID is used for Samsung.
Furquan, I am not sure if you want to put all the SPDs now itself or do you want to add them as and when they become available.
FYI, Pre-proto SMT2 build might have it fixed based on the feature based SPD IDs instead of vendor based SPD IDs.
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39136 )
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
Patch Set 21:
(1 comment)
https://review.coreboot.org/c/coreboot/+/39136/21/src/mainboard/google/deded... File src/mainboard/google/dedede/Kconfig:
https://review.coreboot.org/c/coreboot/+/39136/21/src/mainboard/google/deded... PS21, Line 34: Does JSL support 4 DIMMs (DIMM_MAX = 4)?
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39136 )
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
Patch Set 21:
(1 comment)
https://review.coreboot.org/c/coreboot/+/39136/21/src/mainboard/google/deded... File src/mainboard/google/dedede/Kconfig:
https://review.coreboot.org/c/coreboot/+/39136/21/src/mainboard/google/deded... PS21, Line 34:
Does JSL support 4 DIMMs (DIMM_MAX = 4)?
we have 1 memory controller with 2 channel and each channel has 2 slot. But as per i have seen, we only have DIMM connected over 1 slot/channel.
Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39136 )
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
Patch Set 21:
(2 comments)
https://review.coreboot.org/c/coreboot/+/39136/21/src/mainboard/google/deded... File src/mainboard/google/dedede/romstage.c:
https://review.coreboot.org/c/coreboot/+/39136/21/src/mainboard/google/deded... PS21, Line 21: mem_cfg Nit: can just be memupd->FspmConfig
https://review.coreboot.org/c/coreboot/+/39136/21/src/mainboard/google/deded... File src/mainboard/google/dedede/variants/baseboard/gpio.c:
https://review.coreboot.org/c/coreboot/+/39136/21/src/mainboard/google/deded... PS21, Line 48: /* C0 : RAM_STRAP_0 */ : PAD_CFG_GPI(GPP_C0, NONE, DEEP), : /* C3 : RAM_STRAP_1 */ : PAD_CFG_GPI(GPP_C3, NONE, DEEP), : /* C4 : RAM_STRAP_2 */ : PAD_CFG_GPI(GPP_C4, NONE, DEEP), : /* C5 : RAM_STRAP_3 */ : PAD_CFG_GPI(GPP_C5, NONE, DEEP), Why do these need to be here? They're already enabled in the early_gpio table.
Subrata Banik has uploaded a new patch set (#22) to the change originally created by Meera Ravindranath. ( https://review.coreboot.org/c/coreboot/+/39136 )
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
mb/google/dedede: Add memory initialization support for dedede
Update memory parameters based on memory type supported by dedede 1. Update dq/dqs mappings 2. Update spd data for Micron Memory 3. Add SPD data binary files for supported memory types 4. Update other FSPM UPDs as part of memory initialization
BUG=none BRANCH=none TEST= Build dedede, flash and boot to kernel.
Change-Id: I7248861efd1ecd5a0df0e17d39a44c168cab200e Signed-off-by: Meera Ravindranath meera.ravindranath@intel.com --- M src/mainboard/google/dedede/Kconfig M src/mainboard/google/dedede/Makefile.inc M src/mainboard/google/dedede/romstage.c A src/mainboard/google/dedede/spd/Makefile.inc A src/mainboard/google/dedede/spd/Micron_MT53E512M32D2NP_2GB.spd.hex A src/mainboard/google/dedede/spd/empty.spd.hex M src/mainboard/google/dedede/variants/baseboard/Makefile.inc M src/mainboard/google/dedede/variants/baseboard/gpio.c M src/mainboard/google/dedede/variants/baseboard/include/baseboard/gpio.h M src/mainboard/google/dedede/variants/baseboard/include/baseboard/variants.h A src/mainboard/google/dedede/variants/baseboard/memory.c A src/mainboard/google/dedede/variants/waddledoo/Makefile.inc A src/mainboard/google/dedede/variants/waddledoo/memory.c 13 files changed, 243 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/39136/22
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39136 )
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
Patch Set 22:
(2 comments)
https://review.coreboot.org/c/coreboot/+/39136/21/src/mainboard/google/deded... File src/mainboard/google/dedede/romstage.c:
https://review.coreboot.org/c/coreboot/+/39136/21/src/mainboard/google/deded... PS21, Line 21: mem_cfg
Nit: can just be memupd->FspmConfig
Ack
https://review.coreboot.org/c/coreboot/+/39136/21/src/mainboard/google/deded... File src/mainboard/google/dedede/variants/baseboard/gpio.c:
https://review.coreboot.org/c/coreboot/+/39136/21/src/mainboard/google/deded... PS21, Line 48: /* C0 : RAM_STRAP_0 */ : PAD_CFG_GPI(GPP_C0, NONE, DEEP), : /* C3 : RAM_STRAP_1 */ : PAD_CFG_GPI(GPP_C3, NONE, DEEP), : /* C4 : RAM_STRAP_2 */ : PAD_CFG_GPI(GPP_C4, NONE, DEEP), : /* C5 : RAM_STRAP_3 */ : PAD_CFG_GPI(GPP_C5, NONE, DEEP),
Why do these need to be here? They're already enabled in the early_gpio table.
i believe this is to address review comments from Furquan. https://review.coreboot.org/c/coreboot/+/39136/18..21/src/mainboard/google/d...
There is no harm of doing this programming here as well
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39136 )
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
Patch Set 22:
(1 comment)
https://review.coreboot.org/c/coreboot/+/39136/18/src/mainboard/google/deded... File src/mainboard/google/dedede/variants/waddledoo/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/39136/18/src/mainboard/google/deded... PS18, Line 16: empty
As Meera mentioned, ID0 is used for Hynix, ID1 is used for Micron and ID is used for Samsung. […]
marking this comment resolve now
Subrata Banik has uploaded a new patch set (#23) to the change originally created by Meera Ravindranath. ( https://review.coreboot.org/c/coreboot/+/39136 )
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
mb/google/dedede: Add memory initialization support for dedede
Update memory parameters based on memory type supported by dedede 1. Update dq/dqs mappings 2. Update spd data for Micron Memory 3. Add SPD data binary files for supported memory types 4. Update other FSPM UPDs as part of memory initialization
BUG=none BRANCH=none TEST= Build dedede, flash and boot to kernel.
Change-Id: I7248861efd1ecd5a0df0e17d39a44c168cab200e Signed-off-by: Meera Ravindranath meera.ravindranath@intel.com --- M src/mainboard/google/dedede/Kconfig M src/mainboard/google/dedede/Makefile.inc M src/mainboard/google/dedede/romstage.c A src/mainboard/google/dedede/spd/Makefile.inc A src/mainboard/google/dedede/spd/Micron_MT53E512M32D2NP_2GB.spd.hex A src/mainboard/google/dedede/spd/empty.spd.hex M src/mainboard/google/dedede/variants/baseboard/Makefile.inc M src/mainboard/google/dedede/variants/baseboard/gpio.c M src/mainboard/google/dedede/variants/baseboard/include/baseboard/gpio.h M src/mainboard/google/dedede/variants/baseboard/include/baseboard/variants.h A src/mainboard/google/dedede/variants/baseboard/memory.c A src/mainboard/google/dedede/variants/waddledoo/Makefile.inc A src/mainboard/google/dedede/variants/waddledoo/memory.c 13 files changed, 243 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/39136/23
Subrata Banik has uploaded a new patch set (#24) to the change originally created by Meera Ravindranath. ( https://review.coreboot.org/c/coreboot/+/39136 )
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
mb/google/dedede: Add memory initialization support for dedede
Update memory parameters based on memory type supported by dedede 1. Update dq/dqs mappings 2. Update spd data for Micron Memory 3. Add SPD data binary files for supported memory types 4. Update other FSPM UPDs as part of memory initialization
BUG=none BRANCH=none TEST= Build dedede, flash and boot to kernel.
Change-Id: I7248861efd1ecd5a0df0e17d39a44c168cab200e Signed-off-by: Meera Ravindranath meera.ravindranath@intel.com --- M src/mainboard/google/dedede/Kconfig M src/mainboard/google/dedede/Makefile.inc M src/mainboard/google/dedede/romstage.c A src/mainboard/google/dedede/spd/Makefile.inc A src/mainboard/google/dedede/spd/Micron_MT53E512M32D2NP_2GB.spd.hex A src/mainboard/google/dedede/spd/empty.spd.hex M src/mainboard/google/dedede/variants/baseboard/Makefile.inc M src/mainboard/google/dedede/variants/baseboard/gpio.c M src/mainboard/google/dedede/variants/baseboard/include/baseboard/gpio.h M src/mainboard/google/dedede/variants/baseboard/include/baseboard/variants.h A src/mainboard/google/dedede/variants/baseboard/memory.c A src/mainboard/google/dedede/variants/waddledoo/Makefile.inc A src/mainboard/google/dedede/variants/waddledoo/memory.c 13 files changed, 244 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/39136/24
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39136 )
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
Patch Set 24:
(1 comment)
https://review.coreboot.org/c/coreboot/+/39136/18/src/mainboard/google/deded... File src/mainboard/google/dedede/variants/baseboard/memory.c:
https://review.coreboot.org/c/coreboot/+/39136/18/src/mainboard/google/deded... PS18, Line 23: ;
Ack. […]
added die as this is more applicable rather adding dummy config data which might cause failure and increase debug time? Thoughts ?
Subrata Banik has uploaded a new patch set (#25) to the change originally created by Meera Ravindranath. ( https://review.coreboot.org/c/coreboot/+/39136 )
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
mb/google/dedede: Add memory initialization support for dedede
Update memory parameters based on memory type supported by dedede 1. Update dq/dqs mappings 2. Update spd data for Micron Memory 3. Add SPD data binary files for supported memory types 4. Update other FSPM UPDs as part of memory initialization
BUG=none BRANCH=none TEST= Build dedede, flash and boot to kernel.
Change-Id: I7248861efd1ecd5a0df0e17d39a44c168cab200e Signed-off-by: Meera Ravindranath meera.ravindranath@intel.com --- M src/mainboard/google/dedede/Kconfig M src/mainboard/google/dedede/Makefile.inc M src/mainboard/google/dedede/romstage.c A src/mainboard/google/dedede/spd/Makefile.inc A src/mainboard/google/dedede/spd/Micron_MT53E512M32D2NP_2GB.spd.hex A src/mainboard/google/dedede/spd/empty.spd.hex M src/mainboard/google/dedede/variants/baseboard/Makefile.inc M src/mainboard/google/dedede/variants/baseboard/gpio.c M src/mainboard/google/dedede/variants/baseboard/include/baseboard/gpio.h M src/mainboard/google/dedede/variants/baseboard/include/baseboard/variants.h A src/mainboard/google/dedede/variants/baseboard/memory.c A src/mainboard/google/dedede/variants/waddledoo/Makefile.inc A src/mainboard/google/dedede/variants/waddledoo/memory.c 13 files changed, 245 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/39136/25
Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39136 )
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
Patch Set 25: Code-Review+2
Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39136 )
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
Patch Set 25: -Code-Review
(1 comment)
https://review.coreboot.org/c/coreboot/+/39136/25/src/mainboard/google/deded... File src/mainboard/google/dedede/variants/waddledoo/memory.c:
https://review.coreboot.org/c/coreboot/+/39136/25/src/mainboard/google/deded... PS25, Line 41: 1, 3, 0, 2, 7, 5, 4, 6 This does not seem to match with the schematics. Can you please confirm?
If my understanding is correct, it should be: 2 0 3 1 6 5 7 4
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39136 )
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
Patch Set 25:
(1 comment)
https://review.coreboot.org/c/coreboot/+/39136/25/src/mainboard/google/deded... File src/mainboard/google/dedede/variants/waddledoo/memory.c:
https://review.coreboot.org/c/coreboot/+/39136/25/src/mainboard/google/deded... PS25, Line 41: 1, 3, 0, 2, 7, 5, 4, 6
This does not seem to match with the schematics. Can you please confirm? […]
we have confirmation that DQS map value is correct based on HW folks and required tools.
If you need some additional details, we shall discuss in crossbug?
Aamir Bohra has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39136 )
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
Patch Set 25: Code-Review+2
(1 comment)
https://review.coreboot.org/c/coreboot/+/39136/25/src/mainboard/google/deded... File src/mainboard/google/dedede/variants/waddledoo/memory.c:
https://review.coreboot.org/c/coreboot/+/39136/25/src/mainboard/google/deded... PS25, Line 41: 1, 3, 0, 2, 7, 5, 4, 6
we have confirmation that DQS map value is correct based on HW folks and required tools. […]
I checked again in schematics the mapping is correct.
V Sowmya has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39136 )
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
Patch Set 25: Code-Review+2
Maulik V Vaghela has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39136 )
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
Patch Set 25: Code-Review+2
Ronak Kanabar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39136 )
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
Patch Set 25: Code-Review+2
Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39136 )
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
Patch Set 25:
(1 comment)
https://review.coreboot.org/c/coreboot/+/39136/25/src/mainboard/google/deded... File src/mainboard/google/dedede/variants/waddledoo/memory.c:
https://review.coreboot.org/c/coreboot/+/39136/25/src/mainboard/google/deded... PS25, Line 41: 1, 3, 0, 2, 7, 5, 4, 6
I checked again in schematics the mapping is correct.
Synced up with Aamir offline. My understanding was that the index in the array corresponds to DRAM's DQS ID and the value in the array corresponds to CPU's DQS ID. This is documented that way for all the SoCs like CNL and TGL. Hence I came with that array definition. Also the comment above the array says so.
Aamir mentioned to me that the index in the array corresponds to CPU's DQS ID and the value in the array corresponds to DRAM's DQS ID. If so, then the array definition matches with the schematics. Probably the documentation shared for previous SoCs needs to be fixed?
Hello V Sowmya, build bot (Jenkins), Furquan Shaikh, Patrick Georgi, Martin Roth, Maulik V Vaghela, Subrata Banik, Ronak Kanabar, Aamir Bohra, Karthik Ramasubramanian,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/39136
to look at the new patch set (#27).
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
mb/google/dedede: Add memory initialization support for dedede
Update memory parameters based on memory type supported by dedede 1. Update dq/dqs mappings 2. Update spd data for Micron Memory 3. Add SPD data binary files for supported memory types 4. Update other FSPM UPDs as part of memory initialization
BUG=none BRANCH=none TEST= Build dedede, flash and boot to kernel.
Change-Id: I7248861efd1ecd5a0df0e17d39a44c168cab200e Signed-off-by: Meera Ravindranath meera.ravindranath@intel.com Signed-off-by: Subrata Banik subrata.banik@intel.com --- M src/mainboard/google/dedede/Kconfig M src/mainboard/google/dedede/Makefile.inc M src/mainboard/google/dedede/romstage.c A src/mainboard/google/dedede/spd/Makefile.inc A src/mainboard/google/dedede/spd/Micron_MT53E512M32D2NP_2GB.spd.hex A src/mainboard/google/dedede/spd/empty.spd.hex M src/mainboard/google/dedede/variants/baseboard/Makefile.inc M src/mainboard/google/dedede/variants/baseboard/gpio.c M src/mainboard/google/dedede/variants/baseboard/include/baseboard/gpio.h M src/mainboard/google/dedede/variants/baseboard/include/baseboard/variants.h A src/mainboard/google/dedede/variants/baseboard/memory.c A src/mainboard/google/dedede/variants/waddledoo/Makefile.inc A src/mainboard/google/dedede/variants/waddledoo/memory.c 13 files changed, 245 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/39136/27
Hello V Sowmya, build bot (Jenkins), Furquan Shaikh, Patrick Georgi, Martin Roth, Maulik V Vaghela, Subrata Banik, Ronak Kanabar, Aamir Bohra, Karthik Ramasubramanian,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/39136
to look at the new patch set (#28).
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
mb/google/dedede: Add memory initialization support for dedede
Update memory parameters based on memory type supported by dedede 1. Update dq/dqs mappings 2. Update spd data for Micron Memory 3. Add SPD data binary files for supported memory types 4. Update other FSPM UPDs as part of memory initialization
BUG=none BRANCH=none TEST=Build dedede, flash and boot to kernel.
Change-Id: I7248861efd1ecd5a0df0e17d39a44c168cab200e Signed-off-by: Meera Ravindranath meera.ravindranath@intel.com Signed-off-by: Subrata Banik subrata.banik@intel.com --- M src/mainboard/google/dedede/Kconfig M src/mainboard/google/dedede/Makefile.inc M src/mainboard/google/dedede/romstage.c A src/mainboard/google/dedede/spd/Makefile.inc A src/mainboard/google/dedede/spd/Micron_MT53E512M32D2NP_2GB.spd.hex A src/mainboard/google/dedede/spd/empty.spd.hex M src/mainboard/google/dedede/variants/baseboard/Makefile.inc M src/mainboard/google/dedede/variants/baseboard/gpio.c M src/mainboard/google/dedede/variants/baseboard/include/baseboard/gpio.h M src/mainboard/google/dedede/variants/baseboard/include/baseboard/variants.h A src/mainboard/google/dedede/variants/baseboard/memory.c A src/mainboard/google/dedede/variants/waddledoo/Makefile.inc A src/mainboard/google/dedede/variants/waddledoo/memory.c 13 files changed, 245 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/39136/28
Hello V Sowmya, build bot (Jenkins), Furquan Shaikh, Patrick Georgi, Martin Roth, Maulik V Vaghela, Subrata Banik, Ronak Kanabar, Aamir Bohra, Karthik Ramasubramanian,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/39136
to look at the new patch set (#29).
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
mb/google/dedede: Add memory initialization support for dedede
Update memory parameters based on memory type supported by dedede 1. Update dq/dqs mappings 2. Update spd data for Micron Memory 3. Add SPD data binary files for supported memory types 4. Update other FSPM UPDs as part of memory initialization
BUG=none BRANCH=none TEST=Build dedede, flash and boot to kernel.
Change-Id: I7248861efd1ecd5a0df0e17d39a44c168cab200e Signed-off-by: Meera Ravindranath meera.ravindranath@intel.com Signed-off-by: Subrata Banik subrata.banik@intel.com --- M src/mainboard/google/dedede/Kconfig M src/mainboard/google/dedede/Makefile.inc M src/mainboard/google/dedede/romstage.c A src/mainboard/google/dedede/spd/Makefile.inc A src/mainboard/google/dedede/spd/Micron_MT53E512M32D2NP_2GB.spd.hex A src/mainboard/google/dedede/spd/empty.spd.hex M src/mainboard/google/dedede/variants/baseboard/Makefile.inc M src/mainboard/google/dedede/variants/baseboard/gpio.c M src/mainboard/google/dedede/variants/baseboard/include/baseboard/gpio.h M src/mainboard/google/dedede/variants/baseboard/include/baseboard/variants.h A src/mainboard/google/dedede/variants/baseboard/memory.c A src/mainboard/google/dedede/variants/waddledoo/Makefile.inc A src/mainboard/google/dedede/variants/waddledoo/memory.c 13 files changed, 245 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/39136/29
Meera Ravindranath has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39136 )
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
Patch Set 29:
(1 comment)
https://review.coreboot.org/c/coreboot/+/39136/25/src/mainboard/google/deded... File src/mainboard/google/dedede/variants/waddledoo/memory.c:
https://review.coreboot.org/c/coreboot/+/39136/25/src/mainboard/google/deded... PS25, Line 41: 1, 3, 0, 2, 7, 5, 4, 6
Synced up with Aamir offline. […]
Sure, If there is a documentation issue, we will get back on it. Marking it resolved for now.
Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39136 )
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
Patch Set 29:
(1 comment)
https://review.coreboot.org/c/coreboot/+/39136/29/src/mainboard/google/deded... File src/mainboard/google/dedede/variants/waddledoo/memory.c:
https://review.coreboot.org/c/coreboot/+/39136/29/src/mainboard/google/deded... PS29, Line 38: * the index = pin number on ddr4 part : * the value = pin number on SoC Can you please fix the comment here to reflect the mapping. LGTM otherwise.
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39136 )
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
Patch Set 29:
(4 comments)
https://review.coreboot.org/c/coreboot/+/39136/29/src/mainboard/google/deded... File src/mainboard/google/dedede/romstage.c:
https://review.coreboot.org/c/coreboot/+/39136/29/src/mainboard/google/deded... PS29, Line 20: TODO Is there a bug tracking this TODO?
https://review.coreboot.org/c/coreboot/+/39136/29/src/mainboard/google/deded... File src/mainboard/google/dedede/variants/baseboard/memory.c:
PS29: Just a thought: I believe most variants would follow what the reference board is doing. It might make sense to move the definitions you added for waddledoo here in baseboard.
https://review.coreboot.org/c/coreboot/+/39136/18/src/mainboard/google/deded... File src/mainboard/google/dedede/variants/waddledoo/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/39136/18/src/mainboard/google/deded... PS18, Line 16: empty
Furquan, I am not sure if you want to put all the SPDs now itself or do you want to add them as and when they become available.
We can add them as and when they become available. I just wanted to make sure we do not leave ID 0 empty since it unnecessarily eats 512 bytes of space. Thanks for confirming that it will be added as a follow-up.
https://review.coreboot.org/c/coreboot/+/39136/29/src/mainboard/google/deded... File src/mainboard/google/dedede/variants/waddledoo/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/39136/29/src/mainboard/google/deded... PS29, Line 9: SPD_SOURCES = empty Can you please add a comment in the end indicating the ID that is used.
SPD_SOURCES = empty # 0b0000 SPD_SOURCEs += ... # 0b0001 ...
Hello V Sowmya, build bot (Jenkins), Furquan Shaikh, Patrick Georgi, Martin Roth, Maulik V Vaghela, Subrata Banik, Ronak Kanabar, Aamir Bohra, Karthik Ramasubramanian,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/39136
to look at the new patch set (#30).
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
mb/google/dedede: Add memory initialization support for dedede
Update memory parameters based on memory type supported by dedede 1. Update dq/dqs mappings 2. Update spd data for Micron Memory 3. Add SPD data binary files for supported memory types 4. Update other FSPM UPDs as part of memory initialization
BUG=none BRANCH=none TEST=Build dedede, flash and boot to kernel.
Change-Id: I7248861efd1ecd5a0df0e17d39a44c168cab200e Signed-off-by: Meera Ravindranath meera.ravindranath@intel.com Signed-off-by: Subrata Banik subrata.banik@intel.com --- M src/mainboard/google/dedede/Kconfig M src/mainboard/google/dedede/Makefile.inc M src/mainboard/google/dedede/romstage.c A src/mainboard/google/dedede/spd/Makefile.inc A src/mainboard/google/dedede/spd/Micron_MT53E512M32D2NP_2GB.spd.hex A src/mainboard/google/dedede/spd/empty.spd.hex M src/mainboard/google/dedede/variants/baseboard/Makefile.inc M src/mainboard/google/dedede/variants/baseboard/gpio.c M src/mainboard/google/dedede/variants/baseboard/include/baseboard/gpio.h M src/mainboard/google/dedede/variants/baseboard/include/baseboard/variants.h A src/mainboard/google/dedede/variants/baseboard/memory.c A src/mainboard/google/dedede/variants/waddledoo/Makefile.inc A src/mainboard/google/dedede/variants/waddledoo/memory.c 13 files changed, 295 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/39136/30
Meera Ravindranath has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39136 )
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
Patch Set 30:
(4 comments)
https://review.coreboot.org/c/coreboot/+/39136/29/src/mainboard/google/deded... File src/mainboard/google/dedede/romstage.c:
https://review.coreboot.org/c/coreboot/+/39136/29/src/mainboard/google/deded... PS29, Line 20: TODO
Is there a bug tracking this TODO?
Yes, here is the link https://partnerissuetracker.corp.google.com/issues/150653436
https://review.coreboot.org/c/coreboot/+/39136/29/src/mainboard/google/deded... File src/mainboard/google/dedede/variants/baseboard/memory.c:
PS29:
Just a thought: I believe most variants would follow what the reference board is doing. […]
Ack
https://review.coreboot.org/c/coreboot/+/39136/29/src/mainboard/google/deded... File src/mainboard/google/dedede/variants/waddledoo/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/39136/29/src/mainboard/google/deded... PS29, Line 9: SPD_SOURCES = empty
Can you please add a comment in the end indicating the ID that is used. […]
Done
https://review.coreboot.org/c/coreboot/+/39136/29/src/mainboard/google/deded... File src/mainboard/google/dedede/variants/waddledoo/memory.c:
https://review.coreboot.org/c/coreboot/+/39136/29/src/mainboard/google/deded... PS29, Line 38: * the index = pin number on ddr4 part : * the value = pin number on SoC
Can you please fix the comment here to reflect the mapping. LGTM otherwise.
Done
Maulik V Vaghela has uploaded a new patch set (#31) to the change originally created by Meera Ravindranath. ( https://review.coreboot.org/c/coreboot/+/39136 )
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
mb/google/dedede: Add memory initialization support for dedede
Update memory parameters based on memory type supported by dedede 1. Update dq/dqs mappings 2. Update spd data for Micron Memory 3. Add SPD data binary files for supported memory types 4. Update other FSPM UPDs as part of memory initialization
BUG=none BRANCH=none TEST=Build dedede, flash and boot to kernel.
Change-Id: I7248861efd1ecd5a0df0e17d39a44c168cab200e Signed-off-by: Meera Ravindranath meera.ravindranath@intel.com Signed-off-by: Subrata Banik subrata.banik@intel.com --- M src/mainboard/google/dedede/Kconfig M src/mainboard/google/dedede/Makefile.inc M src/mainboard/google/dedede/romstage.c A src/mainboard/google/dedede/spd/Makefile.inc A src/mainboard/google/dedede/spd/Micron_MT53E512M32D2NP_2GB.spd.hex A src/mainboard/google/dedede/spd/empty.spd.hex M src/mainboard/google/dedede/variants/baseboard/Makefile.inc M src/mainboard/google/dedede/variants/baseboard/gpio.c M src/mainboard/google/dedede/variants/baseboard/include/baseboard/gpio.h M src/mainboard/google/dedede/variants/baseboard/include/baseboard/variants.h A src/mainboard/google/dedede/variants/baseboard/memory.c A src/mainboard/google/dedede/variants/waddledoo/Makefile.inc A src/mainboard/google/dedede/variants/waddledoo/memory.c 13 files changed, 295 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/39136/31
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39136 )
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
Patch Set 31: Code-Review+2
Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39136 )
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
Patch Set 31: -Code-Review
V Sowmya has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39136 )
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
Patch Set 31: Code-Review+2
Ronak Kanabar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39136 )
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
Patch Set 31: Code-Review+2
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39136 )
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
Patch Set 31:
(1 comment)
https://review.coreboot.org/c/coreboot/+/39136/31/src/mainboard/google/deded... File src/mainboard/google/dedede/variants/waddledoo/memory.c:
PS31: Now that these default functions are provided by baseboard, you don't need this file anymore.
Hello V Sowmya, build bot (Jenkins), Furquan Shaikh, Patrick Georgi, Martin Roth, Maulik V Vaghela, Subrata Banik, Ronak Kanabar, Aamir Bohra, Karthik Ramasubramanian,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/39136
to look at the new patch set (#32).
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
mb/google/dedede: Add memory initialization support for dedede
Update memory parameters based on memory type supported by dedede 1. Update dq/dqs mappings 2. Update spd data for Micron Memory 3. Add SPD data binary files for supported memory types 4. Update other FSPM UPDs as part of memory initialization
BUG=none BRANCH=none TEST=Build dedede, flash and boot to kernel.
Change-Id: I7248861efd1ecd5a0df0e17d39a44c168cab200e Signed-off-by: Meera Ravindranath meera.ravindranath@intel.com Signed-off-by: Subrata Banik subrata.banik@intel.com --- M src/mainboard/google/dedede/Kconfig M src/mainboard/google/dedede/Makefile.inc M src/mainboard/google/dedede/romstage.c A src/mainboard/google/dedede/spd/Makefile.inc A src/mainboard/google/dedede/spd/Micron_MT53E512M32D2NP_2GB.spd.hex A src/mainboard/google/dedede/spd/empty.spd.hex M src/mainboard/google/dedede/variants/baseboard/Makefile.inc M src/mainboard/google/dedede/variants/baseboard/gpio.c M src/mainboard/google/dedede/variants/baseboard/include/baseboard/gpio.h M src/mainboard/google/dedede/variants/baseboard/include/baseboard/variants.h A src/mainboard/google/dedede/variants/baseboard/memory.c A src/mainboard/google/dedede/variants/waddledoo/Makefile.inc 12 files changed, 220 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/39136/32
Meera Ravindranath has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39136 )
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
Patch Set 32:
(1 comment)
https://review.coreboot.org/c/coreboot/+/39136/31/src/mainboard/google/deded... File src/mainboard/google/dedede/variants/waddledoo/memory.c:
PS31:
Now that these default functions are provided by baseboard, you don't need this file anymore.
Ack
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39136 )
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
Patch Set 32: Code-Review+2
(1 comment)
https://review.coreboot.org/c/coreboot/+/39136/32/src/mainboard/google/deded... File src/mainboard/google/dedede/variants/baseboard/memory.c:
https://review.coreboot.org/c/coreboot/+/39136/32/src/mainboard/google/deded... PS32, Line 35: ddr4 nit: LPDDR4?
Meera Ravindranath has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39136 )
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
Patch Set 32:
(1 comment)
https://review.coreboot.org/c/coreboot/+/39136/32/src/mainboard/google/deded... File src/mainboard/google/dedede/variants/baseboard/memory.c:
https://review.coreboot.org/c/coreboot/+/39136/32/src/mainboard/google/deded... PS32, Line 35: ddr4
nit: LPDDR4?
Ack
Hello V Sowmya, build bot (Jenkins), Furquan Shaikh, Patrick Georgi, Martin Roth, Maulik V Vaghela, Subrata Banik, Ronak Kanabar, Aamir Bohra, Karthik Ramasubramanian,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/39136
to look at the new patch set (#33).
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
mb/google/dedede: Add memory initialization support for dedede
Update memory parameters based on memory type supported by dedede 1. Update dq/dqs mappings 2. Update spd data for Micron Memory 3. Add SPD data binary files for supported memory types 4. Update other FSPM UPDs as part of memory initialization
BUG=none BRANCH=none TEST=Build dedede, flash and boot to kernel.
Change-Id: I7248861efd1ecd5a0df0e17d39a44c168cab200e Signed-off-by: Meera Ravindranath meera.ravindranath@intel.com Signed-off-by: Subrata Banik subrata.banik@intel.com --- M src/mainboard/google/dedede/Kconfig M src/mainboard/google/dedede/Makefile.inc M src/mainboard/google/dedede/romstage.c A src/mainboard/google/dedede/spd/Makefile.inc A src/mainboard/google/dedede/spd/Micron_MT53E512M32D2NP_2GB.spd.hex A src/mainboard/google/dedede/spd/empty.spd.hex M src/mainboard/google/dedede/variants/baseboard/Makefile.inc M src/mainboard/google/dedede/variants/baseboard/gpio.c M src/mainboard/google/dedede/variants/baseboard/include/baseboard/gpio.h M src/mainboard/google/dedede/variants/baseboard/include/baseboard/variants.h A src/mainboard/google/dedede/variants/baseboard/memory.c A src/mainboard/google/dedede/variants/waddledoo/Makefile.inc 12 files changed, 220 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/39136/33
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39136 )
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
Patch Set 33: Code-Review+2
Ronak Kanabar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39136 )
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
Patch Set 33: Code-Review+2
V Sowmya has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39136 )
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
Patch Set 33: Code-Review+2
Maulik V Vaghela has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39136 )
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
Patch Set 33: Code-Review+2
Furquan Shaikh has submitted this change. ( https://review.coreboot.org/c/coreboot/+/39136 )
Change subject: mb/google/dedede: Add memory initialization support for dedede ......................................................................
mb/google/dedede: Add memory initialization support for dedede
Update memory parameters based on memory type supported by dedede 1. Update dq/dqs mappings 2. Update spd data for Micron Memory 3. Add SPD data binary files for supported memory types 4. Update other FSPM UPDs as part of memory initialization
BUG=none BRANCH=none TEST=Build dedede, flash and boot to kernel.
Change-Id: I7248861efd1ecd5a0df0e17d39a44c168cab200e Signed-off-by: Meera Ravindranath meera.ravindranath@intel.com Signed-off-by: Subrata Banik subrata.banik@intel.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/39136 Reviewed-by: Furquan Shaikh furquan@google.com Reviewed-by: Ronak Kanabar ronak.kanabar@intel.com Reviewed-by: V Sowmya v.sowmya@intel.com Reviewed-by: Maulik V Vaghela maulik.v.vaghela@intel.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/google/dedede/Kconfig M src/mainboard/google/dedede/Makefile.inc M src/mainboard/google/dedede/romstage.c A src/mainboard/google/dedede/spd/Makefile.inc A src/mainboard/google/dedede/spd/Micron_MT53E512M32D2NP_2GB.spd.hex A src/mainboard/google/dedede/spd/empty.spd.hex M src/mainboard/google/dedede/variants/baseboard/Makefile.inc M src/mainboard/google/dedede/variants/baseboard/gpio.c M src/mainboard/google/dedede/variants/baseboard/include/baseboard/gpio.h M src/mainboard/google/dedede/variants/baseboard/include/baseboard/variants.h A src/mainboard/google/dedede/variants/baseboard/memory.c A src/mainboard/google/dedede/variants/waddledoo/Makefile.inc 12 files changed, 220 insertions(+), 2 deletions(-)
Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved V Sowmya: Looks good to me, approved Maulik V Vaghela: Looks good to me, approved Ronak Kanabar: Looks good to me, approved
diff --git a/src/mainboard/google/dedede/Kconfig b/src/mainboard/google/dedede/Kconfig index 3eddabc..ebca580 100644 --- a/src/mainboard/google/dedede/Kconfig +++ b/src/mainboard/google/dedede/Kconfig @@ -6,6 +6,7 @@ select EC_GOOGLE_CHROMEEC select EC_GOOGLE_CHROMEEC_BOARDID select EC_GOOGLE_CHROMEEC_ESPI + select GENERIC_SPD_BIN select HAVE_ACPI_RESUME select HAVE_ACPI_TABLES select INTEL_LPSS_UART_FOR_CONSOLE @@ -31,6 +32,10 @@ string default "variants/baseboard/devicetree.cb"
+config DIMM_SPD_SIZE + int + default 512 + config DRIVER_TPM_SPI_BUS default 0x1
diff --git a/src/mainboard/google/dedede/Makefile.inc b/src/mainboard/google/dedede/Makefile.inc index 2be3feb..9af93dd 100644 --- a/src/mainboard/google/dedede/Makefile.inc +++ b/src/mainboard/google/dedede/Makefile.inc @@ -13,6 +13,8 @@ smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c
subdirs-y += variants/baseboard +subdirs-y += spd + CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/baseboard/include
VARIANT_DIR:=$(call strip_quotes,$(CONFIG_VARIANT_DIR)) diff --git a/src/mainboard/google/dedede/romstage.c b/src/mainboard/google/dedede/romstage.c index bba6e1a..8f4756b 100644 --- a/src/mainboard/google/dedede/romstage.c +++ b/src/mainboard/google/dedede/romstage.c @@ -6,10 +6,18 @@ * SPDX-License-Identifier: GPL-2.0-or-later */
-#include <fsp/api.h> +#include <baseboard/variants.h> +#include <soc/meminit_jsl.h> #include <soc/romstage.h>
void mainboard_memory_init_params(FSPM_UPD *memupd) { - /* ToDo : Fill FSP-M memory params */ + const struct mb_cfg *board_cfg = variant_memcfg_config(); + const struct spd_info spd_info = { + .read_type = READ_SPD_CBFS, + .spd_spec.spd_index = variant_memory_sku(), + }; + /* TODO: Read the resistor strap to get number of memory segments. */ + bool half_populated = 0; + memcfg_init(&memupd->FspmConfig, board_cfg, &spd_info, half_populated); } diff --git a/src/mainboard/google/dedede/spd/Makefile.inc b/src/mainboard/google/dedede/spd/Makefile.inc new file mode 100644 index 0000000..7de7f83 --- /dev/null +++ b/src/mainboard/google/dedede/spd/Makefile.inc @@ -0,0 +1,25 @@ +## +## This file is part of the coreboot project. +## +## Copyright 2020 The coreboot project Authors. +## +## SPDX-License-Identifier: GPL-2.0-or-later +## + +ifneq ($(SPD_SOURCES),) +SPD_BIN = $(obj)/spd.bin + +SPD_DEPS := $(foreach f, $(SPD_SOURCES), src/mainboard/$(MAINBOARDDIR)/spd/$(f).spd.hex) + +# Include spd ROM data +$(SPD_BIN): $(SPD_DEPS) + for f in $+; \ + do for c in $$(cat $$f | grep -v ^#); \ + do printf $$(printf '\%o' 0x$$c); \ + done; \ + done > $@ + +cbfs-files-y += spd.bin +spd.bin-file := $(SPD_BIN) +spd.bin-type := spd +endif diff --git a/src/mainboard/google/dedede/spd/Micron_MT53E512M32D2NP_2GB.spd.hex b/src/mainboard/google/dedede/spd/Micron_MT53E512M32D2NP_2GB.spd.hex new file mode 100644 index 0000000..71e5456 --- /dev/null +++ b/src/mainboard/google/dedede/spd/Micron_MT53E512M32D2NP_2GB.spd.hex @@ -0,0 +1,32 @@ +23 11 11 0E 15 21 90 08 00 40 00 00 02 22 00 00 +00 00 04 0F 92 54 05 00 87 00 90 A8 90 C0 08 60 +04 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 E1 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 20 00 00 00 20 20 20 20 20 20 20 +20 20 20 20 20 20 20 20 20 20 20 20 20 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/src/mainboard/google/dedede/spd/empty.spd.hex b/src/mainboard/google/dedede/spd/empty.spd.hex new file mode 100644 index 0000000..67b46cd --- /dev/null +++ b/src/mainboard/google/dedede/spd/empty.spd.hex @@ -0,0 +1,32 @@ +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 80 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 80 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 +00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 diff --git a/src/mainboard/google/dedede/variants/baseboard/Makefile.inc b/src/mainboard/google/dedede/variants/baseboard/Makefile.inc index 7c092e4..4f87de9 100644 --- a/src/mainboard/google/dedede/variants/baseboard/Makefile.inc +++ b/src/mainboard/google/dedede/variants/baseboard/Makefile.inc @@ -1,5 +1,7 @@ bootblock-y += gpio.c
+romstage-y += memory.c + ramstage-y += gpio.c
smm-y += gpio.c diff --git a/src/mainboard/google/dedede/variants/baseboard/gpio.c b/src/mainboard/google/dedede/variants/baseboard/gpio.c index b8ceae2..8392242 100644 --- a/src/mainboard/google/dedede/variants/baseboard/gpio.c +++ b/src/mainboard/google/dedede/variants/baseboard/gpio.c @@ -45,6 +45,14 @@ /* B23 : EC_AP_USB_C1_HDMI_HPD */ PAD_CFG_NF(GPP_B23, NONE, DEEP, NF1),
+ /* C0 : RAM_STRAP_0 */ + PAD_CFG_GPI(GPP_C0, NONE, DEEP), + /* C3 : RAM_STRAP_1 */ + PAD_CFG_GPI(GPP_C3, NONE, DEEP), + /* C4 : RAM_STRAP_2 */ + PAD_CFG_GPI(GPP_C4, NONE, DEEP), + /* C5 : RAM_STRAP_3 */ + PAD_CFG_GPI(GPP_C5, NONE, DEEP), /* C16 : AP_I2C_TRACKPAD_SDA_3V3 */ PAD_CFG_NF(GPP_C16, NONE, DEEP, NF1), /* C17 : AP_I2C_TRACKPAD_SCL_3V3 */ @@ -113,6 +121,15 @@ PAD_CFG_NF(GPP_B17, NONE, DEEP, NF1), /* B18 : H1_SLAVE_SPI_MOSI_R */ PAD_CFG_NF(GPP_B18, NONE, DEEP, NF1), + + /* C0 : RAM_STRAP_0 */ + PAD_CFG_GPI(GPP_C0, NONE, DEEP), + /* C3 : RAM_STRAP_1 */ + PAD_CFG_GPI(GPP_C3, NONE, DEEP), + /* C4 : RAM_STRAP_2 */ + PAD_CFG_GPI(GPP_C4, NONE, DEEP), + /* C5 : RAM_STRAP_3 */ + PAD_CFG_GPI(GPP_C5, NONE, DEEP), };
const struct pad_config *__weak variant_gpio_table(size_t *num) diff --git a/src/mainboard/google/dedede/variants/baseboard/include/baseboard/gpio.h b/src/mainboard/google/dedede/variants/baseboard/include/baseboard/gpio.h index fe9c0c5..395143b 100644 --- a/src/mainboard/google/dedede/variants/baseboard/include/baseboard/gpio.h +++ b/src/mainboard/google/dedede/variants/baseboard/include/baseboard/gpio.h @@ -18,4 +18,10 @@ /* EC wake is LAN_WAKE# which is a special DeepSX wake pin */ #define GPE_EC_WAKE GPE0_LAN_WAK
+/* Memory configuration board straps */ +#define GPIO_MEM_CONFIG_0 GPP_C0 +#define GPIO_MEM_CONFIG_1 GPP_C3 +#define GPIO_MEM_CONFIG_2 GPP_C4 +#define GPIO_MEM_CONFIG_3 GPP_C5 + #endif /* __BASEBOARD_GPIO_H__ */ diff --git a/src/mainboard/google/dedede/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/dedede/variants/baseboard/include/baseboard/variants.h index 32b2c8b..a0facb2 100644 --- a/src/mainboard/google/dedede/variants/baseboard/include/baseboard/variants.h +++ b/src/mainboard/google/dedede/variants/baseboard/include/baseboard/variants.h @@ -28,4 +28,10 @@ */ int board_info_get_fw_config(uint32_t *fw_config);
+/* Return memory configuration structure. */ +const struct mb_cfg *variant_memcfg_config(void); + +/* Return memory SKU for the variant */ +int variant_memory_sku(void); + #endif /*__BASEBOARD_VARIANTS_H__ */ diff --git a/src/mainboard/google/dedede/variants/baseboard/memory.c b/src/mainboard/google/dedede/variants/baseboard/memory.c new file mode 100644 index 0000000..bcb1295 --- /dev/null +++ b/src/mainboard/google/dedede/variants/baseboard/memory.c @@ -0,0 +1,73 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2020 The coreboot project Authors. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include <baseboard/variants.h> +#include <baseboard/gpio.h> +#include <gpio.h> +#include <soc/meminit_jsl.h> +#include <soc/romstage.h> + +static const struct mb_cfg baseboard_memcfg_cfg = { + + .dq_map[DDR_CH0] = { + {0xf, 0xf0}, + {0xf, 0xf0}, + {0xff, 0x0}, + {0x0, 0x0}, + {0x0, 0x0}, + {0x0, 0x0} + }, + .dq_map[DDR_CH1] = { + {0xf, 0xf0}, + {0xf, 0xf0}, + {0xff, 0x0}, + {0x0, 0x0}, + {0x00, 0x0}, + {0x00, 0x0} + }, + + /* + * The dqs_map arrays map the ddr4 pins to the SoC pins + * for both channels. + * + * the index = pin number on SoC + * the value = pin number on LPDDR4 part + */ + + .dqs_map[DDR_CH0] = {1, 3, 0, 2, 7, 5, 4, 6}, + .dqs_map[DDR_CH1] = {3, 1, 2, 0, 4, 5, 7, 6}, + + /* WaddleDoo uses 100, 100 and 100 rcomp resistors */ + .rcomp_resistor = {100, 100, 100}, + + /* WaddleDoo Rcomp target values */ + .rcomp_targets = {80, 40, 40, 40, 30}, + + /* Disable Early Command Training */ + .ect = 1, + + /* User Board Type */ + .UserBd = BOARD_TYPE_MOBILE, +}; + +const struct mb_cfg *__weak variant_memcfg_config(void) +{ + return &baseboard_memcfg_cfg; +} + +int __weak variant_memory_sku(void) +{ + gpio_t spd_gpios[] = { + GPIO_MEM_CONFIG_0, + GPIO_MEM_CONFIG_1, + GPIO_MEM_CONFIG_2, + GPIO_MEM_CONFIG_3, + }; + + return gpio_base2_value(spd_gpios, ARRAY_SIZE(spd_gpios)); +} diff --git a/src/mainboard/google/dedede/variants/waddledoo/Makefile.inc b/src/mainboard/google/dedede/variants/waddledoo/Makefile.inc new file mode 100644 index 0000000..28da8f6 --- /dev/null +++ b/src/mainboard/google/dedede/variants/waddledoo/Makefile.inc @@ -0,0 +1,10 @@ +## +## This file is part of the coreboot project. +## +## Copyright 2020 The coreboot project Authors. +## +## SPDX-License-Identifier: GPL-2.0-or-later +## + +SPD_SOURCES = empty #0b0000 +SPD_SOURCES += Micron_MT53E512M32D2NP_2GB #0b0001
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