coreboot-gerrit April 2025

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[XS] Change in coreboot[main]: arch/x86/postcar_loader: Add comment line for reloc_params assignment
by NyeonWoo Kim (Code Review) 05 Apr '25

05 Apr '25

Attention is currently required from: Jérémy Compostella, Paul Menzel, Shuo Liu. NyeonWoo Kim has posted comments on this change by NyeonWoo Kim. ( https://review.coreboot.org/c/coreboot/+/86866?usp=email ) Change subject: arch/x86/postcar_loader: Add comment line for reloc_params assignment ...................................................................... Patch Set 7: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/86866/comment/b06f4f0b_dc62d9c7?us… : PS7, Line 10: to be loaded as reloc_params, e.g. with its cache flushed. > Line breaks needs to be fixed. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/86866?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic7d3f9cf514ce5a8efc2af9e78992cb39a91e537 Gerrit-Change-Number: 86866 Gerrit-PatchSet: 7 Gerrit-Owner: NyeonWoo Kim Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Comment-Date: Sat, 05 Apr 2025 04:18:25 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Shuo Liu <shuo.liu(a)intel.com>

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[XS] Change in coreboot[main]: arch/x86/postcar_loader: Add comment line for reloc_params assignment
by NyeonWoo Kim (Code Review) 05 Apr '25

05 Apr '25

Attention is currently required from: Jérémy Compostella, NyeonWoo Kim, Paul Menzel. Hello Jérémy Compostella, Shuo Liu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/86866?usp=email to look at the new patch set (#8). Change subject: arch/x86/postcar_loader: Add comment line for reloc_params assignment ...................................................................... arch/x86/postcar_loader: Add comment line for reloc_params assignment During finalize_load(), cpu/x86/mtrr/earlymtrr.c:postcar_mtrr is signaled to be loaded as reloc_params, e.g. with its cache flushed. Add a comment line to specify the relationship to improve the readability. I didn't see code to set up parameter at first time. So, I just guess that adding a comment would be helpful. :) Change-Id: Ic7d3f9cf514ce5a8efc2af9e78992cb39a91e537 Signed-off-by: NyeonWoo Kim <knw0507(a)naver.com> --- M src/arch/x86/postcar_loader.c 1 file changed, 5 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/86866/8 -- To view, visit https://review.coreboot.org/c/coreboot/+/86866?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic7d3f9cf514ce5a8efc2af9e78992cb39a91e537 Gerrit-Change-Number: 86866 Gerrit-PatchSet: 8 Gerrit-Owner: NyeonWoo Kim Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: NyeonWoo Kim

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[XS] Change in coreboot[main]: {commonlib, lib}: Add timestamp for early chip initialization
by Subrata Banik (Code Review) 05 Apr '25

05 Apr '25

Attention is currently required from: Julius Werner, Kapil Porwal, Karthik Ramasubramanian. Subrata Banik has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/87152?usp=email ) Change subject: {commonlib, lib}: Add timestamp for early chip initialization ...................................................................... Patch Set 3: (1 comment) File src/commonlib/include/commonlib/timestamp_serialized.h: https://review.coreboot.org/c/coreboot/+/87152/comment/082fe25e_36415ee4?us… : PS1, Line 40: TS_DEVICE_INIT_CHIPS = 20, > Do we want to fix this by renaming timestamp 30 to `TS_DEVICE_INIT_CHIPS` and creating a new `TS_DEV […] Acknowledged -- To view, visit https://review.coreboot.org/c/coreboot/+/87152?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib6860901c6b1528ec5098fc93240c6e65777642b Gerrit-Change-Number: 87152 Gerrit-PatchSet: 3 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Sat, 05 Apr 2025 02:47:50 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org>

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[XS] Change in coreboot[main]: {commonlib, lib}: Add timestamp for early chip initialization
by Subrata Banik (Code Review) 05 Apr '25

05 Apr '25

Attention is currently required from: Kapil Porwal, Karthik Ramasubramanian, Subrata Banik. Hello Kapil Porwal, Karthik Ramasubramanian, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/87152?usp=email to look at the new patch set (#3). Change subject: {commonlib, lib}: Add timestamp for early chip initialization ...................................................................... {commonlib, lib}: Add timestamp for early chip initialization This commit introduces a new timestamp `TS_DEVICE_INIT_CHIPS` to specifically mark the start of the `dev_initialize_chips()` function. Previously, the `TS_DEVICE_ENUMERATE` timestamp was incorrectly associated with the `bs_dev_init_chips` function. This patch corrects this by: - Adding the `TS_DEVICE_INIT_CHIPS` enum and name definition. - Updating `bs_dev_init_chips` in `src/lib/hardwaremain.c` to use `TS_DEVICE_INIT_CHIPS`. - Moving the `TS_DEVICE_ENUMERATE` timestamp addition to the `bs_dev_enumerate` function where device enumeration actually begins. This change provides a more accurate and meaningful timestamp for the early chipset initialization phase. TEST=Able to build and boot google/fatcat. ``` 971:loading FSP-S 836,277 (10,658) 17:starting LZ4 decompress (ignore for x86) 847,297 (11,019) 18:finished LZ4 decompress (ignore for x86) 847,376 (79) 30:early chipset initialization 854,579 (7,203) 17:starting LZ4 decompress (ignore for x86) 863,483 (8,903) 18:finished LZ4 decompress (ignore for x86) 863,490 (6) 17:starting LZ4 decompress (ignore for x86) 875,196 (11,705) 18:finished LZ4 decompress (ignore for x86) 875,237 (41) 954:calling FspSiliconInit 875,344 (107) 955:returning from FspSiliconInit 942,740 (67,396) 962:calling FspMultiPhaseSiInit 942,744 (4) 963:returning from FspMultiPhaseSiInit 1,081,355 (138,610) 31:device enumeration 1,081,708 (352) 40:device configuration 1,085,721 (4,013) 50:device enable 1,091,517 (5,795) ``` Change-Id: Ib6860901c6b1528ec5098fc93240c6e65777642b Signed-off-by: Subrata Banik <subratabanik(a)google.com> --- M src/commonlib/include/commonlib/timestamp_serialized.h M src/lib/hardwaremain.c 2 files changed, 6 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/87152/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/87152?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib6860901c6b1528ec5098fc93240c6e65777642b Gerrit-Change-Number: 87152 Gerrit-PatchSet: 3 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com>

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[XS] Change in coreboot[main]: {commonlib, lib}: Add timestamp for early chip initialization
by Julius Werner (Code Review) 05 Apr '25

05 Apr '25

Attention is currently required from: Kapil Porwal, Karthik Ramasubramanian, Subrata Banik. Julius Werner has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/87152?usp=email ) Change subject: {commonlib, lib}: Add timestamp for early chip initialization ...................................................................... Patch Set 1: (1 comment) File src/commonlib/include/commonlib/timestamp_serialized.h: https://review.coreboot.org/c/coreboot/+/87152/comment/8a033500_8db97fc6?us… : PS1, Line 40: TS_DEVICE_INIT_CHIPS = 20, Do we want to fix this by renaming timestamp 30 to `TS_DEVICE_INIT_CHIPS` and creating a new `TS_DEVICE_ENUMERATE` with value 31? That way, as long as you're using a new `cbmem` utility the names will mean the same thing for both new and old versions of coreboot. -- To view, visit https://review.coreboot.org/c/coreboot/+/87152?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib6860901c6b1528ec5098fc93240c6e65777642b Gerrit-Change-Number: 87152 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Sat, 05 Apr 2025 01:16:22 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: drivers/smmstore: Support 64-bit MMIO addresses
by Julius Werner (Code Review) 05 Apr '25

05 Apr '25

Attention is currently required from: Patrick Rudolph. Julius Werner has posted comments on this change by Patrick Rudolph. ( https://review.coreboot.org/c/coreboot/+/87114?usp=email ) Change subject: drivers/smmstore: Support 64-bit MMIO addresses ...................................................................... Patch Set 2: Code-Review+2 (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/87114/comment/f97476b6_d533a8b1?us… : PS2, Line 13: mmap_addr_high nit: needs update to match new code -- To view, visit https://review.coreboot.org/c/coreboot/+/87114?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1131cfa5cdbf92bbd33de3e5b22a305136eec9f7 Gerrit-Change-Number: 87114 Gerrit-PatchSet: 2 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Comment-Date: Sat, 05 Apr 2025 00:35:13 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: Add allocation of a buffer for pvmfw within cbmem
by Julius Werner (Code Review) 05 Apr '25

05 Apr '25

Julius Werner has submitted this change. ( https://review.coreboot.org/c/coreboot/+/87107?usp=email ) Change subject: Add allocation of a buffer for pvmfw within cbmem ...................................................................... Add allocation of a buffer for pvmfw within cbmem Add an allocation of an empty buffer for the Android protected virtual machine firmware within cbmem. The buffer will be filled by the payload and the purpose is to just reserve the memory. cbmem is used to make sure that the region won't overlap with other reserved regions or device regions. BUG=b:354045389 BUG=b:359340876 TEST=depthcharge receives the buffer through lib_sysinfo BRANCH=main Change-Id: I48efc033ac0f5fbfcf3a52fabf40be016cd4c6f7 Signed-off-by: Bartłomiej Grzesik <bgrzesik(a)google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/87107 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Jakub "Kuba" Czapiga <czapiga(a)google.com> Reviewed-by: Julius Werner <jwerner(a)chromium.org> --- M payloads/libpayload/include/sysinfo.h M payloads/libpayload/libc/coreboot.c M src/commonlib/bsd/include/commonlib/bsd/cbmem_id.h M src/vendorcode/google/Kconfig M src/vendorcode/google/Makefile.mk A src/vendorcode/google/pvmfw_cbmem.c 6 files changed, 44 insertions(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Julius Werner: Looks good to me, approved Jakub "Kuba" Czapiga: Looks good to me, approved diff --git a/payloads/libpayload/include/sysinfo.h b/payloads/libpayload/include/sysinfo.h index cbfc7bf..2eb0da3 100644 --- a/payloads/libpayload/include/sysinfo.h +++ b/payloads/libpayload/include/sysinfo.h @@ -162,6 +162,10 @@ uint32_t cbfs_ro_mcache_size; uintptr_t cbfs_rw_mcache_offset; uint32_t cbfs_rw_mcache_size; + + /* pvmfw buffer location */ + uintptr_t pvmfw; + uint32_t pvmfw_size; }; extern struct sysinfo_t lib_sysinfo; diff --git a/payloads/libpayload/libc/coreboot.c b/payloads/libpayload/libc/coreboot.c index 7873426..7a9f997 100644 --- a/payloads/libpayload/libc/coreboot.c +++ b/payloads/libpayload/libc/coreboot.c @@ -268,6 +268,10 @@ case CBMEM_ID_CSE_INFO: info->cse_info = cbmem_entry->address; break; + case CBMEM_ID_PVMFW: + info->pvmfw = cbmem_entry->address; + info->pvmfw_size = cbmem_entry->entry_size; + break; default: break; } diff --git a/src/commonlib/bsd/include/commonlib/bsd/cbmem_id.h b/src/commonlib/bsd/include/commonlib/bsd/cbmem_id.h index 7873d58..4cf1f09 100644 --- a/src/commonlib/bsd/include/commonlib/bsd/cbmem_id.h +++ b/src/commonlib/bsd/include/commonlib/bsd/cbmem_id.h @@ -90,6 +90,7 @@ #define CBMEM_ID_CSE_INFO 0x4553435F #define CBMEM_ID_CSE_BP_INFO 0x42455343 #define CBMEM_ID_AMD_OPENSIL 0x4153494C +#define CBMEM_ID_PVMFW 0x666d7670 #define CBMEM_ID_TO_NAME_TABLE \ { CBMEM_ID_ACPI, "ACPI " }, \ @@ -172,5 +173,6 @@ { CBMEM_ID_AMD_MP2, "AMD MP2 BUFFER"},\ { CBMEM_ID_CSE_INFO, "CSE SPECIFIC INFO"},\ { CBMEM_ID_CSE_BP_INFO, "CSE BP INFO"}, \ - { CBMEM_ID_AMD_OPENSIL, "OPENSIL DATA"} + { CBMEM_ID_AMD_OPENSIL, "OPENSIL DATA"}, \ + { CBMEM_ID_PVMFW, "PVMFW "} #endif /* _CBMEM_ID_H_ */ diff --git a/src/vendorcode/google/Kconfig b/src/vendorcode/google/Kconfig index b24c554..a846336 100644 --- a/src/vendorcode/google/Kconfig +++ b/src/vendorcode/google/Kconfig @@ -37,3 +37,18 @@ config ACPI_FNKEY_GEN_SCANCODE default 94 if MAINBOARD_HAS_GOOGLE_STRAUSS_KEYBOARD + +config GOOGLE_PVMFW_CBMEM + bool "Enable reserving memory for pvmfw using cbmem" + default n + help + Select this config to enable allocating a region for Android protected + virtual machine firmware within cbmem. The region shall be filled by + the payload and the purpose is to just reserve the memory. + cbmem is used to make sure that the region won't overlap with other + reserved regions or device regions. + +config GOOGLE_PVMFW_CBMEM_SIZE + hex "Size of the pvmfw buffer to be reserved using cbmem" + depends on GOOGLE_PVMFW_CBMEM + default 0x400000 diff --git a/src/vendorcode/google/Makefile.mk b/src/vendorcode/google/Makefile.mk index c9e8389..32bb90f 100644 --- a/src/vendorcode/google/Makefile.mk +++ b/src/vendorcode/google/Makefile.mk @@ -4,3 +4,4 @@ ramstage-$(CONFIG_GOOGLE_DSM_CALIB) += dsm_calib.c ramstage-$(CONFIG_GOOGLE_SMBIOS_MAINBOARD_VERSION) += smbios.c +ramstage-$(CONFIG_GOOGLE_PVMFW_CBMEM) += pvmfw_cbmem.c diff --git a/src/vendorcode/google/pvmfw_cbmem.c b/src/vendorcode/google/pvmfw_cbmem.c new file mode 100644 index 0000000..15b0710 --- /dev/null +++ b/src/vendorcode/google/pvmfw_cbmem.c @@ -0,0 +1,17 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <console/console.h> +#include <bootstate.h> +#include <cbmem.h> + +static void add_pvmfw_cbmem(void *unused) +{ + (void)unused; + void *pvmfw; + + pvmfw = cbmem_add(CBMEM_ID_PVMFW, CONFIG_GOOGLE_PVMFW_CBMEM_SIZE); + if (!pvmfw) + printk(BIOS_ERR, "Failed to add pvmfw info to CBMEM\n"); +} + +BOOT_STATE_INIT_ENTRY(BS_WRITE_TABLES, BS_ON_ENTRY, add_pvmfw_cbmem, NULL); -- To view, visit https://review.coreboot.org/c/coreboot/+/87107?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I48efc033ac0f5fbfcf3a52fabf40be016cd4c6f7 Gerrit-Change-Number: 87107 Gerrit-PatchSet: 5 Gerrit-Owner: Bartłomiej Grzesik <bgrzesik(a)google.com> Gerrit-Reviewer: Jakub "Kuba" Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Konrad Adamczyk <konrada(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org>

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[S] Change in coreboot[main]: Add allocation of a buffer for pvmfw within cbmem
by Julius Werner (Code Review) 05 Apr '25

05 Apr '25

Attention is currently required from: Bartłomiej Grzesik, Konrad Adamczyk, Paul Menzel, Yu-Ping Wu. Julius Werner has posted comments on this change by Bartłomiej Grzesik. ( https://review.coreboot.org/c/coreboot/+/87107?usp=email ) Change subject: Add allocation of a buffer for pvmfw within cbmem ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/87107?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I48efc033ac0f5fbfcf3a52fabf40be016cd4c6f7 Gerrit-Change-Number: 87107 Gerrit-PatchSet: 4 Gerrit-Owner: Bartłomiej Grzesik <bgrzesik(a)google.com> Gerrit-Reviewer: Jakub "Kuba" Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Konrad Adamczyk <konrada(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Konrad Adamczyk <konrada(a)google.com> Gerrit-Attention: Bartłomiej Grzesik <bgrzesik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Sat, 05 Apr 2025 00:24:08 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: mb/starlabs/starbook/mtl: Uncomment eSPI GPIOs
by Matt DeVillier (Code Review) 04 Apr '25

04 Apr '25

Attention is currently required from: Sean Rhodes. Matt DeVillier has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/87178?usp=email ) Change subject: mb/starlabs/starbook/mtl: Uncomment eSPI GPIOs ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/87178?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie013ce1769e61fae1622a9cc1a048229fd9d6944 Gerrit-Change-Number: 87178 Gerrit-PatchSet: 1 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Comment-Date: Fri, 04 Apr 2025 20:29:00 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: mb/starlabs/starbook/tgl: Tidy GPIO comments for SATA
by Matt DeVillier (Code Review) 04 Apr '25

04 Apr '25

Attention is currently required from: Sean Rhodes. Matt DeVillier has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/87173?usp=email ) Change subject: mb/starlabs/starbook/tgl: Tidy GPIO comments for SATA ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/87173?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iee7121aef28618c0877c97cf454dc1a279758c21 Gerrit-Change-Number: 87173 Gerrit-PatchSet: 1 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Comment-Date: Fri, 04 Apr 2025 20:28:31 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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coreboot-gerrit April 2025