coreboot-gerrit April 2025

coreboot-gerrit@coreboot.org

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[XS] Change in coreboot[main]: util/cbfstool/fmaptool.c: Require FMAP_SECTION_FLASH_START == 0
by Maximilian Brune (Code Review) 05 Apr '25

05 Apr '25

Attention is currently required from: Julius Werner. Maximilian Brune has posted comments on this change by Maximilian Brune. ( https://review.coreboot.org/c/coreboot/+/86770?usp=email ) Change subject: util/cbfstool/fmaptool.c: Require FMAP_SECTION_FLASH_START == 0 ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: > Why put this in the code generator in fmaptool? The way I see this, fmaptool is a generic utility th […] I wanted to put it as close as possible to the FMAP_SECTION_FLASH_START, but I agree that it is a generic tool and should not include coreboot specifics. How about putting it in `src/include/fmap.h` ? -- To view, visit https://review.coreboot.org/c/coreboot/+/86770?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iba04ebdcd5557664a865d2854028dd811f052249 Gerrit-Change-Number: 86770 Gerrit-PatchSet: 1 Gerrit-Owner: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Comment-Date: Sat, 05 Apr 2025 18:43:39 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org>

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[M] Change in coreboot[main]: mb/starlabs/starbook/mtl: Remove comments for disconnected GPIOs
by Matt DeVillier (Code Review) 05 Apr '25

05 Apr '25

Matt DeVillier has submitted this change. ( https://review.coreboot.org/c/coreboot/+/87129?usp=email ) Change subject: mb/starlabs/starbook/mtl: Remove comments for disconnected GPIOs ...................................................................... mb/starlabs/starbook/mtl: Remove comments for disconnected GPIOs Change-Id: I24c7529fdf606268d1ed1b838912b6448520d816 Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/87129 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier(a)gmail.com> --- M src/mainboard/starlabs/starbook/variants/mtl/gpio.c 1 file changed, 0 insertions(+), 188 deletions(-) Approvals: build bot (Jenkins): Verified Matt DeVillier: Looks good to me, approved diff --git a/src/mainboard/starlabs/starbook/variants/mtl/gpio.c b/src/mainboard/starlabs/starbook/variants/mtl/gpio.c index 63fd7f5..c8ca838 100644 --- a/src/mainboard/starlabs/starbook/variants/mtl/gpio.c +++ b/src/mainboard/starlabs/starbook/variants/mtl/gpio.c @@ -89,349 +89,161 @@ PAD_CFG_GPO(GPP_F20, 0, RSMRST), /* SVID [ Present / Disabled ] */ PAD_CFG_GPO(GPP_F21, 0, RSMRST), /* CCD [ BSSB-LS / BALTIC ] */ - /* V02: PCIE_WAKE_LAN */ PAD_NC(GPP_V02, NONE), - /* V06: GPD_6_SLP_A_N */ PAD_NC(GPP_V06, NONE), - /* V07: */ PAD_NC(GPP_V07, NONE), - /* V09: GPD_9_SLP_WLAN_N */ PAD_NC(GPP_V09, NONE), - /* V10: PM_SLP_S5_N */ PAD_NC(GPP_V10, NONE), - /* V11: LANPHY_ENABLE */ PAD_NC(GPP_V11, NONE), - /* V12: SLP_LAN_N */ PAD_NC(GPP_V12, NONE), - /* V13 */ PAD_NC(GPP_V13, NONE), - /* V14: WAKE_N */ PAD_NC(GPP_V14, NONE), - /* V15: */ PAD_NC(GPP_V15, NONE), - /* V16: */ PAD_NC(GPP_V16, NONE), - /* V17: */ PAD_NC(GPP_V17, NONE), - /* V18: */ PAD_NC(GPP_V18, NONE), - /* V19: */ PAD_NC(GPP_V19, NONE), - /* V20: */ PAD_NC(GPP_V20, NONE), - /* V21: */ PAD_NC(GPP_V21, NONE), - /* V22: */ PAD_NC(GPP_V22, NONE), - /* V23: */ PAD_NC(GPP_V23, NONE), - /* - * GPP_C - * Start: GPP_C00 - * End: GPP_C23 - */ - /* C03: SML0_CLK */ PAD_NC(GPP_C03, NONE), - /* C04: SML0_DATA */ PAD_NC(GPP_C04, NONE), - /* C08: SML1ALERT */ PAD_NC(GPP_C08, NONE), - /* C09: */ PAD_NC(GPP_C09, NONE), - /* C10: */ PAD_NC(GPP_C10, NONE), - /* C11: */ PAD_NC(GPP_C11, NONE), - /* C12: CLKREQ3 */ PAD_NC(GPP_C12, NONE), - /* C13: */ PAD_NC(GPP_C13, NONE), - /* C14: */ PAD_NC(GPP_C14, NONE), - /* C15: */ PAD_NC(GPP_C15, NONE), - /* C16: */ PAD_NC(GPP_C16, NONE), - /* C17: */ PAD_NC(GPP_C17, NONE), - /* C18: */ PAD_NC(GPP_C18, NONE), - /* C19: */ PAD_NC(GPP_C19, NONE), - /* C20: */ PAD_NC(GPP_C20, NONE), - /* C21: */ PAD_NC(GPP_C21, NONE), - /* C22: */ PAD_NC(GPP_C22, NONE), - /* C23: */ PAD_NC(GPP_C23, NONE), - /* - * GPP_A - * Start: GPP_A00 - * End: GPP_A23 - */ - /* A07: */ PAD_NC(GPP_A07, NONE), - /* A08: */ PAD_NC(GPP_A08, NONE), - /* A09: */ PAD_NC(GPP_A09, NONE), - /* A10: */ PAD_NC(GPP_A10, NONE), - /* A11: */ PAD_NC(GPP_A11, NONE), - /* A12: WLAN_PEWAKE */ PAD_NC(GPP_A12, NONE), - /* A13: */ PAD_NC(GPP_A13, NONE), - /* A14: */ PAD_NC(GPP_A14, NONE), - /* A15: */ PAD_NC(GPP_A15, NONE), - /* A16: */ PAD_NC(GPP_A16, NONE), - /* A17: EC_SLP_S0_CS_N */ PAD_NC(GPP_A17, NONE), - /* A18: */ PAD_NC(GPP_A18, NONE), - /* A19: */ PAD_NC(GPP_A19, NONE), - /* A22: */ PAD_NC(GPP_A22, NONE), - /* A23: */ PAD_NC(GPP_A23, NONE), - /* - * GPP_E - * Start: GPP_E00 - * End: GPP_E23 - */ - /* E00: */ PAD_NC(GPP_E00, NONE), - /* E01: */ PAD_NC(GPP_E01, NONE), - /* E02: */ PAD_NC(GPP_E02, NONE), - /* E03: */ PAD_NC(GPP_E03, NONE), - /* E04: M.2_SSD_DEVSLP0 */ PAD_NC(GPP_E04, NONE), - /* E05: */ PAD_NC(GPP_E05, NONE), - /* E07: */ PAD_NC(GPP_E07, NONE), - /* E08: */ PAD_NC(GPP_E08, NONE), - /* E09: USB2_OC0 */ PAD_NC(GPP_E09, NONE), - /* E10: */ PAD_NC(GPP_E10, NONE), - /* E11: */ PAD_NC(GPP_E11, NONE), - /* E12: */ PAD_NC(GPP_E12, NONE), - /* E13: */ PAD_NC(GPP_E13, NONE), - /* E15: BOOTHALT_N */ PAD_NC(GPP_E15, NONE), - /* E17: */ PAD_NC(GPP_E17, NONE), - /* E18: */ PAD_NC(GPP_E18, NONE), - /* E19: */ PAD_NC(GPP_E19, NONE), - /* E20: */ PAD_NC(GPP_E20, NONE), - /* E21: */ PAD_NC(GPP_E21, NONE), - /* E22: */ PAD_NC(GPP_E22, NONE), - /* E23: */ PAD_NC(GPP_E23, NONE), - /* - * GPP_H - * Start: GPP_H00 - * End: GPP_H23 - */ - /* H00: */ PAD_NC(GPP_H00, NONE), - /* H03: */ PAD_NC(GPP_H03, NONE), - /* H04: */ PAD_NC(GPP_H04, NONE), - /* H05: */ PAD_NC(GPP_H05, NONE), - /* H06: */ PAD_NC(GPP_H06, NONE), - /* H10: */ PAD_NC(GPP_H10, NONE), - /* H11: */ PAD_NC(GPP_H11, NONE), - /* H12: */ PAD_NC(GPP_H12, NONE), - /* H14: */ PAD_NC(GPP_H14, NONE), - /* H15: */ PAD_NC(GPP_H15, NONE), - /* H18: */ PAD_NC(GPP_H18, NONE), - /* H21: */ PAD_NC(GPP_H21, NONE), - /* H22: */ PAD_NC(GPP_H22, NONE), - /* H23: */ PAD_NC(GPP_H23, NONE), - /* - * GPP_F - * Start: GPP_F00 - * End: GPP_F23 - */ - /* F00: CNV_BRI_DT */ PAD_NC(GPP_F00, NONE), - /* F01: CNV_BRI_RSP */ PAD_NC(GPP_F01, NONE), - /* F03: CNV_RGI_RSP */ PAD_NC(GPP_F03, NONE), - /* F04: CNVI_RF_RESET_N */ PAD_NC(GPP_F04, NONE), - /* F05: MODEM_CLKREQ */ PAD_NC(GPP_F05, NONE), - /* F06: */ PAD_NC(GPP_F06, NONE), - /* F07: */ PAD_NC(GPP_F07, NONE), - /* F08: */ PAD_NC(GPP_F08, NONE), - /* F09: */ PAD_NC(GPP_F09, NONE), - /* F10: SATAXPCIE_1_SATAGP_1 */ PAD_NC(GPP_F10, NONE), - /* F11: */ PAD_NC(GPP_F11, NONE), - /* F12: */ PAD_NC(GPP_F12, NONE), - /* F14: */ PAD_NC(GPP_F14, NONE), - /* F15: */ PAD_NC(GPP_F15, NONE), - /* F16: */ PAD_NC(GPP_F16, NONE), - /* F17: */ PAD_NC(GPP_F17, NONE), - /* F18: */ PAD_NC(GPP_F18, NONE), - /* F19: */ PAD_NC(GPP_F19, NONE), - /* F22: */ PAD_NC(GPP_F22, NONE), - /* F23: */ PAD_NC(GPP_F23, NONE), - /* - * GPP_S - * Start: GPP_S00 - * End: GPP_S07 - */ - /* S00: */ PAD_NC(GPP_S00, NONE), - /* S01: */ PAD_NC(GPP_S01, NONE), - /* S02: */ PAD_NC(GPP_S02, NONE), - /* S03: */ PAD_NC(GPP_S03, NONE), - /* S04: */ PAD_NC(GPP_S04, NONE), - /* S05: */ PAD_NC(GPP_S05, NONE), - /* S06: */ PAD_NC(GPP_S06, NONE), - /* S07: */ PAD_NC(GPP_S07, NONE), - /* - * GPP_B - * Start: GPP_B00 - * End: GPP_B23 - */ - /* B01: */ PAD_NC(GPP_B01, NONE), - /* B02: */ PAD_NC(GPP_B02, NONE), - /* B03: */ PAD_NC(GPP_B03, NONE), - /* B05: */ PAD_NC(GPP_B05, NONE), - /* B06: */ PAD_NC(GPP_B06, NONE), - /* B07: */ PAD_NC(GPP_B07, NONE), - /* B08: */ PAD_NC(GPP_B08, NONE), - /* B09: */ PAD_NC(GPP_B09, NONE), - /* B10: */ PAD_NC(GPP_B10, NONE), - /* B11: */ PAD_NC(GPP_B11, NONE), - /* B12: */ PAD_NC(GPP_B12, NONE), - /* B15: */ PAD_NC(GPP_B15, NONE), - /* B17: */ PAD_NC(GPP_B17, NONE), - /* B20: */ PAD_NC(GPP_B20, NONE), - /* B21: */ PAD_NC(GPP_B21, NONE), - /* B22: */ PAD_NC(GPP_B22, NONE), - /* B23: */ PAD_NC(GPP_B23, NONE), - /* - * GPP_D - * Start: GPP_D00 - * End: GPP_D23 - */ - /* D00: */ PAD_NC(GPP_D00, NONE), - /* D01: */ PAD_NC(GPP_D01, NONE), - /* D02: */ PAD_NC(GPP_D02, NONE), - /* D03: */ PAD_NC(GPP_D03, NONE), - /* D04: */ PAD_NC(GPP_D04, NONE), - /* D05: */ PAD_NC(GPP_D05, NONE), - /* D06: SML0BALERT# */ PAD_NC(GPP_D06, NONE), - /* D07: */ PAD_NC(GPP_D07, NONE), - /* D08: */ PAD_NC(GPP_D08, NONE), - /* D09: */ PAD_NC(GPP_D09, NONE), - /* D14: */ PAD_NC(GPP_D14, NONE), - /* D15: */ PAD_NC(GPP_D15, NONE), - /* D16: */ PAD_NC(GPP_D16, NONE), - /* D18: */ PAD_NC(GPP_D18, NONE), - /* D19: */ PAD_NC(GPP_D19, NONE), - /* D22: */ PAD_NC(GPP_D22, NONE), - /* D23: */ PAD_NC(GPP_D23, NONE), }; -- To view, visit https://review.coreboot.org/c/coreboot/+/87129?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I24c7529fdf606268d1ed1b838912b6448520d816 Gerrit-Change-Number: 87129 Gerrit-PatchSet: 5 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[XS] Change in coreboot[main]: mb/starlabs/{starbook/adl_n,starlite_adl}: Add missing config for TBT...
by Matt DeVillier (Code Review) 05 Apr '25

05 Apr '25

Matt DeVillier has submitted this change. ( https://review.coreboot.org/c/coreboot/+/87163?usp=email ) Change subject: mb/starlabs/{starbook/adl_n,starlite_adl}: Add missing config for TBT LSX 2 ...................................................................... mb/starlabs/{starbook/adl_n,starlite_adl}: Add missing config for TBT LSX 2 Change-Id: Id7cf723e354a98a760b9535309d1d9a8189d21ad Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/87163 Reviewed-by: Matt DeVillier <matt.devillier(a)gmail.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/starlabs/starbook/variants/adl_n/gpio.c M src/mainboard/starlabs/starlite_adl/variants/mk_v/gpio.c 2 files changed, 2 insertions(+), 2 deletions(-) Approvals: build bot (Jenkins): Verified Matt DeVillier: Looks good to me, approved diff --git a/src/mainboard/starlabs/starbook/variants/adl_n/gpio.c b/src/mainboard/starlabs/starbook/variants/adl_n/gpio.c index 7d15cb9..1e4899b 100644 --- a/src/mainboard/starlabs/starbook/variants/adl_n/gpio.c +++ b/src/mainboard/starlabs/starbook/variants/adl_n/gpio.c @@ -89,6 +89,7 @@ PAD_CFG_GPO(GPP_F2, 1, RSMRST), /* M.2 CNVi [ Enabled / Disabled ] */ PAD_CFG_GPO(GPP_E19, 0, RSMRST), /* TBT LSX #0 [ 1.8V / 3.3V ] */ PAD_CFG_GPO(GPP_E21, 0, RSMRST), /* TBT LSX #1 [ 1.8V / 3.3V ] */ + PAD_CFG_GPO(GPP_D10, 0, RSMRST), /* TBT LSX #2 [ 1.8V / 3.3V ] */ PAD_CFG_GPO(GPP_D12, 0, RSMRST), /* TBT LSX #3 [ 1.8V / 3.3V ] */ PAD_CFG_GPO(GPP_F7, 0, RSMRST), /* MCRO LDO [ Disabled / Bypass ] */ PAD_CFG_GPO(GPD7, 0, RSMRST), /* RTC Clock Delay [ Disabled / 95ms ] */ @@ -162,7 +163,6 @@ PAD_NC(GPP_D7, NONE), PAD_NC(GPP_D8, NONE), PAD_NC(GPP_D9, NONE), - PAD_NC(GPP_D10, NONE), PAD_NC(GPP_D11, NONE), PAD_NC(GPP_D13, NONE), PAD_NC(GPP_D14, NONE), diff --git a/src/mainboard/starlabs/starlite_adl/variants/mk_v/gpio.c b/src/mainboard/starlabs/starlite_adl/variants/mk_v/gpio.c index bd22c92..2b0e710 100644 --- a/src/mainboard/starlabs/starlite_adl/variants/mk_v/gpio.c +++ b/src/mainboard/starlabs/starlite_adl/variants/mk_v/gpio.c @@ -99,6 +99,7 @@ PAD_CFG_GPO(GPP_H1, 0, RSMRST), /* BFX Strap 2 Bit 3 [ Disabled / Enabled ] */ PAD_CFG_GPO(GPP_E19, 0, RSMRST), /* TBT LSX #0 [ 1.8V / 3.3V ] */ PAD_CFG_GPO(GPP_E21, 0, RSMRST), /* TBT LSX #1 [ 1.8V / 3.3V ] */ + PAD_CFG_GPO(GPP_D10, 0, RSMRST), /* TBT LSX #2 [ 1.8V / 3.3V ] */ PAD_CFG_GPO(GPP_D12, 0, RSMRST), /* TBT LSX #3 [ 1.8V / 3.3V ] */ PAD_CFG_GPO(GPP_F7, 0, RSMRST), /* MCRO LDO [ Disabled / Bypass ] */ PAD_CFG_GPO(GPD7, 0, RSMRST), /* RTC Clock Delay [ Disabled / 95ms ] */ @@ -173,7 +174,6 @@ PAD_NC(GPP_D7, NONE), PAD_NC(GPP_D8, NONE), PAD_NC(GPP_D9, NONE), - PAD_NC(GPP_D10, NONE), PAD_NC(GPP_D11, NONE), PAD_NC(GPP_D13, NONE), PAD_NC(GPP_D14, NONE), -- To view, visit https://review.coreboot.org/c/coreboot/+/87163?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Id7cf723e354a98a760b9535309d1d9a8189d21ad Gerrit-Change-Number: 87163 Gerrit-PatchSet: 2 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[XS] Change in coreboot[main]: mb/starlabs/starfighter: Remove duplicate entry for GPP_B13
by Matt DeVillier (Code Review) 05 Apr '25

05 Apr '25

Matt DeVillier has submitted this change. ( https://review.coreboot.org/c/coreboot/+/87160?usp=email ) Change subject: mb/starlabs/starfighter: Remove duplicate entry for GPP_B13 ...................................................................... mb/starlabs/starfighter: Remove duplicate entry for GPP_B13 Change-Id: I8ed1ee8389e5e32ec9ddcefeb2c146281de50adb Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/87160 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier(a)gmail.com> --- M src/mainboard/starlabs/starfighter/variants/rpl/gpio.c 1 file changed, 0 insertions(+), 2 deletions(-) Approvals: build bot (Jenkins): Verified Matt DeVillier: Looks good to me, approved diff --git a/src/mainboard/starlabs/starfighter/variants/rpl/gpio.c b/src/mainboard/starlabs/starfighter/variants/rpl/gpio.c index e1445fc..85970a1 100644 --- a/src/mainboard/starlabs/starfighter/variants/rpl/gpio.c +++ b/src/mainboard/starlabs/starfighter/variants/rpl/gpio.c @@ -165,8 +165,6 @@ PAD_NC(GPP_B10, NONE), /* B12: PM SLP S0 */ PAD_NC(GPP_B12, NONE), - /* B13: PLT RST */ - PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1), /* B14: Not Connected */ PAD_NC(GPP_B14, NONE), /* B15: Not Connected */ -- To view, visit https://review.coreboot.org/c/coreboot/+/87160?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I8ed1ee8389e5e32ec9ddcefeb2c146281de50adb Gerrit-Change-Number: 87160 Gerrit-PatchSet: 3 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[S] Change in coreboot[main]: mb/starlabs/starfighter: Tidy GPIO comments for the retimers
by Matt DeVillier (Code Review) 05 Apr '25

05 Apr '25

Matt DeVillier has submitted this change. ( https://review.coreboot.org/c/coreboot/+/87159?usp=email ) Change subject: mb/starlabs/starfighter: Tidy GPIO comments for the retimers ...................................................................... mb/starlabs/starfighter: Tidy GPIO comments for the retimers This is a non-functional change, and only makes the GPIOs easier to read. Change-Id: Ia724e342651e064ca095f9f3f1153d86f0a73a46 Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/87159 Reviewed-by: Matt DeVillier <matt.devillier(a)gmail.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/starlabs/starfighter/variants/rpl/gpio.c 1 file changed, 7 insertions(+), 10 deletions(-) Approvals: Matt DeVillier: Looks good to me, approved build bot (Jenkins): Verified diff --git a/src/mainboard/starlabs/starfighter/variants/rpl/gpio.c b/src/mainboard/starlabs/starfighter/variants/rpl/gpio.c index 2491140..e1445fc 100644 --- a/src/mainboard/starlabs/starfighter/variants/rpl/gpio.c +++ b/src/mainboard/starlabs/starfighter/variants/rpl/gpio.c @@ -74,6 +74,13 @@ PAD_CFG_NF(GPP_C6, NONE, DEEP, NF1), /* SML Clock */ PAD_CFG_NF(GPP_C7, NONE, DEEP, NF1), /* SML Data */ + /* Retimer */ + PAD_CFG_NF(GPP_E18, NONE, DEEP, NF2), /* TBT0 TXD */ + PAD_CFG_NF(GPP_E19, NONE, DEEP, NF2), /* TBT0 RXD */ + PAD_CFG_NF(GPP_E20, NONE, DEEP, NF4), /* TBT1 TXD */ + PAD_CFG_NF(GPP_E21, NONE, DEEP, NF4), /* TBT1 RXD */ + PAD_CFG_GPO(GPP_E4, 0, DEEP), /* Force Power */ + /* High-Definition Audio */ PAD_CFG_NF(GPP_R0, NATIVE, DEEP, NF1), /* Clock */ PAD_CFG_NF(GPP_R1, NATIVE, DEEP, NF1), /* Sync */ @@ -265,8 +272,6 @@ PAD_NC(GPP_E1, NONE), /* E2: Not Connected */ PAD_NC(GPP_E2, NONE), - /* E4: Retimer Force Power */ - PAD_CFG_GPO(GPP_E4, 0, DEEP), /* E5: Not Connected */ PAD_NC(GPP_E5, NONE), /* E6: JTAG ODT No internal PD @@ -291,14 +296,6 @@ PAD_NC(GPP_E16, NONE), /* E17: Not Connected */ PAD_NC(GPP_E17, NONE), - /* E18: TBT_LSX0_TXD */ - PAD_CFG_NF(GPP_E18, NONE, DEEP, NF2), - /* E19: TBT_LSX0_RXD */ - PAD_CFG_NF(GPP_E19, NONE, DEEP, NF2), - /* E20: TBT_LSX1_TXD */ - PAD_CFG_NF(GPP_E20, NONE, DEEP, NF4), - /* E21: TBT_LSX1_RXD */ - PAD_CFG_NF(GPP_E21, NONE, DEEP, NF4), /* E22: Not Connected */ PAD_NC(GPP_E22, NONE), /* E23: Not Connected */ -- To view, visit https://review.coreboot.org/c/coreboot/+/87159?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia724e342651e064ca095f9f3f1153d86f0a73a46 Gerrit-Change-Number: 87159 Gerrit-PatchSet: 3 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[XS] Change in coreboot[main]: mb/starlabs/starfighter: Disconnect PEDET GPIO
by Matt DeVillier (Code Review) 05 Apr '25

05 Apr '25

Matt DeVillier has submitted this change. ( https://review.coreboot.org/c/coreboot/+/87158?usp=email ) Change subject: mb/starlabs/starfighter: Disconnect PEDET GPIO ...................................................................... mb/starlabs/starfighter: Disconnect PEDET GPIO These boards do not support SATA, so this is not needed. Change-Id: Iff9a30cf2e8b65649440b33f850f07d499baa073 Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/87158 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier(a)gmail.com> --- M src/mainboard/starlabs/starfighter/variants/rpl/gpio.c 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Matt DeVillier: Looks good to me, approved diff --git a/src/mainboard/starlabs/starfighter/variants/rpl/gpio.c b/src/mainboard/starlabs/starfighter/variants/rpl/gpio.c index ed9c94d..2491140 100644 --- a/src/mainboard/starlabs/starfighter/variants/rpl/gpio.c +++ b/src/mainboard/starlabs/starfighter/variants/rpl/gpio.c @@ -120,7 +120,7 @@ /* A11: Not Connected */ PAD_NC(GPP_A11, NONE), /* A12: PCH M.2 SSD PEDET */ - PAD_CFG_NF(GPP_A12, NONE, DEEP, NF1), + PAD_NC(GPP_A12, NONE), /* A14: Test Point 45 */ PAD_NC(GPP_A14, NONE), /* A15: Test Point 52 */ -- To view, visit https://review.coreboot.org/c/coreboot/+/87158?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iff9a30cf2e8b65649440b33f850f07d499baa073 Gerrit-Change-Number: 87158 Gerrit-PatchSet: 2 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[S] Change in coreboot[main]: mb/starlabs/starfighter: Tidy GPIO comments for the second SSD
by Matt DeVillier (Code Review) 05 Apr '25

05 Apr '25

Matt DeVillier has submitted this change. ( https://review.coreboot.org/c/coreboot/+/87157?usp=email ) Change subject: mb/starlabs/starfighter: Tidy GPIO comments for the second SSD ...................................................................... mb/starlabs/starfighter: Tidy GPIO comments for the second SSD This is a non-functional change, and only makes the GPIOs easier to read. Change-Id: I879819e028b71137010a21ddcc0ee6b1dafb7936 Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/87157 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier(a)gmail.com> --- M src/mainboard/starlabs/starfighter/variants/rpl/gpio.c 1 file changed, 5 insertions(+), 6 deletions(-) Approvals: Matt DeVillier: Looks good to me, approved build bot (Jenkins): Verified diff --git a/src/mainboard/starlabs/starfighter/variants/rpl/gpio.c b/src/mainboard/starlabs/starfighter/variants/rpl/gpio.c index 0b02a72..ed9c94d 100644 --- a/src/mainboard/starlabs/starfighter/variants/rpl/gpio.c +++ b/src/mainboard/starlabs/starfighter/variants/rpl/gpio.c @@ -54,6 +54,11 @@ PAD_CFG_GPO(GPP_F20, 1, PLTRST), /* Reset */ PAD_CFG_GPO(GPP_D14, 1, DEEP), /* Enable */ + /* SSD 2 */ + PAD_CFG_NF(GPP_H19, NONE, DEEP, NF1), /* Clock Request 2 */ + PAD_CFG_GPO(GPP_H0, 1, PLTRST), /* Reset */ + PAD_CFG_GPO(GPP_D16, 1, PLTRST), /* Enable */ + /* Wireless */ PAD_CFG_NF(GPP_D7, NONE, DEEP, NF1), /* Clock Request 1 */ PAD_CFG_GPO(GPP_H2, 1, PLTRST), /* Reset */ @@ -247,8 +252,6 @@ PAD_NC(GPP_D13, NONE), /* D15: Not Connected */ PAD_NC(GPP_D15, NONE), - /* D16: PCH M.2 SSD Power Enable */ - PAD_CFG_GPO(GPP_D16, 1, PLTRST), /* D17: Not used Fingerprint ID */ PAD_NC(GPP_D17, NONE), /* D18: Trackpad reset */ @@ -342,8 +345,6 @@ /* F23: Not Connected */ PAD_NC(GPP_F23, NONE), - /* H0: PCH M.2 SSD Reset */ - PAD_CFG_GPO(GPP_H0, 1, PLTRST), /* H1: BFX Strap 2 Bit 3 Weak Internal PD 20K */ PAD_CFG_GPO(GPP_H1, 0, DEEP), /* H3: Not Connected */ @@ -364,8 +365,6 @@ PAD_NC(GPP_H14, NONE), /* H16: Not Connected */ PAD_NC(GPP_H16, NONE), - /* H19: Clock Request 4 CPU M.2 SSD */ - PAD_CFG_NF(GPP_H19, NONE, DEEP, NF1), /* H20: Not Connected */ PAD_NC(GPP_H20, NONE), /* H21: Not Connected */ -- To view, visit https://review.coreboot.org/c/coreboot/+/87157?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I879819e028b71137010a21ddcc0ee6b1dafb7936 Gerrit-Change-Number: 87157 Gerrit-PatchSet: 2 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[XS] Change in coreboot[main]: mb/starlabs/starfighter: Disconnect USB OverCurrent GPIOs
by Matt DeVillier (Code Review) 05 Apr '25

05 Apr '25

Matt DeVillier has submitted this change. ( https://review.coreboot.org/c/coreboot/+/87156?usp=email ) Change subject: mb/starlabs/starfighter: Disconnect USB OverCurrent GPIOs ...................................................................... mb/starlabs/starfighter: Disconnect USB OverCurrent GPIOs These are not used so configure them accordingly. Change-Id: I6c4d793210e3c869e4f500b18a1229c5c4d40f60 Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/87156 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier(a)gmail.com> --- M src/mainboard/starlabs/starfighter/variants/rpl/gpio.c 1 file changed, 2 insertions(+), 2 deletions(-) Approvals: build bot (Jenkins): Verified Matt DeVillier: Looks good to me, approved diff --git a/src/mainboard/starlabs/starfighter/variants/rpl/gpio.c b/src/mainboard/starlabs/starfighter/variants/rpl/gpio.c index 30c13a6..0b02a72 100644 --- a/src/mainboard/starlabs/starfighter/variants/rpl/gpio.c +++ b/src/mainboard/starlabs/starfighter/variants/rpl/gpio.c @@ -121,7 +121,7 @@ /* A15: Test Point 52 */ PAD_NC(GPP_A15, NONE), /* A16: USB OverCurrent 3 */ - PAD_CFG_NF(GPP_A16, NONE, DEEP, NF1), + PAD_NC(GPP_A16, NONE), /* A17: Not Connected */ PAD_NC(GPP_A17, NONE), /* A19: Not Connected */ @@ -273,7 +273,7 @@ /* E7: Embedded Controller SMI */ PAD_NC(GPP_E7, NONE), /* E9: USB OverCurrent 0 */ - PAD_CFG_NF(GPP_E9, NONE, DEEP, NF1), + PAD_NC(GPP_E9, NONE), /* E10: Not Connected */ PAD_NC(GPP_E10, NONE), /* E11: Not Connected */ -- To view, visit https://review.coreboot.org/c/coreboot/+/87156?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6c4d793210e3c869e4f500b18a1229c5c4d40f60 Gerrit-Change-Number: 87156 Gerrit-PatchSet: 2 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[XS] Change in coreboot[main]: mb/starlabs/starbook/tgl: Move Core Vendor GPIOs to PCH group
by Matt DeVillier (Code Review) 05 Apr '25

05 Apr '25

Matt DeVillier has submitted this change. ( https://review.coreboot.org/c/coreboot/+/87155?usp=email ) Change subject: mb/starlabs/starbook/tgl: Move Core Vendor GPIOs to PCH group ...................................................................... mb/starlabs/starbook/tgl: Move Core Vendor GPIOs to PCH group Change-Id: Icb3f83c9a308a7a097be1858d6db53faa1d6e1b5 Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/87155 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier(a)gmail.com> --- M src/mainboard/starlabs/starbook/variants/tgl/gpio.c 1 file changed, 2 insertions(+), 4 deletions(-) Approvals: build bot (Jenkins): Verified Matt DeVillier: Looks good to me, approved diff --git a/src/mainboard/starlabs/starbook/variants/tgl/gpio.c b/src/mainboard/starlabs/starbook/variants/tgl/gpio.c index f4d4db0..8705b13 100644 --- a/src/mainboard/starlabs/starbook/variants/tgl/gpio.c +++ b/src/mainboard/starlabs/starbook/variants/tgl/gpio.c @@ -61,6 +61,8 @@ /* PCH */ PAD_CFG_NF(GPP_H18, NONE, DEEP, NF1), /* C10 Gate */ PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1), /* Platform Reset */ + PAD_CFG_NF(GPP_B0, NONE, DEEP, NF1), /* Vendor ID 0 */ + PAD_CFG_NF(GPP_B1, NONE, DEEP, NF1), /* Vendor ID 1 */ /* TPM */ PAD_CFG_GPI_APIC_LOW(GPP_C14, NONE, PLTRST), /* Interrupt */ @@ -114,10 +116,6 @@ /* A23: TC_RETIMER_FORCE_PWR */ PAD_CFG_GPO(GPP_A23, 0, DEEP), - /* B0: CORE_VID_0 */ - PAD_CFG_NF(GPP_B0, NONE, DEEP, NF1), - /* B1: CORE_VID_1 */ - PAD_CFG_NF(GPP_B1, NONE, DEEP, NF1), /* B2: VRALERT_N */ PAD_NC(GPP_B2, NONE), /* B3: Not Connected */ -- To view, visit https://review.coreboot.org/c/coreboot/+/87155?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Icb3f83c9a308a7a097be1858d6db53faa1d6e1b5 Gerrit-Change-Number: 87155 Gerrit-PatchSet: 2 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[S] Change in coreboot[main]: mb/starlabs/starbook/mtl: Disconnect unused GPIOs
by Matt DeVillier (Code Review) 05 Apr '25

05 Apr '25

Matt DeVillier has submitted this change. ( https://review.coreboot.org/c/coreboot/+/87128?usp=email ) ( 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: mb/starlabs/starbook/mtl: Disconnect unused GPIOs ...................................................................... mb/starlabs/starbook/mtl: Disconnect unused GPIOs These pins are not connected, so configure them accordingly. Change-Id: I3cf06a0945a7793592e6599dfd4048a6114d1563 Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/87128 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier(a)gmail.com> --- M src/mainboard/starlabs/starbook/variants/mtl/gpio.c 1 file changed, 5 insertions(+), 9 deletions(-) Approvals: Matt DeVillier: Looks good to me, approved build bot (Jenkins): Verified diff --git a/src/mainboard/starlabs/starbook/variants/mtl/gpio.c b/src/mainboard/starlabs/starbook/variants/mtl/gpio.c index 333d555..63fd7f5 100644 --- a/src/mainboard/starlabs/starbook/variants/mtl/gpio.c +++ b/src/mainboard/starlabs/starbook/variants/mtl/gpio.c @@ -149,9 +149,8 @@ PAD_NC(GPP_C13, NONE), /* C14: */ PAD_NC(GPP_C14, NONE), - /* C15: RESERVED - * WEAK INTERNAL PD 20K */ - PAD_CFG_GPO(GPP_C15, 0, DEEP), + /* C15: */ + PAD_NC(GPP_C15, NONE), /* C16: */ PAD_NC(GPP_C16, NONE), /* C17: */ @@ -237,7 +236,7 @@ /* E13: */ PAD_NC(GPP_E13, NONE), /* E15: BOOTHALT_N */ - PAD_CFG_NF(GPP_E15, NONE, DEEP, NF2), + PAD_NC(GPP_E15, NONE), /* E17: */ PAD_NC(GPP_E17, NONE), /* E18: */ @@ -326,11 +325,8 @@ PAD_NC(GPP_F17, NONE), /* F18: */ PAD_NC(GPP_F18, NONE), - /* F19: ESPI FLASH SHARING - * HIGH: MASTER - * LOW: SLAVE - * WEAK INTERNAL PD 20K */ - PAD_CFG_GPO(GPP_F19, 0, DEEP), + /* F19: */ + PAD_NC(GPP_F19, NONE), /* F22: */ PAD_NC(GPP_F22, NONE), /* F23: */ -- To view, visit https://review.coreboot.org/c/coreboot/+/87128?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I3cf06a0945a7793592e6599dfd4048a6114d1563 Gerrit-Change-Number: 87128 Gerrit-PatchSet: 5 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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