coreboot-gerrit March 2025

coreboot-gerrit@coreboot.org

1 participants
2811 discussions

[XS] Change in coreboot[main]: mb/google/fatcat/var/felino: Add ALC1320 codec to devicetree
by Paul Menzel (Code Review) 31 Mar '25

31 Mar '25

Attention is currently required from: Jayvik Desai, Kapil Porwal, Mac Chiang, Pranava Y N, Subrata Banik, Weimin Wu. Paul Menzel has posted comments on this change by Weimin Wu. ( https://review.coreboot.org/c/coreboot/+/86747?usp=email ) Change subject: mb/google/fatcat/var/felino: Add ALC1320 codec to devicetree ...................................................................... Patch Set 6: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/86747/comment/bd5c5808_c355a83a?us… : PS5, Line 10: The ALC1320 soundwire class_id = 0x01 (MIPI_CLASS_SDCA) Sorry, I didn’t mean HDA verb, but a normal verb (noun, adjective), so it reads as a sentence. Something like below (if correct): > The ALC1320 soundwire class_id is MIPI_CLASS_SDCA (1). https://review.coreboot.org/c/coreboot/+/86747/comment/9b6c3838_4361b058?us… : PS5, Line 13: TEST=emerge-fatcat coreboot > yes, 1320 acpi is probed and registered r/w success. Please amend the commit message accordingly. -- To view, visit https://review.coreboot.org/c/coreboot/+/86747?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie8763888810f56eb45523e3bcf7ef082900b1225 Gerrit-Change-Number: 86747 Gerrit-PatchSet: 6 Gerrit-Owner: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Mac Chiang <mac.chiang(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Mac Chiang <mac.chiang(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Comment-Date: Mon, 31 Mar 2025 07:10:26 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Mac Chiang <mac.chiang(a)intel.com> Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org>

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[XS] Change in coreboot[main]: moxie: Remove wifi sar table for moxie
by David Wu (Code Review) 31 Mar '25

31 Mar '25

Attention is currently required from: Derek Huang, Dinesh Gehlot, Eric Lai, Jayvik Desai, Kapil Porwal, Lucas Chen, Nick Vaccaro, Subrata Banik. David Wu has posted comments on this change by Lucas Chen. ( https://review.coreboot.org/c/coreboot/+/87004?usp=email ) Change subject: moxie: Remove wifi sar table for moxie ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/87004?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I012ff2d9c8c4d6d4480cae7166bf8e633bcaa752 Gerrit-Change-Number: 87004 Gerrit-PatchSet: 2 Gerrit-Owner: Lucas Chen <lucas.chen(a)quanta.corp-partner.google.com> Gerrit-Reviewer: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Lucas Chen <lucas.chen(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Derek Huang <derekhuang(a)google.com> Gerrit-Attention: Lucas Chen <lucas.chen(a)quanta.corp-partner.google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Mon, 31 Mar 2025 05:56:29 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[M] Change in coreboot[main]: mb/google/brya/var/meliks: reset DPHY_CLOCK_LANE_TIMING
by Gareth Yu (Code Review) 31 Mar '25

31 Mar '25

Attention is currently required from: Dinesh Gehlot, Eric Lai, Gareth Yu, Gareth Yu, Jayvik Desai, Kapil Porwal, Lawrence Chang, Nick Vaccaro, Paul Menzel, SH Kim, Simon Yang, Subrata Banik. Gareth Yu has uploaded a new patch set (#25) to the change originally created by Lawrence Chang. ( https://review.coreboot.org/c/coreboot/+/86838?usp=email ) The following approvals got outdated and were removed: Verified-1 by build bot (Jenkins) Change subject: mb/google/brya/var/meliks: reset DPHY_CLOCK_LANE_TIMING ...................................................................... mb/google/brya/var/meliks: reset DPHY_CLOCK_LANE_TIMING According to the analysis results, resetting the DSI DPHY to default during a warm boot is needed if 'You are in developer mode' needs to be displayed on the screen in a system using the MIPI-DSI panel. DPHY_0_CLOCK_LANE_TIMING -- address:0x162180, size: 32 bits [31]: CLK_PREPARE Override. 0:HW maintains, 1:SW overrides [30..28]: CLK_PREPARE [27]: CLK_ZERO Override. 0:HW maintains, 1:SW overrides [23..20]: CLK_ZERO [19]: CLK_PRE Override. 0:HW maintains, 1:SW overrides [17..16]: CLK_PRE [15]: CLK_POST Override. 0:HW maintains, 1:SW overrides [10..8]: CLK_POST [7]: CLK_TRAIL Override. 0:HW maintains, 1:SW overrides [2..0]: CLK_TRAIL BUG=b:397805262 TEST=Able to show 'You are in developer mode' Change-Id: I7857c4f71fc7d1d0c5069a462bdd70c8dbb78179 Signed-off-by: Gareth Yu <gareth.yu(a)intel.com> --- M src/mainboard/google/brya/variants/meliks/Makefile.mk A src/mainboard/google/brya/variants/meliks/ramstage.c 2 files changed, 59 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/86838/25 -- To view, visit https://review.coreboot.org/c/coreboot/+/86838?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7857c4f71fc7d1d0c5069a462bdd70c8dbb78179 Gerrit-Change-Number: 86838 Gerrit-PatchSet: 25 Gerrit-Owner: Lawrence Chang <lawrence.chang(a)intel.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Gareth Yu <gareth.yu(a)intel.com> Gerrit-Reviewer: Gareth Yu <gareth.yu(a)intel.corp-partner.google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Lawrence Chang <lawrence.chang(a)intel.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-Reviewer: Simon Yang <simon1.yang(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Gareth Yu <gareth.yu(a)intel.corp-partner.google.com> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Simon Yang <simon1.yang(a)intel.com> Gerrit-Attention: Gareth Yu <gareth.yu(a)intel.com> Gerrit-Attention: Lawrence Chang <lawrence.chang(a)intel.corp-partner.google.com>

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[M] Change in coreboot[main]: mb/google/brya/var/meliks: reset DPHY_CLOCK_LANE_TIMING
by Gareth Yu (Code Review) 31 Mar '25

31 Mar '25

Attention is currently required from: Dinesh Gehlot, Eric Lai, Gareth Yu, Jayvik Desai, Kapil Porwal, Lawrence Chang, Nick Vaccaro, Paul Menzel, SH Kim, Simon Yang, Subrata Banik. Gareth Yu has uploaded a new patch set (#24) to the change originally created by Lawrence Chang. ( https://review.coreboot.org/c/coreboot/+/86838?usp=email ) The following approvals got outdated and were removed: Verified-1 by build bot (Jenkins) Change subject: mb/google/brya/var/meliks: reset DPHY_CLOCK_LANE_TIMING ...................................................................... mb/google/brya/var/meliks: reset DPHY_CLOCK_LANE_TIMING According to the analysis results, resetting the DSI DPHY to default during a warm boot is needed if 'You are in developer mode' needs to be displayed on the screen in a system using the MIPI-DSI panel. DPHY_0_CLOCK_LANE_TIMING -- address:0x162180, size: 32 bits [31]: CLK_PREPARE Override. 0:HW maintains, 1:SW overrides [30..28]: CLK_PREPARE [27]: CLK_ZERO Override. 0:HW maintains, 1:SW overrides [23..20]: CLK_ZERO [19]: CLK_PRE Override. 0:HW maintains, 1:SW overrides [17..16]: CLK_PRE [15]: CLK_POST Override. 0:HW maintains, 1:SW overrides [10..8]: CLK_POST [7]: CLK_TRAIL Override. 0:HW maintains, 1:SW overrides [2..0]: CLK_TRAIL BUG=b:397805262 TEST=Able to show 'You are in developer mode' Change-Id: I7857c4f71fc7d1d0c5069a462bdd70c8dbb78179 Signed-off-by: Gareth Yu <gareth.yu(a)intel.com> --- M src/mainboard/google/brya/variants/meliks/Makefile.mk A src/mainboard/google/brya/variants/meliks/ramstage.c 2 files changed, 60 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/86838/24 -- To view, visit https://review.coreboot.org/c/coreboot/+/86838?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7857c4f71fc7d1d0c5069a462bdd70c8dbb78179 Gerrit-Change-Number: 86838 Gerrit-PatchSet: 24 Gerrit-Owner: Lawrence Chang <lawrence.chang(a)intel.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Gareth Yu <gareth.yu(a)intel.com> Gerrit-Reviewer: Gareth Yu <gareth.yu(a)intel.corp-partner.google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Lawrence Chang <lawrence.chang(a)intel.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-Reviewer: Simon Yang <simon1.yang(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Gareth Yu <gareth.yu(a)intel.corp-partner.google.com> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Simon Yang <simon1.yang(a)intel.com> Gerrit-Attention: Lawrence Chang <lawrence.chang(a)intel.corp-partner.google.com>

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[M] Change in coreboot[main]: mb/google/brya/var/meliks: reset DPHY_CLOCK_LANE_TIMING
by Gareth Yu (Code Review) 31 Mar '25

31 Mar '25

Attention is currently required from: Dinesh Gehlot, Eric Lai, Gareth Yu, Jayvik Desai, Kapil Porwal, Lawrence Chang, Nick Vaccaro, Paul Menzel, SH Kim, Simon Yang, Subrata Banik. Gareth Yu has posted comments on this change by Lawrence Chang. ( https://review.coreboot.org/c/coreboot/+/86838?usp=email ) Change subject: mb/google/brya/var/meliks: reset DPHY_CLOCK_LANE_TIMING ...................................................................... Patch Set 23: (2 comments) File src/mainboard/google/brya/variants/meliks/ramstage.c: https://review.coreboot.org/c/coreboot/+/86838/comment/34b0bf25_7d8d98be?us… : PS19, Line 36: if (!igd_base) > `that open brace { should be on the previous line` Please fix. File src/mainboard/google/brya/variants/meliks/ramstage.c: https://review.coreboot.org/c/coreboot/+/86838/comment/ff47c9a9_de66c424?us… : PS21, Line 55: the function consistent relies on software forcing the DPHY CLK timing to > `trailing whitespace` Please fix. -- To view, visit https://review.coreboot.org/c/coreboot/+/86838?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7857c4f71fc7d1d0c5069a462bdd70c8dbb78179 Gerrit-Change-Number: 86838 Gerrit-PatchSet: 23 Gerrit-Owner: Lawrence Chang <lawrence.chang(a)intel.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Gareth Yu <gareth.yu(a)intel.com> Gerrit-Reviewer: Gareth Yu <gareth.yu(a)intel.corp-partner.google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Lawrence Chang <lawrence.chang(a)intel.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-Reviewer: Simon Yang <simon1.yang(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Gareth Yu <gareth.yu(a)intel.corp-partner.google.com> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Simon Yang <simon1.yang(a)intel.com> Gerrit-Attention: Lawrence Chang <lawrence.chang(a)intel.corp-partner.google.com> Gerrit-Comment-Date: Mon, 31 Mar 2025 05:07:22 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[M] Change in coreboot[main]: mb/google/brya/var/meliks: reset DPHY_CLOCK_LANE_TIMING
by Gareth Yu (Code Review) 31 Mar '25

31 Mar '25

Attention is currently required from: Dinesh Gehlot, Eric Lai, Gareth Yu, Gareth Yu, Jayvik Desai, Kapil Porwal, Lawrence Chang, Nick Vaccaro, Paul Menzel, SH Kim, Simon Yang, Subrata Banik. Gareth Yu has uploaded a new patch set (#22) to the change originally created by Lawrence Chang. ( https://review.coreboot.org/c/coreboot/+/86838?usp=email ) The following approvals got outdated and were removed: Verified-1 by build bot (Jenkins) Change subject: mb/google/brya/var/meliks: reset DPHY_CLOCK_LANE_TIMING ...................................................................... mb/google/brya/var/meliks: reset DPHY_CLOCK_LANE_TIMING According to the analysis results, resetting the DSI DPHY to default during a warm boot is needed if 'You are in developer mode' needs to be displayed on the screen in a system using the MIPI-DSI panel. DPHY_0_CLOCK_LANE_TIMING -- address:0x162180, size: 32 bits [31]: CLK_PREPARE Override. 0:HW maintains, 1:SW overrides [30..28]: CLK_PREPARE [27]: CLK_ZERO Override. 0:HW maintains, 1:SW overrides [23..20]: CLK_ZERO [19]: CLK_PRE Override. 0:HW maintains, 1:SW overrides [17..16]: CLK_PRE [15]: CLK_POST Override. 0:HW maintains, 1:SW overrides [10..8]: CLK_POST [7]: CLK_TRAIL Override. 0:HW maintains, 1:SW overrides [2..0]: CLK_TRAIL BUG=b:397805262 TEST=Able to show 'You are in developer mode' Change-Id: I7857c4f71fc7d1d0c5069a462bdd70c8dbb78179 Signed-off-by: Gareth Yu <gareth.yu(a)intel.com> --- M src/mainboard/google/brya/variants/meliks/Makefile.mk A src/mainboard/google/brya/variants/meliks/ramstage.c 2 files changed, 61 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/86838/22 -- To view, visit https://review.coreboot.org/c/coreboot/+/86838?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7857c4f71fc7d1d0c5069a462bdd70c8dbb78179 Gerrit-Change-Number: 86838 Gerrit-PatchSet: 22 Gerrit-Owner: Lawrence Chang <lawrence.chang(a)intel.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Gareth Yu <gareth.yu(a)intel.com> Gerrit-Reviewer: Gareth Yu <gareth.yu(a)intel.corp-partner.google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Lawrence Chang <lawrence.chang(a)intel.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-Reviewer: Simon Yang <simon1.yang(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Gareth Yu <gareth.yu(a)intel.corp-partner.google.com> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Simon Yang <simon1.yang(a)intel.com> Gerrit-Attention: Gareth Yu <gareth.yu(a)intel.com> Gerrit-Attention: Lawrence Chang <lawrence.chang(a)intel.corp-partner.google.com>

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[M] Change in coreboot[main]: mb/google/brya/var/meliks: reset DPHY_CLOCK_LANE_TIMING
by Gareth Yu (Code Review) 31 Mar '25

31 Mar '25

Attention is currently required from: Dinesh Gehlot, Eric Lai, Gareth Yu, Gareth Yu, Jayvik Desai, Kapil Porwal, Lawrence Chang, Nick Vaccaro, Paul Menzel, SH Kim, Simon Yang, Subrata Banik. Gareth Yu has uploaded a new patch set (#21) to the change originally created by Lawrence Chang. ( https://review.coreboot.org/c/coreboot/+/86838?usp=email ) The following approvals got outdated and were removed: Verified-1 by build bot (Jenkins) Change subject: mb/google/brya/var/meliks: reset DPHY_CLOCK_LANE_TIMING ...................................................................... mb/google/brya/var/meliks: reset DPHY_CLOCK_LANE_TIMING According to the analysis results, resetting the DSI DPHY to default during a warm boot is needed if 'You are in developer mode' needs to be displayed on the screen in a system using the MIPI-DSI panel. DPHY_0_CLOCK_LANE_TIMING -- address:0x162180, size: 32 bits [31]: CLK_PREPARE Override. 0:HW maintains, 1:SW overrides [30..28]: CLK_PREPARE [27]: CLK_ZERO Override. 0:HW maintains, 1:SW overrides [23..20]: CLK_ZERO [19]: CLK_PRE Override. 0:HW maintains, 1:SW overrides [17..16]: CLK_PRE [15]: CLK_POST Override. 0:HW maintains, 1:SW overrides [10..8]: CLK_POST [7]: CLK_TRAIL Override. 0:HW maintains, 1:SW overrides [2..0]: CLK_TRAIL BUG=b:397805262 TEST=Able to show 'You are in developer mode' Change-Id: I7857c4f71fc7d1d0c5069a462bdd70c8dbb78179 Signed-off-by: Gareth Yu <gareth.yu(a)intel.com> --- M src/mainboard/google/brya/variants/meliks/Makefile.mk A src/mainboard/google/brya/variants/meliks/ramstage.c 2 files changed, 61 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/86838/21 -- To view, visit https://review.coreboot.org/c/coreboot/+/86838?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7857c4f71fc7d1d0c5069a462bdd70c8dbb78179 Gerrit-Change-Number: 86838 Gerrit-PatchSet: 21 Gerrit-Owner: Lawrence Chang <lawrence.chang(a)intel.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Gareth Yu <gareth.yu(a)intel.com> Gerrit-Reviewer: Gareth Yu <gareth.yu(a)intel.corp-partner.google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Lawrence Chang <lawrence.chang(a)intel.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-Reviewer: Simon Yang <simon1.yang(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Gareth Yu <gareth.yu(a)intel.corp-partner.google.com> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Simon Yang <simon1.yang(a)intel.com> Gerrit-Attention: Gareth Yu <gareth.yu(a)intel.com> Gerrit-Attention: Lawrence Chang <lawrence.chang(a)intel.corp-partner.google.com>

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[M] Change in coreboot[main]: mb/google/brya/var/meliks: reset DPHY_CLOCK_LANE_TIMING
by Gareth Yu (Code Review) 31 Mar '25

31 Mar '25

Attention is currently required from: Dinesh Gehlot, Eric Lai, Gareth Yu, Gareth Yu, Jayvik Desai, Kapil Porwal, Lawrence Chang, Nick Vaccaro, Paul Menzel, SH Kim, Simon Yang, Subrata Banik. Gareth Yu has uploaded a new patch set (#20) to the change originally created by Lawrence Chang. ( https://review.coreboot.org/c/coreboot/+/86838?usp=email ) The following approvals got outdated and were removed: Verified-1 by build bot (Jenkins) Change subject: mb/google/brya/var/meliks: reset DPHY_CLOCK_LANE_TIMING ...................................................................... mb/google/brya/var/meliks: reset DPHY_CLOCK_LANE_TIMING According to the analysis results, resetting the DSI DPHY to default during a warm boot is needed if 'You are in developer mode' needs to be displayed on the screen in a system using the MIPI-DSI panel. DPHY_0_CLOCK_LANE_TIMING -- address:0x162180, size: 32 bits [31]: CLK_PREPARE Override. 0:HW maintains, 1:SW overrides [30..28]: CLK_PREPARE [27]: CLK_ZERO Override. 0:HW maintains, 1:SW overrides [23..20]: CLK_ZERO [19]: CLK_PRE Override. 0:HW maintains, 1:SW overrides [17..16]: CLK_PRE [15]: CLK_POST Override. 0:HW maintains, 1:SW overrides [10..8]: CLK_POST [7]: CLK_TRAIL Override. 0:HW maintains, 1:SW overrides [2..0]: CLK_TRAIL BUG=b:397805262 TEST=Able to show 'You are in developer mode' Change-Id: I7857c4f71fc7d1d0c5069a462bdd70c8dbb78179 Signed-off-by: Gareth Yu <gareth.yu(a)intel.com> --- M src/mainboard/google/brya/variants/meliks/Makefile.mk A src/mainboard/google/brya/variants/meliks/ramstage.c 2 files changed, 63 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/86838/20 -- To view, visit https://review.coreboot.org/c/coreboot/+/86838?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7857c4f71fc7d1d0c5069a462bdd70c8dbb78179 Gerrit-Change-Number: 86838 Gerrit-PatchSet: 20 Gerrit-Owner: Lawrence Chang <lawrence.chang(a)intel.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Gareth Yu <gareth.yu(a)intel.com> Gerrit-Reviewer: Gareth Yu <gareth.yu(a)intel.corp-partner.google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Lawrence Chang <lawrence.chang(a)intel.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-Reviewer: Simon Yang <simon1.yang(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Gareth Yu <gareth.yu(a)intel.corp-partner.google.com> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Simon Yang <simon1.yang(a)intel.com> Gerrit-Attention: Gareth Yu <gareth.yu(a)intel.com> Gerrit-Attention: Lawrence Chang <lawrence.chang(a)intel.corp-partner.google.com>

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[M] Change in coreboot[main]: mb/google/brya/var/meliks: reset DPHY_CLOCK_LANE_TIMING
by Gareth Yu (Code Review) 31 Mar '25

31 Mar '25

Attention is currently required from: Dinesh Gehlot, Eric Lai, Gareth Yu, Gareth Yu, Jayvik Desai, Kapil Porwal, Lawrence Chang, Nick Vaccaro, Paul Menzel, SH Kim, Simon Yang, Subrata Banik. Gareth Yu has uploaded a new patch set (#19) to the change originally created by Lawrence Chang. ( https://review.coreboot.org/c/coreboot/+/86838?usp=email ) The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: mb/google/brya/var/meliks: reset DPHY_CLOCK_LANE_TIMING ...................................................................... mb/google/brya/var/meliks: reset DPHY_CLOCK_LANE_TIMING According to the analysis results, resetting the DSI DPHY to default during a warm boot is needed if 'You are in developer mode' needs to be displayed on the screen in a system using the MIPI-DSI panel. DPHY_0_CLOCK_LANE_TIMING -- address:0x162180, size: 32 bits [31]: CLK_PREPARE Override. 0:HW maintains, 1:SW overrides [30..28]: CLK_PREPARE [27]: CLK_ZERO Override. 0:HW maintains, 1:SW overrides [23..20]: CLK_ZERO [19]: CLK_PRE Override. 0:HW maintains, 1:SW overrides [17..16]: CLK_PRE [15]: CLK_POST Override. 0:HW maintains, 1:SW overrides [10..8]: CLK_POST [7]: CLK_TRAIL Override. 0:HW maintains, 1:SW overrides [2..0]: CLK_TRAIL BUG=b:397805262 TEST=Able to show 'You are in developer mode' Change-Id: I7857c4f71fc7d1d0c5069a462bdd70c8dbb78179 Signed-off-by: Gareth Yu <gareth.yu(a)intel.com> --- M src/mainboard/google/brya/variants/meliks/Makefile.mk A src/mainboard/google/brya/variants/meliks/ramstage.c 2 files changed, 63 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/86838/19 -- To view, visit https://review.coreboot.org/c/coreboot/+/86838?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7857c4f71fc7d1d0c5069a462bdd70c8dbb78179 Gerrit-Change-Number: 86838 Gerrit-PatchSet: 19 Gerrit-Owner: Lawrence Chang <lawrence.chang(a)intel.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Gareth Yu <gareth.yu(a)intel.com> Gerrit-Reviewer: Gareth Yu <gareth.yu(a)intel.corp-partner.google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Lawrence Chang <lawrence.chang(a)intel.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-Reviewer: Simon Yang <simon1.yang(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Gareth Yu <gareth.yu(a)intel.corp-partner.google.com> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Simon Yang <simon1.yang(a)intel.com> Gerrit-Attention: Gareth Yu <gareth.yu(a)intel.com> Gerrit-Attention: Lawrence Chang <lawrence.chang(a)intel.corp-partner.google.com>

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[XS] Change in coreboot[main]: mb/google/fatcat/var/felino: Add ALC1320 codec to devicetree
by Mac Chiang (Code Review) 31 Mar '25

31 Mar '25

Attention is currently required from: Jayvik Desai, Kapil Porwal, Paul Menzel, Pranava Y N, Subrata Banik, Weimin Wu. Mac Chiang has posted comments on this change by Weimin Wu. ( https://review.coreboot.org/c/coreboot/+/86747?usp=email ) Change subject: mb/google/fatcat/var/felino: Add ALC1320 codec to devicetree ...................................................................... Patch Set 6: (1 comment) File src/mainboard/google/fatcat/variants/felino/overridetree.cb: https://review.coreboot.org/c/coreboot/+/86747/comment/2df9a329_40a5f861?us… : PS3, Line 221: 3.1 > Link 3 is ok but what about ID? Both cannot be 1. I missed it. I think we should rebase on this CL https://review.coreboot.org/c/coreboot/+/85572/4/src/mainboard/google/fatca… -- To view, visit https://review.coreboot.org/c/coreboot/+/86747?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie8763888810f56eb45523e3bcf7ef082900b1225 Gerrit-Change-Number: 86747 Gerrit-PatchSet: 6 Gerrit-Owner: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Mac Chiang <mac.chiang(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Comment-Date: Mon, 31 Mar 2025 03:23:48 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Mac Chiang <mac.chiang(a)intel.com> Comment-In-Reply-To: Kapil Porwal <kapilporwal(a)google.com>

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