coreboot-gerrit February 2025

coreboot-gerrit@coreboot.org

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[M] Change in coreboot[main]: security/tpm: Add TPM2 NV_ReadPublic command support
by Filip Lewiński (Code Review) 20 Feb '25

20 Feb '25

Attention is currently required from: Arthur Heymans, Christian Walter, Felix Held, Krystian Hebel, Martin Roth, Matt DeVillier, Michał Kopeć. Filip Lewiński has posted comments on this change by Filip Lewiński. ( https://review.coreboot.org/c/coreboot/+/82037?usp=email ) Change subject: security/tpm: Add TPM2 NV_ReadPublic command support ...................................................................... Patch Set 17: (5 comments) File src/security/tpm/tss.h: https://review.coreboot.org/c/coreboot/+/82037/comment/fbc06283_7fe6b0a6?us… : PS16, Line 34: index > `space_index`? [Done](https://review.coreboot.org/c/coreboot/+/82037/16..17/src/security/tp… https://review.coreboot.org/c/coreboot/+/82037/comment/c557ce3e_404c3732?us… : PS16, Line 35: hte > the [Done](https://review.coreboot.org/c/coreboot/+/82037/16..17/src/security/tp… File src/security/tpm/tss/tcg-2.0/tss.c: https://review.coreboot.org/c/coreboot/+/82037/comment/95258660_73b7ee49?us… : PS16, Line 395: struct nv_read_public_response *nvrp_resp) > One more space required to align it with the inside of the bracket. [Done](https://review.coreboot.org/c/coreboot/+/82037/16..17/src/security/tp… https://review.coreboot.org/c/coreboot/+/82037/comment/399114ae_64a397f3?us… : PS16, Line 410: return TPM_CB_NO_DEVICE; > I think this should normally be TPM_IOERROR (or maybe TPM_CB_READ_FAILURE). [Done](https://review.coreboot.org/c/coreboot/+/82037/16..17/src/security/tp… https://review.coreboot.org/c/coreboot/+/82037/comment/7ea14b02_a1d9d214?us… : PS16, Line 423: > Drop this line. [Done](https://review.coreboot.org/c/coreboot/+/82037/16..17/src/security/tp… -- To view, visit https://review.coreboot.org/c/coreboot/+/82037?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I3c032b4f88d445372beebbe354f458a061a63bb9 Gerrit-Change-Number: 82037 Gerrit-PatchSet: 17 Gerrit-Owner: Filip Lewiński <filip.lewinski(a)3mdeb.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-CC: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 20 Feb 2025 10:11:13 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Comment-In-Reply-To: Krystian Hebel <krystian.hebel(a)3mdeb.com>

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[M] Change in coreboot[main]: soc/mediatek/mt8196: Move common functions to gpio_eint_v2.c
by Yu-Ping Wu (Code Review) 20 Feb '25

20 Feb '25

Attention is currently required from: Hung-Te Lin, Vince Liu, Yidi Lin. Yu-Ping Wu has posted comments on this change by Vince Liu. ( https://review.coreboot.org/c/coreboot/+/86541?usp=email ) Change subject: soc/mediatek/mt8196: Move common functions to gpio_eint_v2.c ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86541?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Id21f627a49f730f3a0db786a148f81806aeba287 Gerrit-Change-Number: 86541 Gerrit-PatchSet: 1 Gerrit-Owner: Vince Liu <vince-wl.liu(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Vince Liu <vince-wl.liu(a)mediatek.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Comment-Date: Thu, 20 Feb 2025 10:10:41 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[M] Change in coreboot[main]: security/tpm: Add TPM2 NV_ReadPublic command support
by Filip Lewiński (Code Review) 20 Feb '25

20 Feb '25

Attention is currently required from: Arthur Heymans, Christian Walter, Felix Held, Filip Lewiński, Krystian Hebel, Martin Roth, Matt DeVillier, Michał Kopeć. Hello Arthur Heymans, Christian Walter, Felix Held, Krystian Hebel, Martin Roth, Matt DeVillier, Michał Kopeć, Michał Żygowski, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/82037?usp=email to look at the new patch set (#17). The following approvals got outdated and were removed: Code-Review+2 by Krystian Hebel, Verified+1 by build bot (Jenkins) Change subject: security/tpm: Add TPM2 NV_ReadPublic command support ...................................................................... security/tpm: Add TPM2 NV_ReadPublic command support Adds support for `tpm2_nvreadpublic`, which allows to read the public area and attributes of a TPM2 Non-Volatile (NV) index. The use case is to check for indices required by Intel TXT to avoid a reset loop caused by BIOS ACM SCHECK. TEST=Read Intel TXT TPM2 NV indices in Intel TXT driver. Change-Id: I3c032b4f88d445372beebbe354f458a061a63bb9 Signed-off-by: Michał Żygowski <michal.zygowski(a)3mdeb.com> --- M src/security/tpm/tss.h M src/security/tpm/tss/tcg-2.0/tss.c M src/security/tpm/tss/tcg-2.0/tss_marshaling.c M src/security/tpm/tss/tcg-2.0/tss_structures.h 4 files changed, 152 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/37/82037/17 -- To view, visit https://review.coreboot.org/c/coreboot/+/82037?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I3c032b4f88d445372beebbe354f458a061a63bb9 Gerrit-Change-Number: 82037 Gerrit-PatchSet: 17 Gerrit-Owner: Filip Lewiński <filip.lewinski(a)3mdeb.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-CC: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Filip Lewiński <filip.lewinski(a)3mdeb.com> Gerrit-Attention: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de>

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[L] Change in coreboot[main]: soc/mediatek/mt8189: Add GPIO driver
by Yu-Ping Wu (Code Review) 20 Feb '25

20 Feb '25

Yu-Ping Wu has posted comments on this change by Vince Liu. ( https://review.coreboot.org/c/coreboot/+/85667?usp=email ) Change subject: soc/mediatek/mt8189: Add GPIO driver ...................................................................... Patch Set 2: (1 comment) File src/soc/mediatek/mt8189/gpio.c: https://review.coreboot.org/c/coreboot/+/85667/comment/4683d9c6_b2219a01?us… : PS2, Line 264: if (raw_id >= ARRAY_SIZE(gpio_driving_info)) > Updated in https://review.coreboot. […] Acknowledged -- To view, visit https://review.coreboot.org/c/coreboot/+/85667?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia87fe0975add95fcfad16d55586559c7f912a624 Gerrit-Change-Number: 85667 Gerrit-PatchSet: 2 Gerrit-Owner: Vince Liu <vince-wl.liu(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-Comment-Date: Thu, 20 Feb 2025 09:53:16 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Vince Liu <vince-wl.liu(a)mediatek.com> Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com>

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[S] Change in coreboot[main]: soc/mediatek/mt8189: Reduce bootblock size by separating SPI NOR GPIOs
by Yu-Ping Wu (Code Review) 20 Feb '25

20 Feb '25

Attention is currently required from: Hung-Te Lin, Vince Liu, Yidi Lin. Yu-Ping Wu has posted comments on this change by Vince Liu. ( https://review.coreboot.org/c/coreboot/+/86538?usp=email ) The change is no longer submittable: All-Comments-Resolved is unsatisfied now. Change subject: soc/mediatek/mt8189: Reduce bootblock size by separating SPI NOR GPIOs ...................................................................... Patch Set 2: Code-Review+2 (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/86538/comment/912d2548_cede962f?us… : PS2, Line 12: This modification reduces the bootblock code size by 1KB. Please either 1. do not start a new line, or 2. start a new paragraph -- To view, visit https://review.coreboot.org/c/coreboot/+/86538?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If7e8e5c7db59b5f181db14f6e66df2f333dbb6d4 Gerrit-Change-Number: 86538 Gerrit-PatchSet: 2 Gerrit-Owner: Vince Liu <vince-wl.liu(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Vince Liu <vince-wl.liu(a)mediatek.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Comment-Date: Thu, 20 Feb 2025 09:52:54 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: mb/google/nissa/var/dirks: Add fw_config probe for WIFI Type
by David Wu (Code Review) 20 Feb '25

20 Feb '25

Attention is currently required from: Dinesh Gehlot, Eric Lai, Ivy Jian, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Subrata Banik. David Wu has posted comments on this change by David Wu. ( https://review.coreboot.org/c/coreboot/+/86540?usp=email ) Change subject: mb/google/nissa/var/dirks: Add fw_config probe for WIFI Type ...................................................................... Patch Set 1: (1 comment) File src/mainboard/google/brya/variants/dirks/overridetree.cb: https://review.coreboot.org/c/coreboot/+/86540/comment/258f8f98_cf808a65?us… : PS1, Line 7: ALL > defaul? Yes, default for enable all wifi type. -- To view, visit https://review.coreboot.org/c/coreboot/+/86540?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iaefda61e4929d48f02ce7190e9e45d70b32b75e3 Gerrit-Change-Number: 86540 Gerrit-PatchSet: 1 Gerrit-Owner: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Thu, 20 Feb 2025 09:17:23 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Eric Lai <ericllai(a)google.com>

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[M] Change in coreboot[main]: soc/mediatek/mt8196: Move common functions to gpio_eint_v2.c
by Vince Liu (Code Review) 20 Feb '25

20 Feb '25

Vince Liu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/86541?usp=email ) Change subject: soc/mediatek/mt8196: Move common functions to gpio_eint_v2.c ...................................................................... soc/mediatek/mt8196: Move common functions to gpio_eint_v2.c Move gpio_get_eint_reg() and gpio_calc_eint_pos_bit() to common code to avoid redundant definitions for other platforms such as MT8189. BUG=b:379008996 BRANCH=none TEST=build passed. Signed-off-by: Vince Liu <vince-wl.liu(a)mediatek.corp-partner.google.com> Change-Id: Id21f627a49f730f3a0db786a148f81806aeba287 --- A src/soc/mediatek/common/gpio_eint_v2.c A src/soc/mediatek/common/include/soc/gpio_eint_v2.h M src/soc/mediatek/mt8196/Makefile.mk M src/soc/mediatek/mt8196/gpio_eint.c 4 files changed, 87 insertions(+), 68 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/41/86541/1 diff --git a/src/soc/mediatek/common/gpio_eint_v2.c b/src/soc/mediatek/common/gpio_eint_v2.c new file mode 100644 index 0000000..5e848fe --- /dev/null +++ b/src/soc/mediatek/common/gpio_eint_v2.c @@ -0,0 +1,55 @@ +/* SPDX-License-Identifier: GPL-2.0-only OR MIT */ + +#include <console/console.h> +#include <soc/addressmap.h> +#include <soc/gpio.h> +#include <soc/gpio_eint_v2.h> + +void gpio_calc_eint_pos_bit(gpio_t gpio, u32 *pos, u32 *bit) +{ + uint32_t idx = gpio.id; + + *pos = 0; + *bit = 0; + + if (idx >= eint_data_len) + return; + + uint8_t index = eint_data[idx].index; + + *pos = index / MAX_EINT_REG_BITS; + *bit = index % MAX_EINT_REG_BITS; +} + +struct eint_regs *gpio_get_eint_reg(gpio_t gpio) +{ + uint32_t idx = gpio.id; + uintptr_t addr; + + if (idx >= eint_data_len) + return NULL; + + switch (eint_data[idx].instance) { + case EINT_E: + addr = EINT_E_BASE; + break; + case EINT_S: + addr = EINT_S_BASE; + break; + case EINT_W: + addr = EINT_W_BASE; + break; + case EINT_N: + addr = EINT_N_BASE; + break; + case EINT_C: + addr = EINT_C_BASE; + break; + default: + printk(BIOS_ERR, "%s: Failed to look up a valid EINT base for %d\n", + __func__, idx); + return NULL; + } + + return (void *)addr; +} diff --git a/src/soc/mediatek/common/include/soc/gpio_eint_v2.h b/src/soc/mediatek/common/include/soc/gpio_eint_v2.h new file mode 100644 index 0000000..6f4acc6 --- /dev/null +++ b/src/soc/mediatek/common/include/soc/gpio_eint_v2.h @@ -0,0 +1,25 @@ +/* SPDX-License-Identifier: GPL-2.0-only OR MIT */ + +#ifndef __SOC_MEDIATEK_COMMON_INCLUDE_SOC_GPIO_EINT_V2_H__ +#define __SOC_MEDIATEK_COMMON_INCLUDE_SOC_GPIO_EINT_V2_H__ + +#include <stdint.h> + +enum { + EINT_INVALID = 0, + EINT_E, + EINT_S, + EINT_W, + EINT_N, + EINT_C, +}; + +struct eint_info { + uint8_t instance; + uint8_t index; +}; + +extern const struct eint_info eint_data[]; +extern const size_t eint_data_len; + +#endif /* __SOC_MEDIATEK_COMMON_INCLUDE_SOC_GPIO_EINT_V2_H__ */ diff --git a/src/soc/mediatek/mt8196/Makefile.mk b/src/soc/mediatek/mt8196/Makefile.mk index 85b670a..1793104 100644 --- a/src/soc/mediatek/mt8196/Makefile.mk +++ b/src/soc/mediatek/mt8196/Makefile.mk @@ -3,7 +3,8 @@ ifeq ($(CONFIG_SOC_MEDIATEK_MT8196),y) all-y += ../common/flash_controller.c -all-y += ../common/gpio.c ../common/gpio_op.c gpio.c gpio_eint.c +all-y += ../common/gpio.c ../common/gpio_op.c gpio.c +all-y += ../common/gpio_eint_v2.c gpio_eint.c all-y += ../common/i2c.c i2c.c all-y += ../common/pll.c pll.c all-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c diff --git a/src/soc/mediatek/mt8196/gpio_eint.c b/src/soc/mediatek/mt8196/gpio_eint.c index f24860d..9263e9e 100644 --- a/src/soc/mediatek/mt8196/gpio_eint.c +++ b/src/soc/mediatek/mt8196/gpio_eint.c @@ -1,29 +1,14 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ +/* SPDX-License-Identifier: GPL-2.0-only OR MIT */ /* * This file is created based on MT8196_EINT_Datasheet * Chapter number: 1 */ -#include <console/console.h> -#include <soc/addressmap.h> -#include <soc/gpio.h> +#include <commonlib/bsd/helpers.h> +#include <soc/gpio_eint_v2.h> -enum { - EINT_INVALID = 0, - EINT_E, - EINT_S, - EINT_W, - EINT_N, - EINT_C, -}; - -struct eint_info { - uint8_t instance; - uint8_t index; -}; - -static struct eint_info eint_data[] = { +const struct eint_info eint_data[] = { /* instance, index */ [0] = { EINT_W, 0 }, [1] = { EINT_W, 1 }, @@ -258,51 +243,4 @@ }; _Static_assert(ARRAY_SIZE(eint_data) == 293, "Incorrect eint_data size"); -void gpio_calc_eint_pos_bit(gpio_t gpio, u32 *pos, u32 *bit) -{ - uint32_t idx = gpio.id; - - *pos = 0; - *bit = 0; - - if (idx >= ARRAY_SIZE(eint_data)) - return; - - uint8_t index = eint_data[idx].index; - - *pos = index / MAX_EINT_REG_BITS; - *bit = index % MAX_EINT_REG_BITS; -} - -struct eint_regs *gpio_get_eint_reg(gpio_t gpio) -{ - uint32_t idx = gpio.id; - uintptr_t addr; - - if (idx >= ARRAY_SIZE(eint_data)) - return NULL; - - switch (eint_data[idx].instance) { - case EINT_E: - addr = EINT_E_BASE; - break; - case EINT_S: - addr = EINT_S_BASE; - break; - case EINT_W: - addr = EINT_W_BASE; - break; - case EINT_N: - addr = EINT_N_BASE; - break; - case EINT_C: - addr = EINT_C_BASE; - break; - default: - printk(BIOS_ERR, "%s: Failed to look up a valid EINT base for %d\n", - __func__, idx); - return NULL; - } - - return (void *)addr; -} +const size_t eint_data_len = ARRAY_SIZE(eint_data); -- To view, visit https://review.coreboot.org/c/coreboot/+/86541?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Id21f627a49f730f3a0db786a148f81806aeba287 Gerrit-Change-Number: 86541 Gerrit-PatchSet: 1 Gerrit-Owner: Vince Liu <vince-wl.liu(a)mediatek.com>

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[S] Change in coreboot[main]: mb/google/nissa/var/dirks: Add fw_config probe for WIFI Type
by Eric Lai (Code Review) 20 Feb '25

20 Feb '25

Attention is currently required from: David Wu, Dinesh Gehlot, Ivy Jian, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Subrata Banik. Eric Lai has posted comments on this change by David Wu. ( https://review.coreboot.org/c/coreboot/+/86540?usp=email ) Change subject: mb/google/nissa/var/dirks: Add fw_config probe for WIFI Type ...................................................................... Patch Set 1: (1 comment) File src/mainboard/google/brya/variants/dirks/overridetree.cb: https://review.coreboot.org/c/coreboot/+/86540/comment/dfb4f111_84bdfa97?us… : PS1, Line 7: ALL defaul? -- To view, visit https://review.coreboot.org/c/coreboot/+/86540?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iaefda61e4929d48f02ce7190e9e45d70b32b75e3 Gerrit-Change-Number: 86540 Gerrit-PatchSet: 1 Gerrit-Owner: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Thu, 20 Feb 2025 09:09:00 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: mb/google/nissa/var/dirks: Update ddi_ports_config
by David Wu (Code Review) 20 Feb '25

20 Feb '25

Attention is currently required from: Dinesh Gehlot, Ivy Jian, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Subrata Banik. David Wu has posted comments on this change by Ivy Jian. ( https://review.coreboot.org/c/coreboot/+/86537?usp=email ) Change subject: mb/google/nissa/var/dirks: Update ddi_ports_config ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86537?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I67e9fcf4a3caa303ec8d873507a7533389c095ae Gerrit-Change-Number: 86537 Gerrit-PatchSet: 1 Gerrit-Owner: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Reviewer: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Thu, 20 Feb 2025 09:05:57 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: mb/google/nissa/var/dirks: Add fw_config probe for WIFI Type
by David Wu (Code Review) 20 Feb '25

20 Feb '25

David Wu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/86540?usp=email ) Change subject: mb/google/nissa/var/dirks: Add fw_config probe for WIFI Type ...................................................................... mb/google/nissa/var/dirks: Add fw_config probe for WIFI Type Use fw_config to probe WIFI Type. BUG=b:389391653 TEST=emerge-nissa coreboot Change-Id: Iaefda61e4929d48f02ce7190e9e45d70b32b75e3 Signed-off-by: David Wu <david_wu(a)quanta.corp-partner.google.com> --- M src/mainboard/google/brya/variants/dirks/overridetree.cb 1 file changed, 34 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/86540/1 diff --git a/src/mainboard/google/brya/variants/dirks/overridetree.cb b/src/mainboard/google/brya/variants/dirks/overridetree.cb index bc1c186..55f72be 100644 --- a/src/mainboard/google/brya/variants/dirks/overridetree.cb +++ b/src/mainboard/google/brya/variants/dirks/overridetree.cb @@ -1,3 +1,15 @@ +fw_config + field WIFI_SAR_ID 0 0 + option ID_0 0 + option ID_1 1 + end + field WIFI_TYPE 1 2 + option WIFI_ALL 0 + option WIFI_CNVI 1 + option WIFI_PCIE 2 + end +end + chip soc/intel/alderlake register "sagv" = "SaGv_Enabled" @@ -174,7 +186,10 @@ device ref cnvi_wifi on chip drivers/wifi/generic register "enable_cnvi_ddr_rfim" = "true" - device generic 0 on end + device generic 0 on + probe WIFI_TYPE WIFI_CNVI + probe WIFI_TYPE WIFI_ALL + end end end device ref i2c3 on @@ -199,6 +214,8 @@ end device ref pcie_rp11 on # Enable wlan PCIe 11 using clk 2 + probe WIFI_TYPE WIFI_PCIE + probe WIFI_TYPE WIFI_ALL register "pch_pcie_rp[PCH_RP(10)]" = "{ .clk_src = 2, .clk_req = 2, @@ -208,13 +225,19 @@ register "wake" = "GPE0_DW1_03" register "add_acpi_dma_property" = "true" use usb2_port8 as bluetooth_companion - device pci 00.0 on end + device pci 00.0 on + probe WIFI_TYPE WIFI_PCIE + probe WIFI_TYPE WIFI_ALL + end end chip soc/intel/common/block/pcie/rtd3 register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B11)" register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_H20)" register "srcclk_pin" = "2" - device generic 0 on end + device generic 0 on + probe WIFI_TYPE WIFI_PCIE + probe WIFI_TYPE WIFI_ALL + end end end device ref emmc on end @@ -305,14 +328,20 @@ register "type" = "UPC_TYPE_INTERNAL" register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D4)" - device ref usb2_port8 on end + device ref usb2_port8 on + probe WIFI_TYPE WIFI_PCIE + probe WIFI_TYPE WIFI_ALL + end end chip drivers/usb/acpi register "desc" = ""CNVI Bluetooth"" register "type" = "UPC_TYPE_INTERNAL" register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D4)" - device ref usb2_port10 on end + device ref usb2_port10 on + probe WIFI_TYPE WIFI_CNVI + probe WIFI_TYPE WIFI_ALL + end end chip drivers/usb/acpi register "desc" = ""USB3 Type-A Port A1"" -- To view, visit https://review.coreboot.org/c/coreboot/+/86540?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iaefda61e4929d48f02ce7190e9e45d70b32b75e3 Gerrit-Change-Number: 86540 Gerrit-PatchSet: 1 Gerrit-Owner: David Wu <david_wu(a)quanta.corp-partner.google.com>

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