coreboot-gerrit February 2025

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[M] Change in coreboot[main]: mb/google/nissa: Create meliks variant
by Matt DeVillier (Code Review) 20 Feb '25

20 Feb '25

Matt DeVillier has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86373?usp=email ) Change subject: mb/google/nissa: Create meliks variant ...................................................................... mb/google/nissa: Create meliks variant Create the meliks variant of the nissa reference board by copying the template files to a new directory named for the variant. (Auto-Generated by create_coreboot_variant.sh version 4.5.0) BUG=b:394359785 BRANCH=None TEST=util/abuild/abuild -p none -t google/brya -x -a make sure the build includes GOOGLE_MELIKS Change-Id: Iff5e27ef06a44976c2724751de0f9c6d5cf6eaaf Signed-off-by: Seunghwan Kim <sh_.kim(a)samsung.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/86373 Reviewed-by: Eric Lai <ericllai(a)google.com> Reviewed-by: Kapil Porwal <kapilporwal(a)google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/google/brya/Kconfig M src/mainboard/google/brya/Kconfig.name A src/mainboard/google/brya/variants/meliks/include/variant/ec.h A src/mainboard/google/brya/variants/meliks/include/variant/gpio.h A src/mainboard/google/brya/variants/meliks/memory/Makefile.mk A src/mainboard/google/brya/variants/meliks/memory/dram_id.generated.txt A src/mainboard/google/brya/variants/meliks/memory/mem_parts_used.txt A src/mainboard/google/brya/variants/meliks/overridetree.cb 8 files changed, 52 insertions(+), 0 deletions(-) Approvals: Kapil Porwal: Looks good to me, approved Eric Lai: Looks good to me, approved build bot (Jenkins): Verified diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig index 0f1c3c5..fd88c1b 100644 --- a/src/mainboard/google/brya/Kconfig +++ b/src/mainboard/google/brya/Kconfig @@ -351,6 +351,12 @@ select SOC_INTEL_RAPTORLAKE select USE_UNIFIED_AP_FIRMWARE_FOR_UFS_AND_NON_UFS +config BOARD_GOOGLE_MELIKS + select BOARD_GOOGLE_BASEBOARD_NISSA + select DRIVERS_I2C_DA7219 + select DRIVERS_INTEL_MIPI_CAMERA + select SOC_INTEL_TWINLAKE + config BOARD_GOOGLE_MITHRAX select BOARD_GOOGLE_BASEBOARD_BRYA select CHROMEOS_WIFI_SAR if CHROMEOS @@ -826,6 +832,7 @@ default 0x1 if BOARD_GOOGLE_ZYDRON default 0x0 if BOARD_GOOGLE_TELITH default 0x0 if BOARD_GOOGLE_PUJJOGATWIN + default 0x0 if BOARD_GOOGLE_MELIKS config DRIVER_TPM_I2C_ADDR hex @@ -909,6 +916,7 @@ default 13 if BOARD_GOOGLE_ZYDRON default 13 if BOARD_GOOGLE_TELITH default 13 if BOARD_GOOGLE_PUJJOGATWIN + default 13 if BOARD_GOOGLE_MELIKS config OVERRIDE_DEVICETREE default "variants/\$(CONFIG_VARIANT_DIR)/overridetree_pujjogatwin.cb" if BOARD_GOOGLE_PUJJOGATWIN @@ -1000,6 +1008,7 @@ default "Pujjoga" if BOARD_GOOGLE_PUJJOGA default "Telith" if BOARD_GOOGLE_TELITH default "Pujjogatwin" if BOARD_GOOGLE_PUJJOGATWIN + default "Meliks" if BOARD_GOOGLE_MELIKS config VARIANT_DIR default "agah" if BOARD_GOOGLE_AGAH @@ -1076,6 +1085,7 @@ default "pujjoga" if BOARD_GOOGLE_PUJJOGA default "telith" if BOARD_GOOGLE_TELITH default "pujjoga" if BOARD_GOOGLE_PUJJOGATWIN + default "meliks" if BOARD_GOOGLE_MELIKS config VBOOT select VBOOT_EARLY_EC_SYNC if !(BOARD_GOOGLE_BASEBOARD_NISSA || BOARD_GOOGLE_BASEBOARD_TRULO) diff --git a/src/mainboard/google/brya/Kconfig.name b/src/mainboard/google/brya/Kconfig.name index db99d32..ac4c262 100644 --- a/src/mainboard/google/brya/Kconfig.name +++ b/src/mainboard/google/brya/Kconfig.name @@ -223,3 +223,6 @@ config BOARD_GOOGLE_TELITH bool "-> Telith" + +config BOARD_GOOGLE_MELIKS + bool "-> Meliks" diff --git a/src/mainboard/google/brya/variants/meliks/include/variant/ec.h b/src/mainboard/google/brya/variants/meliks/include/variant/ec.h new file mode 100644 index 0000000..7a2a6ff --- /dev/null +++ b/src/mainboard/google/brya/variants/meliks/include/variant/ec.h @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#ifndef __VARIANT_EC_H__ +#define __VARIANT_EC_H__ + +#include <baseboard/ec.h> + +#endif diff --git a/src/mainboard/google/brya/variants/meliks/include/variant/gpio.h b/src/mainboard/google/brya/variants/meliks/include/variant/gpio.h new file mode 100644 index 0000000..c4fe342 --- /dev/null +++ b/src/mainboard/google/brya/variants/meliks/include/variant/gpio.h @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#ifndef VARIANT_GPIO_H +#define VARIANT_GPIO_H + +#include <baseboard/gpio.h> + +#endif diff --git a/src/mainboard/google/brya/variants/meliks/memory/Makefile.mk b/src/mainboard/google/brya/variants/meliks/memory/Makefile.mk new file mode 100644 index 0000000..eace2e4 --- /dev/null +++ b/src/mainboard/google/brya/variants/meliks/memory/Makefile.mk @@ -0,0 +1,5 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +# This is an auto-generated file. Do not edit!! +# Add memory parts in mem_parts_used.txt and run spd_tools to regenerate. + +SPD_SOURCES = placeholder diff --git a/src/mainboard/google/brya/variants/meliks/memory/dram_id.generated.txt b/src/mainboard/google/brya/variants/meliks/memory/dram_id.generated.txt new file mode 100644 index 0000000..fa24790 --- /dev/null +++ b/src/mainboard/google/brya/variants/meliks/memory/dram_id.generated.txt @@ -0,0 +1 @@ +DRAM Part Name ID to assign diff --git a/src/mainboard/google/brya/variants/meliks/memory/mem_parts_used.txt b/src/mainboard/google/brya/variants/meliks/memory/mem_parts_used.txt new file mode 100644 index 0000000..2499005 --- /dev/null +++ b/src/mainboard/google/brya/variants/meliks/memory/mem_parts_used.txt @@ -0,0 +1,11 @@ +# This is a CSV file containing a list of memory parts used by this variant. +# One part per line with an optional fixed ID in column 2. +# Only include a fixed ID if it is required for legacy reasons! +# Generated IDs are dependent on the order of parts in this file, +# so new parts must always be added at the end of the file! +# +# Generate an updated Makefile.mk and dram_id.generated.txt by running the +# part_id_gen tool from util/spd_tools. +# See util/spd_tools/README.md for more details and instructions. + +# Part Name diff --git a/src/mainboard/google/brya/variants/meliks/overridetree.cb b/src/mainboard/google/brya/variants/meliks/overridetree.cb new file mode 100644 index 0000000..4f2c04a --- /dev/null +++ b/src/mainboard/google/brya/variants/meliks/overridetree.cb @@ -0,0 +1,6 @@ +chip soc/intel/alderlake + + device domain 0 on + end + +end -- To view, visit https://review.coreboot.org/c/coreboot/+/86373?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iff5e27ef06a44976c2724751de0f9c6d5cf6eaaf Gerrit-Change-Number: 86373 Gerrit-PatchSet: 12 Gerrit-Owner: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Ricky Chang <rickytlchang(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[S] Change in coreboot[main]: mb/google/trulo/var/uldrenite: Add FW_CONFIG probe for fivr
by Matt DeVillier (Code Review) 20 Feb '25

20 Feb '25

Matt DeVillier has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86303?usp=email ) Change subject: mb/google/trulo/var/uldrenite: Add FW_CONFIG probe for fivr ...................................................................... mb/google/trulo/var/uldrenite: Add FW_CONFIG probe for fivr Uldrenite will support internal fivr in next phase and using fw_config to decide the board with internal or external fivr. BUG=b:394752422 BRANCH=firmware-trulo-15217.771.B TEST=boot to ChromeOS, cold reboot/suspend/recovery mode/install OS work normally Change-Id: I14233090f2445461cf422c1257f21556fd745b43 Signed-off-by: John Su <john_su(a)compal.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/86303 Reviewed-by: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Reviewed-by: Eric Lai <ericllai(a)google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/google/brya/variants/uldrenite/overridetree.cb M src/mainboard/google/brya/variants/uldrenite/variant.c 2 files changed, 28 insertions(+), 15 deletions(-) Approvals: build bot (Jenkins): Verified Dtrain Hsu: Looks good to me, approved Eric Lai: Looks good to me, approved diff --git a/src/mainboard/google/brya/variants/uldrenite/overridetree.cb b/src/mainboard/google/brya/variants/uldrenite/overridetree.cb index dd129d7..fdc933e 100644 --- a/src/mainboard/google/brya/variants/uldrenite/overridetree.cb +++ b/src/mainboard/google/brya/variants/uldrenite/overridetree.cb @@ -3,6 +3,10 @@ option CELLULAR_ABSENT 0 option CELLULAR_RW350R 1 end + field EXT_VR 3 3 + option EXT_VR_PRESENT 0 + option EXT_VR_ABSENT 1 + end field TOUCHSCREEN 4 4 option TOUCHSCREEN_UNKNOWN 0 option TOUCHSCREEN_NONE 1 @@ -100,21 +104,6 @@ register "pch_hda_idisp_link_frequency" = "HDA_LINKFREQ_96MHZ" register "pch_hda_idisp_codec_enable" = "1" - # Configure external V1P05/Vnn/VnnSx Rails - register "ext_fivr_settings" = "{ - .configure_ext_fivr = 1, - .v1p05_enable_bitmap = FIVR_ENABLE_ALL_SX & ~FIVR_ENABLE_S0, - .vnn_enable_bitmap = FIVR_ENABLE_ALL_SX, - .vnn_sx_enable_bitmap = FIVR_ENABLE_ALL_SX, - .v1p05_supported_voltage_bitmap = FIVR_VOLTAGE_NORMAL, - .vnn_supported_voltage_bitmap = FIVR_VOLTAGE_MIN_ACTIVE, - .v1p05_voltage_mv = 1050, - .vnn_voltage_mv = 780, - .vnn_sx_voltage_mv = 1050, - .v1p05_icc_max_ma = 500, - .vnn_icc_max_ma = 500, - }" - register "serial_io_i2c_mode" = "{ [PchSerialIoIndexI2C0] = PchSerialIoPci, [PchSerialIoIndexI2C1] = PchSerialIoPci, diff --git a/src/mainboard/google/brya/variants/uldrenite/variant.c b/src/mainboard/google/brya/variants/uldrenite/variant.c index 41ab7b8..3620c3a 100644 --- a/src/mainboard/google/brya/variants/uldrenite/variant.c +++ b/src/mainboard/google/brya/variants/uldrenite/variant.c @@ -83,3 +83,27 @@ mdelay(RW350R_PERST_DELAY_MS); gpio_configure_pads(rw350r_perst_pad, ARRAY_SIZE(rw350r_perst_pad)); } + +void variant_update_soc_chip_config(struct soc_intel_alderlake_config *config) +{ + if (fw_config_probe(FW_CONFIG(EXT_VR, EXT_VR_PRESENT))) { + /* # Configure external V1P05/Vnn/VnnSx Rails */ + config->ext_fivr_settings.configure_ext_fivr = 1; + config->ext_fivr_settings.v1p05_enable_bitmap = + FIVR_ENABLE_ALL_SX & ~FIVR_ENABLE_S0; + config->ext_fivr_settings.vnn_enable_bitmap = + FIVR_ENABLE_ALL_SX; + config->ext_fivr_settings.vnn_sx_enable_bitmap = + FIVR_ENABLE_ALL_SX; + config->ext_fivr_settings.v1p05_supported_voltage_bitmap = + FIVR_VOLTAGE_NORMAL; + config->ext_fivr_settings.vnn_supported_voltage_bitmap = + FIVR_VOLTAGE_MIN_ACTIVE; + config->ext_fivr_settings.v1p05_voltage_mv = 1050; + config->ext_fivr_settings.vnn_voltage_mv = 780; + config->ext_fivr_settings.vnn_sx_voltage_mv = 1050; + config->ext_fivr_settings.v1p05_icc_max_ma = 500; + config->ext_fivr_settings.vnn_icc_max_ma = 500; + printk(BIOS_INFO, "Configured External FIVR\n"); + } +} -- To view, visit https://review.coreboot.org/c/coreboot/+/86303?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I14233090f2445461cf422c1257f21556fd745b43 Gerrit-Change-Number: 86303 Gerrit-PatchSet: 3 Gerrit-Owner: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jamie Chen <jamie_chen(a)compal.corp-partner.google.com> Gerrit-CC: Van Chen <van_chen(a)compal.corp-partner.google.com>

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[XS] Change in coreboot[main]: mb/google/nissa/var/rull: Adjust SSD power sequencing to give the SSD...
by Matt DeVillier (Code Review) 20 Feb '25

20 Feb '25

Matt DeVillier has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86483?usp=email ) ( 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: mb/google/nissa/var/rull: Adjust SSD power sequencing to give the SSD more preparation time ...................................................................... mb/google/nissa/var/rull: Adjust SSD power sequencing to give the SSD more preparation time Improve SSD reset time by enabling earlier sequencing, save 230ms BUG=b:397098950 TEST=build and boot normal using NVMe Change-Id: I2e48a6614e8bded36d03138869b0eba7e1acb567 Signed-off-by: Rui Zhou <zhourui(a)huaqin.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/86483 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Subrata Banik <subratabanik(a)google.com> Reviewed-by: Eric Lai <ericllai(a)google.com> --- M src/mainboard/google/brya/variants/rull/gpio.c 1 file changed, 2 insertions(+), 0 deletions(-) Approvals: Subrata Banik: Looks good to me, approved build bot (Jenkins): Verified Eric Lai: Looks good to me, approved diff --git a/src/mainboard/google/brya/variants/rull/gpio.c b/src/mainboard/google/brya/variants/rull/gpio.c index 81bd280..24096d7 100644 --- a/src/mainboard/google/brya/variants/rull/gpio.c +++ b/src/mainboard/google/brya/variants/rull/gpio.c @@ -141,6 +141,8 @@ }; static const struct pad_config romstage_gpio_table[] = { + /* B4 : SSD_PERST_L */ + PAD_CFG_GPO(GPP_B4, 1, DEEP), }; const struct pad_config *variant_gpio_override_table(size_t *num) -- To view, visit https://review.coreboot.org/c/coreboot/+/86483?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I2e48a6614e8bded36d03138869b0eba7e1acb567 Gerrit-Change-Number: 86483 Gerrit-PatchSet: 5 Gerrit-Owner: Rui Zhou <zhourui(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org>

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[XS] Change in coreboot[main]: mb/starlabs/starbook/mtl: Correct HDMI HPD GPIO config
by Matt DeVillier (Code Review) 20 Feb '25

20 Feb '25

Matt DeVillier has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86495?usp=email ) Change subject: mb/starlabs/starbook/mtl: Correct HDMI HPD GPIO config ...................................................................... mb/starlabs/starbook/mtl: Correct HDMI HPD GPIO config This GPIO should be NF2, not NF1. Change-Id: I012acfa43ada5641b37f38892a1e3bfbc6e74843 Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/86495 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier(a)gmail.com> --- M src/mainboard/starlabs/starbook/variants/mtl/gpio.c 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Matt DeVillier: Looks good to me, approved diff --git a/src/mainboard/starlabs/starbook/variants/mtl/gpio.c b/src/mainboard/starlabs/starbook/variants/mtl/gpio.c index e64baa3..f951094 100644 --- a/src/mainboard/starlabs/starbook/variants/mtl/gpio.c +++ b/src/mainboard/starlabs/starbook/variants/mtl/gpio.c @@ -428,7 +428,7 @@ /* B15: */ PAD_NC(GPP_B15, NONE), /* B16: DDIB_DP_HPD */ - PAD_CFG_NF(GPP_B16, NONE, DEEP, NF1), + PAD_CFG_NF(GPP_B16, NONE, DEEP, NF2), /* B17: */ PAD_NC(GPP_B17, NONE), /* B18: BT_RF_KILL_N */ -- To view, visit https://review.coreboot.org/c/coreboot/+/86495?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I012acfa43ada5641b37f38892a1e3bfbc6e74843 Gerrit-Change-Number: 86495 Gerrit-PatchSet: 2 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[XS] Change in coreboot[main]: mb/google/nissa/var/meliks: Add VBT data file
by Kapil Porwal (Code Review) 20 Feb '25

20 Feb '25

Attention is currently required from: Dinesh Gehlot, Eric Lai, Jayvik Desai, Nick Vaccaro, SH Kim, Subrata Banik. Kapil Porwal has posted comments on this change by SH Kim. ( https://review.coreboot.org/c/coreboot/+/86508?usp=email ) Change subject: mb/google/nissa/var/meliks: Add VBT data file ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: > As we discussed in https://review.coreboot.org/c/coreboot/+/86373 and https://partnerissuetracker. […] Please check the gerrit build logs for CB:86373 at https://qa.coreboot.org/job/coreboot-gerrit/273452/consoleFull. In the build logs, look for the list of last 10 commits ("git log --oneline") to confirm that this CL (CB:86508) is not included and it is still not failing. -- To view, visit https://review.coreboot.org/c/coreboot/+/86508?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ifd21fbce6fdcc77ebb3d372fd7eebd7c4a2d789d Gerrit-Change-Number: 86508 Gerrit-PatchSet: 1 Gerrit-Owner: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Thu, 20 Feb 2025 13:40:42 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Comment-In-Reply-To: Kapil Porwal <kapilporwal(a)google.com>

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[XS] Change in coreboot[main]: soc/amd/phoenix: Remove outdated TODO comments
by Nick Kochlowski (Code Review) 20 Feb '25

20 Feb '25

Attention is currently required from: Ana Carolina Cabral, Felix Held, Fred Reitberger, Jason Glenesk, Matt DeVillier, Patrick Rudolph, Paul Menzel. Nick Kochlowski has posted comments on this change by Nick Kochlowski. ( https://review.coreboot.org/c/coreboot/+/85719?usp=email ) Change subject: soc/amd/phoenix: Remove outdated TODO comments ...................................................................... Patch Set 16: (1 comment) File src/soc/amd/phoenix/Kconfig: https://review.coreboot.org/c/coreboot/+/85719/comment/255a5953_a600723b?us… : PS16, Line 30: TODO > What about the other todos? Good question. I presume these config options are yet to be verified formally for Phoenix (although no apparent issues come up in recent tests), however I would propose this be done in another patch. The line being removed in this patch could be considered redundant and was introduced in the base commit for this file when copying the Kconfig of a previous SoC. -- To view, visit https://review.coreboot.org/c/coreboot/+/85719?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I137dbba5094ae8cbf842b45d6137c5b0528e5413 Gerrit-Change-Number: 85719 Gerrit-PatchSet: 16 Gerrit-Owner: Nick Kochlowski <nickkochlowski(a)gmail.com> Gerrit-Reviewer: Ana Carolina Cabral <ana.cpmelo95(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Ana Carolina Cabral <ana.cpmelo95(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 20 Feb 2025 13:22:17 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Patrick Rudolph <patrick.rudolph(a)9elements.com>

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[S] Change in coreboot[main]: mb/google/fatcat/var/felino: Modify the overridetree.cb for enable to...
by Weimin Wu (Code Review) 20 Feb '25

20 Feb '25

Attention is currently required from: Jayvik Desai, Kapil Porwal, Pranava Y N, Tongtong Pan. Weimin Wu has posted comments on this change by Tongtong Pan. ( https://review.coreboot.org/c/coreboot/+/86542?usp=email ) Change subject: mb/google/fatcat/var/felino: Modify the overridetree.cb for enable touchpad ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/86542?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I47667120f098727f0d3ef05c17ea48f62b13c135 Gerrit-Change-Number: 86542 Gerrit-PatchSet: 1 Gerrit-Owner: Tongtong Pan <pantongtong(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Dolan Liu <liuyong5(a)huaqin.corp-partner.google.com> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Tongtong Pan <pantongtong(a)huaqin.corp-partner.google.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Comment-Date: Thu, 20 Feb 2025 13:20:48 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in blobs[main]: soc/mediatek/mt8196: Update MCUPM firmware to v1.2
by Yidi Lin (Code Review) 20 Feb '25

20 Feb '25

Attention is currently required from: Jarried Lin, agogo. Yidi Lin has posted comments on this change by agogo. ( https://review.coreboot.org/c/blobs/+/86511?usp=email ) Change subject: soc/mediatek/mt8196: Update MCUPM firmware to v1.2 ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/blobs/+/86511?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: blobs Gerrit-Branch: main Gerrit-Change-Id: I81e745a7290c31fe15240102df0a78dfaadf54e7 Gerrit-Change-Number: 86511 Gerrit-PatchSet: 3 Gerrit-Owner: agogo <agogo.huang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: agogo <agogo.huang(a)mediatek.corp-partner.google.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Comment-Date: Thu, 20 Feb 2025 13:12:02 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: soc/mediatek/mt8189: Reduce bootblock size by separating SPI NOR GPIOs
by Yidi Lin (Code Review) 20 Feb '25

20 Feb '25

Attention is currently required from: Hung-Te Lin, Vince Liu. Yidi Lin has posted comments on this change by Vince Liu. ( https://review.coreboot.org/c/coreboot/+/86538?usp=email ) Change subject: soc/mediatek/mt8189: Reduce bootblock size by separating SPI NOR GPIOs ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86538?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If7e8e5c7db59b5f181db14f6e66df2f333dbb6d4 Gerrit-Change-Number: 86538 Gerrit-PatchSet: 2 Gerrit-Owner: Vince Liu <vince-wl.liu(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Vince Liu <vince-wl.liu(a)mediatek.com> Gerrit-Comment-Date: Thu, 20 Feb 2025 13:11:31 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[M] Change in coreboot[main]: soc/mediatek/mt8196: Move common functions to gpio_eint_v2.c
by Yidi Lin (Code Review) 20 Feb '25

20 Feb '25

Attention is currently required from: Hung-Te Lin, Vince Liu. Yidi Lin has posted comments on this change by Vince Liu. ( https://review.coreboot.org/c/coreboot/+/86541?usp=email ) Change subject: soc/mediatek/mt8196: Move common functions to gpio_eint_v2.c ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86541?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Id21f627a49f730f3a0db786a148f81806aeba287 Gerrit-Change-Number: 86541 Gerrit-PatchSet: 1 Gerrit-Owner: Vince Liu <vince-wl.liu(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Vince Liu <vince-wl.liu(a)mediatek.com> Gerrit-Comment-Date: Thu, 20 Feb 2025 13:06:23 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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