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Change subject: soc/intel/pantherlake: Display Sign-of-Life during memory training
......................................................................
Patch Set 23:
(1 comment)
File src/soc/intel/pantherlake/romstage/fsp_params.c:
https://review.coreboot.org/c/coreboot/+/85454/comment/39342e54_4252f9e2?us… :
PS21, Line 387: m_cfg->VgaMessage = (efi_uintn_t)ux_locales_get_text(UX_LOCALE_MSG_MEMORY_TRAINING);
> Even if we decide to take no action, we can update the TODO with the reason for code duplication. […]
There is no good reason for a "TO-DO" in the code because the code is complete, and the refactoring we are considering is beyond the scope of this particular early Sign-of-Life Change List (CL). In addition, the code duplication approach is not new; it has been ongoing for a few generations already, and there are some good reasons behind it.
I understand that we want to challenge the status quo, and I am the first in line to push for changes in that area, as code duplication creates more maintenance work and prevents improvements from cascading to all generations. Our only goal should be to ensure that we track this activity. An extra TO-DO is superfluous and looks like code pollution to me in this particular case.
We have a bug tracker opened (b/398872610), and we can move the discussion to another Change List (CL) available at <https://review.coreboot.org/c/coreboot/+/86532>.
Let's close this discussion since this CL needs to land, and holding it back is not justified.
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Change subject: drivers/usb/intel-bluetooth: Remove the _PR3 Object
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Patch Set 1: Code-Review+2
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Change subject: soc/amd/cezanne/acpi: Add ACP MSG0 method
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Patch Set 3: Code-Review+1
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Change subject: soc/amd/glinda/cpu: Implement soc_fill_cpu_cache_info helper
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Patch Set 4:
(2 comments)
File src/soc/amd/glinda/cpu.c:
https://review.coreboot.org/c/coreboot/+/85640/comment/c0b827f4_7badd6bf?us… :
PS4, Line 39: s
> maybe add a comment like: `get local APIC ID` at the end of the line. […]
Nope. it doesn't works. lapicid doesn't reflect the physical core id
https://review.coreboot.org/c/coreboot/+/85640/comment/10ac30e3_bdc60fba?us… :
PS4, Line 41: __fls(info->num_cores_shared-1);
> it may make sense to use `log2` directly, since that is also what is used in the AMD64 specification […]
Yes __fls it uses log2.
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Change subject: drivers/usb/intel_bluetooth: Guard BTRK if no GPIO passed
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Patch Set 13: Code-Review+2
(1 comment)
Patchset:
PS11:
> this needs to be moved after CB:86400 so you're dereferencing the GPIO struct and not an integer
Done
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Change subject: drivers/usb/acpi: Account for GPIO polarity
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Patch Set 15: Code-Review+2
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Change subject: soc/amd/cezanne/acpi: Add ACP MSG0 method
......................................................................
soc/amd/cezanne/acpi: Add ACP MSG0 method
Add the MSG0 method to the ACP's SSDT entry, so that the ACP driver can
talk to a certain mailbox interface.
Change-Id: I34f641fbfe40b5df7f0ff2fc173510c5cf2a7f61
Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de>
---
M src/soc/amd/cezanne/acpi.c
1 file changed, 62 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/86466/3
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