coreboot-gerrit February 2025

coreboot-gerrit@coreboot.org

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[M] Change in coreboot[main]: vc/google/chromeos: Implement platform callback for critical shutdown
by Subrata Banik (Code Review) 06 Feb '25

06 Feb '25

Attention is currently required from: Karthik Ramasubramanian. Hello Karthik Ramasubramanian, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/86228?usp=email to look at the new patch set (#4). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: vc/google/chromeos: Implement platform callback for critical shutdown ...................................................................... vc/google/chromeos: Implement platform callback for critical shutdown This commit implements `platform_is_low_battery_shutdown_needed` and `platform_issue_low_battery_shutdown` callbacks for ChromeOS. - platform_is_low_battery_shutdown_needed: API to check if low battery shutdown is needed. - platform_issue_low_battery_shutdown: API to issue a shutdown due to low battery. BUG=b:339673254 TEST=Verified low battery boot event logging and controlled shutdown. Change-Id: I119f80a45c045a6095cae98f179c755a2e948e9c Signed-off-by: Subrata Banik <subratabanik(a)google.com> --- M src/vendorcode/google/chromeos/Makefile.mk A src/vendorcode/google/chromeos/battery.c 2 files changed, 67 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/86228/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/86228?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I119f80a45c045a6095cae98f179c755a2e948e9c Gerrit-Change-Number: 86228 Gerrit-PatchSet: 4 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com>

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[S] Change in coreboot[main]: drivers/intel/fsp2_0: Add platform callback for critical shutdown
by Subrata Banik (Code Review) 06 Feb '25

06 Feb '25

Attention is currently required from: Andrey Petrov, Intel coreboot Reviewers, Julius Werner, Karthik Ramasubramanian, Ronak Kanabar. Hello Andrey Petrov, Intel coreboot Reviewers, Julius Werner, Karthik Ramasubramanian, Ronak Kanabar, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/86226?usp=email to look at the new patch set (#5). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: drivers/intel/fsp2_0: Add platform callback for critical shutdown ...................................................................... drivers/intel/fsp2_0: Add platform callback for critical shutdown This commit adds the `platform_is_low_battery_shutdown_needed` callback to the FSP API. This allows platforms to integrate low-battery handling logic directly into the FSP silicon initialization process. By checking for critical conditions (e.g., low battery) within this callback after FSP silicon initialization, the platform can initiate a controlled shutdown before proceeding with further boot stages, preventing abrupt shutdowns later in the boot process. BUG=b:339673254 TEST=Able to build and boot google/brox. Change-Id: I2d6677d70dea3d24f5a19d70608fd21229a271a0 Signed-off-by: Subrata Banik <subratabanik(a)google.com> --- M src/drivers/intel/fsp2_0/include/fsp/api.h M src/drivers/intel/fsp2_0/silicon_init.c M src/lib/bmp_logo.c 3 files changed, 26 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/86226/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/86226?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I2d6677d70dea3d24f5a19d70608fd21229a271a0 Gerrit-Change-Number: 86226 Gerrit-PatchSet: 5 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com>

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[S] Change in coreboot[main]: soc/amd/common/block/graphics: Support non VGA IGDs
by Ana Carolina Cabral (Code Review) 06 Feb '25

06 Feb '25

Attention is currently required from: Fred Reitberger, Jason Glenesk, Matt DeVillier, Patrick Rudolph. Ana Carolina Cabral has posted comments on this change by Patrick Rudolph. ( https://review.coreboot.org/c/coreboot/+/86300?usp=email ) Change subject: soc/amd/common/block/graphics: Support non VGA IGDs ...................................................................... Patch Set 2: (1 comment) File src/soc/amd/common/block/graphics/graphics.c: https://review.coreboot.org/c/coreboot/+/86300/comment/4987b8e3_110a17f5?us… : PS2, Line 157: PCI_RAM_IMAGE_START Wouldn't `pci_rom_load` overwrite this address after the GOP driver runs? -- To view, visit https://review.coreboot.org/c/coreboot/+/86300?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6ab28aab74f3169d45d7d852a37ddfcfc75b7c88 Gerrit-Change-Number: 86300 Gerrit-PatchSet: 2 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ana Carolina Cabral <ana.cpmelo95(a)gmail.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Comment-Date: Thu, 06 Feb 2025 13:42:45 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: soc/amd/common/block/graphics: Support non VGA IGDs
by Felix Held (Code Review) 06 Feb '25

06 Feb '25

Attention is currently required from: Fred Reitberger, Jason Glenesk, Matt DeVillier, Patrick Rudolph. Felix Held has posted comments on this change by Patrick Rudolph. ( https://review.coreboot.org/c/coreboot/+/86300?usp=email ) Change subject: soc/amd/common/block/graphics: Support non VGA IGDs ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: maybe i've missed that, but this is likely missing a change to make the vfct generation part work for glinda. the vfct is essential for the amdgpu kernel driver being able to light up the displays -- To view, visit https://review.coreboot.org/c/coreboot/+/86300?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6ab28aab74f3169d45d7d852a37ddfcfc75b7c88 Gerrit-Change-Number: 86300 Gerrit-PatchSet: 2 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Comment-Date: Thu, 06 Feb 2025 13:29:54 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: soc/mediatek/mt8196: Correct assert conditions
by Yidi Lin (Code Review) 06 Feb '25

06 Feb '25

Yidi Lin has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/86302?usp=email ) Change subject: soc/mediatek/mt8196: Correct assert conditions ...................................................................... soc/mediatek/mt8196: Correct assert conditions Correct the assert conditions in dptx_hal_setswing_preemphasis() and dptx_hal_phy_set_swing_preemphasis(). BRANCH=rauru BUG=b:376357839 TEST=Verify FW screen with a 4 lanes panel on Hylia Change-Id: I8830b05c976ea2ba987de6333b93e2394d3403ba Signed-off-by: Yidi Lin <yidilin(a)chromium.org> --- M src/soc/mediatek/mt8196/dptx_hal.c 1 file changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/86302/1 diff --git a/src/soc/mediatek/mt8196/dptx_hal.c b/src/soc/mediatek/mt8196/dptx_hal.c index 168d62b..e6078ae 100644 --- a/src/soc/mediatek/mt8196/dptx_hal.c +++ b/src/soc/mediatek/mt8196/dptx_hal.c @@ -87,7 +87,7 @@ bool dptx_hal_setswing_preemphasis(struct mtk_dp *mtk_dp, int lane_num, u8 swing_value, u8 preemphasis) { - assert(lane_num < DPTX_LANE_MAX); + assert(lane_num <= DPTX_LANE_MAX); for (int i = 0; i < lane_num; ++i) { mtk_dp_phy_mask(mtk_dp, driving_offset[i], @@ -348,7 +348,7 @@ void dptx_hal_phy_set_swing_preemphasis(struct mtk_dp *mtk_dp, u8 lane_count, u8 *swing_val, u8 *preemphasis) { - assert(lane_count < DPTX_LANE_MAX); + assert(lane_count <= DPTX_LANE_MAX); for (int i = 0; i < lane_count; ++i) { mtk_dp_phy_mask(mtk_dp, driving_offset[i], -- To view, visit https://review.coreboot.org/c/coreboot/+/86302?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I8830b05c976ea2ba987de6333b93e2394d3403ba Gerrit-Change-Number: 86302 Gerrit-PatchSet: 1 Gerrit-Owner: Yidi Lin <yidilin(a)google.com>

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[S] Change in coreboot[main]: soc/amd/common/block/graphics: Support non VGA IGDs
by Patrick Rudolph (Code Review) 06 Feb '25

06 Feb '25

Attention is currently required from: Felix Held, Fred Reitberger, Jason Glenesk, Matt DeVillier. Hello Felix Held, Fred Reitberger, Jason Glenesk, Matt DeVillier, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/86300?usp=email to look at the new patch set (#2). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: soc/amd/common/block/graphics: Support non VGA IGDs ...................................................................... soc/amd/common/block/graphics: Support non VGA IGDs On glinda the IGD is no longer VGA compatible, thus use the D-segment over C-segment for the VBIOS location. Introduce a new Kconfig and select it where necessary to keep existing behaviour on older SoC while fixing FSP GOP init on glinda. TEST: FSP GOP on AMD/birman+ is able to find the VBIOS. Change-Id: I6ab28aab74f3169d45d7d852a37ddfcfc75b7c88 Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M src/soc/amd/cezanne/Kconfig M src/soc/amd/common/block/graphics/Kconfig M src/soc/amd/common/block/graphics/graphics.c M src/soc/amd/mendocino/Kconfig M src/soc/amd/phoenix/Kconfig M src/soc/amd/picasso/Kconfig M src/soc/amd/stoneyridge/Kconfig 7 files changed, 16 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/86300/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86300?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6ab28aab74f3169d45d7d852a37ddfcfc75b7c88 Gerrit-Change-Number: 86300 Gerrit-PatchSet: 2 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de>

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[M] Change in coreboot[main]: soc/amd/common/block/graphics: Use vbt_get()
by Patrick Rudolph (Code Review) 06 Feb '25

06 Feb '25

Attention is currently required from: Andrey Petrov, Felix Held, Fred Reitberger, Intel coreboot Reviewers, Jason Glenesk, Matt DeVillier, Ronak Kanabar. Hello Andrey Petrov, Felix Held, Fred Reitberger, Intel coreboot Reviewers, Jason Glenesk, Matt DeVillier, Ronak Kanabar, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/86299?usp=email to look at the new patch set (#2). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: soc/amd/common/block/graphics: Use vbt_get() ...................................................................... soc/amd/common/block/graphics: Use vbt_get() Implement vbt_get() on AMD and return the VBIOS location. This allows to drop the hardcoded addresses used in various places and return an address in DRAM that is reserved for FSP use. Change-Id: I92d76fc4df88fbce792b9d7c912c6799617704a0 Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M src/drivers/intel/fsp2_0/silicon_init.c M src/soc/amd/cezanne/fsp_s_params.c M src/soc/amd/common/block/graphics/graphics.c A src/soc/amd/common/block/include/amdblocks/vbt.h M src/soc/amd/glinda/fsp_s_params.c M src/soc/amd/mendocino/fsp_s_params.c M src/soc/amd/phoenix/fsp_s_params.c M src/soc/amd/picasso/fsp_s_params.c 8 files changed, 44 insertions(+), 19 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/86299/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86299?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I92d76fc4df88fbce792b9d7c912c6799617704a0 Gerrit-Change-Number: 86299 Gerrit-PatchSet: 2 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de>

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[S] Change in coreboot[main]: soc/amd: Document VBIOS handling
by Patrick Rudolph (Code Review) 06 Feb '25

06 Feb '25

Attention is currently required from: Felix Held, Fred Reitberger, Jason Glenesk, Matt DeVillier. Hello Felix Held, Fred Reitberger, Jason Glenesk, Matt DeVillier, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/86298?usp=email to look at the new patch set (#2). Change subject: soc/amd: Document VBIOS handling ...................................................................... soc/amd: Document VBIOS handling The code flow isn't that obvious in the beginning. You pass an address of the VBIOS to FSP, but don't load any VBIOS until BS_DEV_RESOURCES phase. Add comments to document what is done and when. This will help to improve the code in the next step. Change-Id: I643bc9088306d99cc0fbb79648809e16b068fb33 Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M src/soc/amd/cezanne/fsp_s_params.c M src/soc/amd/common/block/graphics/graphics.c M src/soc/amd/glinda/fsp_s_params.c M src/soc/amd/mendocino/fsp_s_params.c M src/soc/amd/phoenix/fsp_s_params.c M src/soc/amd/picasso/fsp_s_params.c 6 files changed, 38 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/86298/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86298?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I643bc9088306d99cc0fbb79648809e16b068fb33 Gerrit-Change-Number: 86298 Gerrit-PatchSet: 2 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de>

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[XL] Change in coreboot[main]: tests: Add unit tests for CFR
by Angel Pons (Code Review) 06 Feb '25

06 Feb '25

Attention is currently required from: Julius Werner, Patrick Rudolph. Angel Pons has posted comments on this change by Patrick Rudolph. ( https://review.coreboot.org/c/coreboot/+/78506?usp=email ) Change subject: tests: Add unit tests for CFR ...................................................................... Patch Set 5: (5 comments) File src/commonlib/bsd/cfr_parser.c: https://review.coreboot.org/c/coreboot/+/78506/comment/fe26dee7_afe3a86f?us… : PS5, Line 21: case CFR_TAG_OPTION_ENUM: : return sizeof(struct lb_cfr_numeric_option); : case CFR_TAG_OPTION_NUMBER: : return sizeof(struct lb_cfr_numeric_option); : case CFR_TAG_OPTION_BOOL: : return sizeof(struct lb_cfr_numeric_option); > Is there a reason for these case statements to be separate? They can look like that: […] I guess it's for visual consistency. For this kind of case-return approach I usually go for one-line: ``` case CFR_TAG_OPTION_ENUM: return sizeof(struct lb_cfr_numeric_option); case CFR_TAG_OPTION_NUMBER: return sizeof(struct lb_cfr_numeric_option); case CFR_TAG_OPTION_BOOL: return sizeof(struct lb_cfr_numeric_option); ``` (had to use spaces so that it'd show up nicely on Gerrit) https://review.coreboot.org/c/coreboot/+/78506/comment/228aeb14_2eaccd8d?us… : PS5, Line 31: default: Would it make sense to complain about unknown entries? https://review.coreboot.org/c/coreboot/+/78506/comment/a3d0a6c5_dd6e2c17?us… : PS5, Line 109: ret = cfr_iterate(&child, callback, priv); > How deep can recursion be here? If someone passes a long enough parent->child->child->... […] It generally shouldn't be a problem, since the structure must not have loops and won't get too deeply nested. Still, I think it would be nice to add a recursion guard. Maybe it can be a simple `max_depth` parameter? ``` static int cfr_iterate(const struct region_device *root, int (*callback)(const struct region_device *root, const struct region_device *child, void *priv), void *priv, int max_depth) { struct region_device child; struct lb_cfr_header hdr; int ret, size, offset; if (max_depth <= 0) return CB_ERR; ``` ```suggestion ret = cfr_iterate(&child, callback, priv, max_depth - 1); ``` https://review.coreboot.org/c/coreboot/+/78506/comment/ffb6cd3c_49f15f70?us… : PS5, Line 144: // FIXME checksum > Sorry, but I cannot allow the input parsing code to be submitted w/o checksum checking if there is o […] +1 File tests/drivers/cfr.c: https://review.coreboot.org/c/coreboot/+/78506/comment/1bd6bd45_e877ca2b?us… : PS5, Line 339: void *head = malloc(0x100000); : assert(head); nit: Hmmm, put this inside a helper function? -- To view, visit https://review.coreboot.org/c/coreboot/+/78506?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I758b157c97362a01fa89a8ad9d79bb154cbfb2c0 Gerrit-Change-Number: 78506 Gerrit-PatchSet: 5 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Jakub "Kuba" Czapiga <czapiga(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Comment-Date: Thu, 06 Feb 2025 12:24:38 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Jakub "Kuba" Czapiga <czapiga(a)google.com>

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[S] Change in coreboot[main]: CFR: Add min/max/step values and hex display flag for number options
by Angel Pons (Code Review) 06 Feb '25

06 Feb '25

Attention is currently required from: Filip Brozovic, Matt DeVillier, Sean Rhodes. Angel Pons has posted comments on this change by Filip Brozovic. ( https://review.coreboot.org/c/coreboot/+/86039?usp=email ) Change subject: CFR: Add min/max/step values and hex display flag for number options ...................................................................... Patch Set 5: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86039?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I2e70f1430fb1911f1ad974832f8abfe76f928ac3 Gerrit-Change-Number: 86039 Gerrit-PatchSet: 5 Gerrit-Owner: Filip Brozovic <fbrozovic(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Filip Brozovic <fbrozovic(a)gmail.com> Gerrit-Comment-Date: Thu, 06 Feb 2025 12:07:59 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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coreboot-gerrit February 2025