coreboot-gerrit February 2025

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[S] Change in coreboot[main]: drivers/intel/gma: Fix alignment of extended VBT in opregion
by Sean Rhodes (Code Review) 06 Feb '25

06 Feb '25

Sean Rhodes has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86275?usp=email ) ( 2 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: drivers/intel/gma: Fix alignment of extended VBT in opregion ...................................................................... drivers/intel/gma: Fix alignment of extended VBT in opregion Intel's reference implementation in Slimbootloader pads the area allocated for the extended VBT to the nearest 512-byte boundary, which strongly suggests that the Windows driver expects the same. TEST=build/boot Linux 6.9, Win11 on starlabs/starlite_adl, verify VBT read properly by OS. Change-Id: Ib3784eea6eb929ffec9672fc123b833c11c057e8 Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/86275 Reviewed-by: Jérémy Compostella <jeremy.compostella(a)intel.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/drivers/intel/gma/opregion.c 1 file changed, 7 insertions(+), 4 deletions(-) Approvals: build bot (Jenkins): Verified Jérémy Compostella: Looks good to me, approved diff --git a/src/drivers/intel/gma/opregion.c b/src/drivers/intel/gma/opregion.c index f97d373..92665e0 100644 --- a/src/drivers/intel/gma/opregion.c +++ b/src/drivers/intel/gma/opregion.c @@ -287,7 +287,7 @@ * values correctly for the opregion. */ static void opregion_add_ext_vbt(igd_opregion_t *opregion, uint8_t *ext_vbt, - optionrom_vbt_t *vbt) + optionrom_vbt_t *vbt, size_t ext_vbt_size) { opregion_header_t *header = &opregion->header; /* Copy VBT into extended VBT region (at offset 8 KiB) */ @@ -301,7 +301,7 @@ else opregion->mailbox3.rvda = (uintptr_t)ext_vbt; - opregion->mailbox3.rvds = vbt->hdr_vbt_size; + opregion->mailbox3.rvds = ext_vbt_size; } /* Initialize IGD OpRegion, called from ACPI code and OS drivers */ @@ -311,6 +311,7 @@ struct region_device rdev; optionrom_vbt_t *vbt = NULL; size_t opregion_size = sizeof(igd_opregion_t); + size_t ext_vbt_size; if (acpi_is_wakeup_s3()) return intel_gma_restore_opregion(); @@ -331,7 +332,9 @@ } /* Add the space for the extended VBT header even if it's not used */ - opregion_size += vbt->hdr_vbt_size; + /* Align the VBT to nearest 512 byte boundary */ + ext_vbt_size = ALIGN_UP(vbt->hdr_vbt_size, 512); + opregion_size += ext_vbt_size; opregion = cbmem_add(CBMEM_ID_IGD_OPREGION, opregion_size); if (!opregion) { @@ -353,7 +356,7 @@ if (is_ext_vbt_required(opregion, vbt)) { /* Place extended VBT just after opregion */ uint8_t *ext_vbt = (uint8_t *)opregion + sizeof(*opregion); - opregion_add_ext_vbt(opregion, ext_vbt, vbt); + opregion_add_ext_vbt(opregion, ext_vbt, vbt, ext_vbt_size); } else { /* Raw VBT size which can fit in gvd1 */ memcpy(opregion->vbt.gvd1, vbt, vbt->hdr_vbt_size); -- To view, visit https://review.coreboot.org/c/coreboot/+/86275?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib3784eea6eb929ffec9672fc123b833c11c057e8 Gerrit-Change-Number: 86275 Gerrit-PatchSet: 4 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[XS] Change in blobs[main]: soc/mediatek/mt8196: Update SSPM firmware to v4.0
by Jarried Lin (Code Review) 06 Feb '25

06 Feb '25

Attention is currently required from: Kenji Yu, Yidi Lin, Yu-Ping Wu. Jarried Lin has posted comments on this change by Kenji Yu. ( https://review.coreboot.org/c/blobs/+/86293?usp=email ) Change subject: soc/mediatek/mt8196: Update SSPM firmware to v4.0 ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/c/blobs/+/86293?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: blobs Gerrit-Branch: main Gerrit-Change-Id: Ic717aba8ec18c55659cb3197c19984718646bfec Gerrit-Change-Number: 86293 Gerrit-PatchSet: 2 Gerrit-Owner: Kenji Yu <kenji.yu(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Kenji Yu <kenji.yu(a)mediatek.corp-partner.google.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Thu, 06 Feb 2025 09:16:36 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: [test only] tree: Use default language versions
by Elyes Haouas (Code Review) 06 Feb '25

06 Feb '25

Elyes Haouas has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/86295?usp=email ) Change subject: [test only] tree: Use default language versions ...................................................................... [test only] tree: Use default language versions Let GCC and Clang use the default dialect. Change-Id: I4032841b58cbe59da90c8977c6023a2a4da31d77 Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> --- M Makefile.mk M payloads/libpayload/Makefile M payloads/libpayload/tests/Makefile.mk M tests/Makefile.common M util/cbfstool/Makefile.mk 5 files changed, 3 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/95/86295/1 diff --git a/Makefile.mk b/Makefile.mk index bc547de..de195bd 100644 --- a/Makefile.mk +++ b/Makefile.mk @@ -507,7 +507,6 @@ CFLAGS_common += -pipe CFLAGS_common += -g CFLAGS_common += -nostdinc -CFLAGS_common += -std=gnu11 CFLAGS_common += -nostdlib CFLAGS_common += -Wall CFLAGS_common += -Wundef diff --git a/payloads/libpayload/Makefile b/payloads/libpayload/Makefile index afe38dc..cdeacf3 100644 --- a/payloads/libpayload/Makefile +++ b/payloads/libpayload/Makefile @@ -216,7 +216,7 @@ AR := $(AR_$(ARCH-y)) endif -CFLAGS += -std=gnu11 $(CFLAGS_$(ARCH-y)) +CFLAGS += $(CFLAGS_$(ARCH-y)) ifneq ($(INNER_SCANBUILD),y) ifeq ($(CONFIG_LP_COMPILER_LLVM_CLANG),y) diff --git a/payloads/libpayload/tests/Makefile.mk b/payloads/libpayload/tests/Makefile.mk index a6cee5f..4194d8b 100644 --- a/payloads/libpayload/tests/Makefile.mk +++ b/payloads/libpayload/tests/Makefile.mk @@ -48,7 +48,7 @@ TEST_CFLAGS += -Wstrict-aliasing -Wshadow -Werror TEST_CFLAGS += -Wno-unknown-warning-option -Wno-source-mgr -Wno-main-return-type -TEST_CFLAGS += -std=gnu11 -ffunction-sections -fdata-sections -fno-builtin +TEST_CFLAGS += -ffunction-sections -fdata-sections -fno-builtin ifneq ($(filter-out 0,$(DEBUG)),) TEST_CFLAGS += -Og -ggdb3 diff --git a/tests/Makefile.common b/tests/Makefile.common index dd7cca2..70a368e 100644 --- a/tests/Makefile.common +++ b/tests/Makefile.common @@ -51,7 +51,7 @@ TEST_CFLAGS += -Wno-array-compare -Wno-trigraphs TEST_CFLAGS += -Wno-unused-but-set-variables -TEST_CFLAGS += -std=gnu11 -ffunction-sections -fdata-sections -fno-builtin +TEST_CFLAGS += -ffunction-sections -fdata-sections -fno-builtin ifneq ($(filter-out 0,$(DEBUG)),) TEST_CFLAGS += -Og -ggdb3 diff --git a/util/cbfstool/Makefile.mk b/util/cbfstool/Makefile.mk index 8577874..6b4df1d 100644 --- a/util/cbfstool/Makefile.mk +++ b/util/cbfstool/Makefile.mk @@ -140,7 +140,6 @@ TOOLCFLAGS += -mno-ms-bitfields endif ifeq ($(shell uname -o 2>/dev/null), Cygwin) -TOOLCFLAGS+=-std=gnu11 TOOLCPPFLAGS+=-D_GNU_SOURCE else TOOLCFLAGS+=-std=c11 -- To view, visit https://review.coreboot.org/c/coreboot/+/86295?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I4032841b58cbe59da90c8977c6023a2a4da31d77 Gerrit-Change-Number: 86295 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr>

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[XS] Change in coreboot[main]: soc/intel/pantherlake: Fix ACPI GPIO number
by Cliff Huang (Code Review) 06 Feb '25

06 Feb '25

Attention is currently required from: Intel coreboot Reviewers, Jayvik Desai, Kapil Porwal, Pranava Y N, Subrata Banik. Hello Intel coreboot Reviewers, Jayvik Desai, Kapil Porwal, Pranava Y N, Subrata Banik, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/86290?usp=email to look at the new patch set (#3). Change subject: soc/intel/pantherlake: Fix ACPI GPIO number ...................................................................... soc/intel/pantherlake: Fix ACPI GPIO number When using SOC_INTEL_COMMON_BLOCK_GPIO_MULTI_ACPI_DEVICES, ACPI GPIO number is the number from its community. In Panther Lake, each GPIO community is an individual pincntrl device. When GPIO number is provided, the offset from its community should be used rather than the number from the first GPIO pad. For instance, using vGPIO_3_11 ( i.e. GPP_VGPIO3_THC1) in community 3: from GPIO community3, INTC10BC:02/pins: ... pin 82 (vGPIO_3_11) 82:INTC10BC:02 GPIO .... [ACPI] -> 82 is the value the pin number/offset GPP_VGPI3_THC1 in the SSDT: Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { GpioInt (Level, ActiveLow, ExclusiveAndWake, PullDefault, 0x0000, "\\_SB.PCI0.GPI3", 0x00, ResourceConsumer, , ) { // Pin list 0x0052 } } Where "\\_SB.PCI0.GPI3 is GPIO community 3. Where 0x0052 is 82 (decimal), the offset used as ACPI GPIO number. BUG=none TEST=Check the number from _CRS GpinInt and GpIo objects from the SSDT and the GPIO number used should match with the community offset. Signed-off-by: Cliff Huang <cliff.huang(a)intel.com> Change-Id: Ic2ba67518fa173e13975478ccae5f8a1772ebf08 --- M src/soc/intel/pantherlake/Kconfig 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/86290/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/86290?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic2ba67518fa173e13975478ccae5f8a1772ebf08 Gerrit-Change-Number: 86290 Gerrit-PatchSet: 3 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com>

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[S] Change in coreboot[main]: mb/google/rauru: Support the panel with a load switch control
by Yidi Lin (Code Review) 06 Feb '25

06 Feb '25

Attention is currently required from: Hung-Te Lin, Paul Menzel, Yu-Ping Wu. Yidi Lin has posted comments on this change by Yidi Lin. ( https://review.coreboot.org/c/coreboot/+/86282?usp=email ) Change subject: mb/google/rauru: Support the panel with a load switch control ...................................................................... Patch Set 3: (1 comment) File src/mainboard/google/rauru/panel.c: https://review.coreboot.org/c/coreboot/+/86282/comment/c85614ad_e8dd69ea?us… : PS2, Line 45: PANEL > If this is not used, I'd prefer remove the definition. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/86282?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I57dcaa2a0b5af94fe3fa3eaf04e9f3159c51d144 Gerrit-Change-Number: 86282 Gerrit-PatchSet: 3 Gerrit-Owner: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Yang Wu <wuyang5(a)huaqin.corp-partner.google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Thu, 06 Feb 2025 09:08:58 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com>

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[S] Change in coreboot[main]: mb/google/rauru: Support the panel with a load switch control
by Yidi Lin (Code Review) 06 Feb '25

06 Feb '25

Attention is currently required from: Hung-Te Lin, Paul Menzel, Yidi Lin. Hello Hung-Te Lin, Paul Menzel, Yu-Ping Wu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/86282?usp=email to look at the new patch set (#3). The following approvals got outdated and were removed: Code-Review+1 by Paul Menzel, Verified+1 by build bot (Jenkins) Change subject: mb/google/rauru: Support the panel with a load switch control ...................................................................... mb/google/rauru: Support the panel with a load switch control The Rauru follower device goes `load switch` path to ensure the discharge timing meets the panel power-off sequence. Refactor panel.c to support this hardware change. Remove PANEL from fw_config since this is a board-specific change. BRANCH=rauru BUG=b:339580836 TEST=verify firmware screen on Navi Change-Id: I57dcaa2a0b5af94fe3fa3eaf04e9f3159c51d144 Signed-off-by: Yidi Lin <yidilin(a)chromium.org> --- M src/mainboard/google/rauru/devicetree.cb M src/mainboard/google/rauru/panel.c 2 files changed, 7 insertions(+), 14 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/86282/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/86282?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I57dcaa2a0b5af94fe3fa3eaf04e9f3159c51d144 Gerrit-Change-Number: 86282 Gerrit-PatchSet: 3 Gerrit-Owner: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Yang Wu <wuyang5(a)huaqin.corp-partner.google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Yidi Lin <yidilin(a)google.com>

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[XS] Change in coreboot[main]: mb/starlabs/starbook/adl: Change soft strap GPIO to DEEP reset
by Sean Rhodes (Code Review) 06 Feb '25

06 Feb '25

Sean Rhodes has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86289?usp=email ) Change subject: mb/starlabs/starbook/adl: Change soft strap GPIO to DEEP reset ...................................................................... mb/starlabs/starbook/adl: Change soft strap GPIO to DEEP reset This has no noticable affect apart from being more consistant with other boards. Change-Id: Ia2d9284a7dfd29f47356860d6085c7aa5b94adb4 Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/86289 Reviewed-by: Matt DeVillier <matt.devillier(a)gmail.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/starlabs/starbook/variants/adl/gpio.c 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: Matt DeVillier: Looks good to me, approved build bot (Jenkins): Verified diff --git a/src/mainboard/starlabs/starbook/variants/adl/gpio.c b/src/mainboard/starlabs/starbook/variants/adl/gpio.c index 0e71085..fb3d64d 100644 --- a/src/mainboard/starlabs/starbook/variants/adl/gpio.c +++ b/src/mainboard/starlabs/starbook/variants/adl/gpio.c @@ -310,7 +310,7 @@ /* F9: EC Sleep S0 */ PAD_NC(GPP_F9, NONE), /* F10: Weak Internal PD 20K */ - PAD_CFG_GPO(GPP_F10, 0, PLTRST), + PAD_CFG_GPO(GPP_F10, 0, DEEP), /* F11: TPM ID */ PAD_NC(GPP_F11, NONE), /* F12: Not Connected */ -- To view, visit https://review.coreboot.org/c/coreboot/+/86289?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia2d9284a7dfd29f47356860d6085c7aa5b94adb4 Gerrit-Change-Number: 86289 Gerrit-PatchSet: 2 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[S] Change in coreboot[main]: mb/starlabs/starbook/adl: Remove OverCurrent config
by Sean Rhodes (Code Review) 06 Feb '25

06 Feb '25

Sean Rhodes has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86288?usp=email ) Change subject: mb/starlabs/starbook/adl: Remove OverCurrent config ...................................................................... mb/starlabs/starbook/adl: Remove OverCurrent config The schematics show that these are not connected, so disconnect the GPIOs and set the ports to OC_SKIP. Change-Id: I9e2b087b348fbae12edaf085fb61776277514c93 Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/86288 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier(a)gmail.com> --- M src/mainboard/starlabs/starbook/variants/adl/devicetree.cb M src/mainboard/starlabs/starbook/variants/adl/gpio.c 2 files changed, 5 insertions(+), 5 deletions(-) Approvals: build bot (Jenkins): Verified Matt DeVillier: Looks good to me, approved diff --git a/src/mainboard/starlabs/starbook/variants/adl/devicetree.cb b/src/mainboard/starlabs/starbook/variants/adl/devicetree.cb index 341ea40..217c375 100644 --- a/src/mainboard/starlabs/starbook/variants/adl/devicetree.cb +++ b/src/mainboard/starlabs/starbook/variants/adl/devicetree.cb @@ -39,12 +39,12 @@ device ref gna on end device ref xhci on # Motherboard USB 3.0 Type-C - register "usb2_ports[0]" = "USB2_PORT_MID(OC5)" - register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC3)" + register "usb2_ports[0]" = "USB2_PORT_MID(OC_SKIP)" + register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Motherboard USB 3.0 Type-A register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" - register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC5)" + register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Daughterboard USB 3.0 Type-A register "usb2_ports[6]" = "USB2_PORT_MID(OC0)" diff --git a/src/mainboard/starlabs/starbook/variants/adl/gpio.c b/src/mainboard/starlabs/starbook/variants/adl/gpio.c index 0d15429..0e71085 100644 --- a/src/mainboard/starlabs/starbook/variants/adl/gpio.c +++ b/src/mainboard/starlabs/starbook/variants/adl/gpio.c @@ -69,7 +69,7 @@ /* A15: Test Point 52 */ PAD_NC(GPP_A15, NONE), /* A16: USB OverCurrent 3 */ - PAD_CFG_NF(GPP_A16, NONE, DEEP, NF1), + PAD_NC(GPP_A16, NONE), /* A17: Not Connected */ PAD_NC(GPP_A17, NONE), /* A18: DDI B DP HPD */ @@ -257,7 +257,7 @@ /* E8: DRAM Sleep */ PAD_CFG_NF(GPP_E8, NONE, DEEP, NF1), /* E9: USB OverCurrent 0 */ - PAD_CFG_NF(GPP_E9, NONE, DEEP, NF1), + PAD_NC(GPP_E9, NONE), /* E10: PWD Amplifier Input */ PAD_NC(GPP_E10, NONE), /* E11: TPM IRQ */ -- To view, visit https://review.coreboot.org/c/coreboot/+/86288?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I9e2b087b348fbae12edaf085fb61776277514c93 Gerrit-Change-Number: 86288 Gerrit-PatchSet: 2 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[XS] Change in coreboot[main]: mb/starlabs/starbook/adl: Change the HPD to DEEP reset
by Sean Rhodes (Code Review) 06 Feb '25

06 Feb '25

Sean Rhodes has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86287?usp=email ) Change subject: mb/starlabs/starbook/adl: Change the HPD to DEEP reset ...................................................................... mb/starlabs/starbook/adl: Change the HPD to DEEP reset DEEP proves more reliable on Linux with USB-C displays. Change-Id: I04e243c6409af64fef0996b474aa448ce32b2da9 Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/86287 Reviewed-by: Matt DeVillier <matt.devillier(a)gmail.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/starlabs/starbook/variants/adl/gpio.c 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Matt DeVillier: Looks good to me, approved diff --git a/src/mainboard/starlabs/starbook/variants/adl/gpio.c b/src/mainboard/starlabs/starbook/variants/adl/gpio.c index e1ecddc..0d15429 100644 --- a/src/mainboard/starlabs/starbook/variants/adl/gpio.c +++ b/src/mainboard/starlabs/starbook/variants/adl/gpio.c @@ -75,7 +75,7 @@ /* A18: DDI B DP HPD */ PAD_CFG_NF(GPP_A18, NONE, DEEP, NF1), /* A19: TCP0 HPD */ - PAD_CFG_NF(GPP_A19, NONE, PLTRST, NF1), + PAD_CFG_NF(GPP_A19, NONE, DEEP, NF1), /* A20: Test Point 44 */ PAD_NC(GPP_A20, NONE), /* A21: Fingerprint Reader Interrupt */ -- To view, visit https://review.coreboot.org/c/coreboot/+/86287?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I04e243c6409af64fef0996b474aa448ce32b2da9 Gerrit-Change-Number: 86287 Gerrit-PatchSet: 2 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[XS] Change in coreboot[main]: mb/starlabs/starbook/adl: Disconnect the WLAN Sleep GPIO
by Sean Rhodes (Code Review) 06 Feb '25

06 Feb '25

Sean Rhodes has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86286?usp=email ) Change subject: mb/starlabs/starbook/adl: Disconnect the WLAN Sleep GPIO ...................................................................... mb/starlabs/starbook/adl: Disconnect the WLAN Sleep GPIO The schematics show this pin isn't connected, so disconnect it. Change-Id: Ib21048fa0972231410b7e8f7829a9eeac1d065c7 Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/86286 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier(a)gmail.com> --- M src/mainboard/starlabs/starbook/variants/adl/gpio.c 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: Matt DeVillier: Looks good to me, approved build bot (Jenkins): Verified diff --git a/src/mainboard/starlabs/starbook/variants/adl/gpio.c b/src/mainboard/starlabs/starbook/variants/adl/gpio.c index 77be325..e1ecddc 100644 --- a/src/mainboard/starlabs/starbook/variants/adl/gpio.c +++ b/src/mainboard/starlabs/starbook/variants/adl/gpio.c @@ -37,7 +37,7 @@ /* GPD8: Suspend Clock */ PAD_CFG_NF(GPD8, NONE, DEEP, NF1), /* GPD9: Wireless LAN Sleep */ - PAD_CFG_NF(GPD9, NONE, DEEP, NF1), + PAD_NC(GPD9, NONE), /* GPD10: Sleep S5 */ PAD_NC(GPD10, NONE), /* GPD11: LAN PHY Enable */ -- To view, visit https://review.coreboot.org/c/coreboot/+/86286?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib21048fa0972231410b7e8f7829a9eeac1d065c7 Gerrit-Change-Number: 86286 Gerrit-PatchSet: 2 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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coreboot-gerrit February 2025