coreboot-gerrit February 2025

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[XS] Change in coreboot[main]: soc/mediatek/mt8196: Set the driving strength of SPMI-P to maximum
by Jarried Lin (Code Review) 10 Feb '25

10 Feb '25

Attention is currently required from: Hung-Te Lin, Jarried Lin, Yidi Lin. Hello Hung-Te Lin, Yidi Lin, Yu-Ping Wu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/86341?usp=email to look at the new patch set (#4). The following approvals got outdated and were removed: Code-Review+2 by Yidi Lin, Verified+1 by build bot (Jenkins) Change subject: soc/mediatek/mt8196: Set the driving strength of SPMI-P to maximum ............… [View More]

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[XS] Change in coreboot[main]: soc/mediatek/mt8196: Correct MMinfra vote register
by Jarried Lin (Code Review) 10 Feb '25

10 Feb '25

Attention is currently required from: Hung-Te Lin, Jarried Lin, Yidi Lin, Yu-Ping Wu. Hello Hung-Te Lin, Yidi Lin, Yu-Ping Wu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/86342?usp=email to look at the new patch set (#2). The following approvals got outdated and were removed: Code-Review+2 by Yidi Lin, Code-Review+2 by Yu-Ping Wu, Verified+1 by build bot (Jenkins) Change subject: soc/mediatek/mt8196: Correct MMinfra … [View More]

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[L] Change in coreboot[main]: mb/lenovo: Add ThinkCentre M900 (Skylake/LGA 1151)
by Jan Philipp Groß (Code Review) 10 Feb '25

10 Feb '25

Attention is currently required from: Alexander Couzens, Angel Pons, Felix Singer, Nicholas Chin, Paul Menzel. Jan Philipp Groß has posted comments on this change by Nicholas Chin. ( https://review.coreboot.org/c/coreboot/+/74187?usp=email ) Change subject: mb/lenovo: Add ThinkCentre M900 (Skylake/LGA 1151) ...................................................................... Patch Set 7: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/74187?usp=email To … [View More]

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[XS] Change in coreboot[main]: soc/mediatek/mt8196: Remove tvdpll3 disable/enable
by Yu-Ping Wu (Code Review) 10 Feb '25

10 Feb '25

Attention is currently required from: Hung-Te Lin, Jarried Lin. Yu-Ping Wu has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/86343?usp=email ) Change subject: soc/mediatek/mt8196: Remove tvdpll3 disable/enable ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/86343?usp=email To unsubscribe, or for help writing mail filters, visit https://… [View More]

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[XS] Change in coreboot[main]: soc/mediatek/mt8196: Correct MMinfra vote register
by Yu-Ping Wu (Code Review) 10 Feb '25

10 Feb '25

Attention is currently required from: Hung-Te Lin, Jarried Lin. Yu-Ping Wu has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/86342?usp=email ) Change subject: soc/mediatek/mt8196: Correct MMinfra vote register ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86342?usp=email To unsubscribe, or for help writing mail filters, visit https://… [View More]

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[XS] Change in coreboot[main]: soc/mediatek/mt8196: Correct MMinfra vote register
by Yu-Ping Wu (Code Review) 10 Feb '25

10 Feb '25

Attention is currently required from: Hung-Te Lin, Jarried Lin. Yu-Ping Wu has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/86342?usp=email ) Change subject: soc/mediatek/mt8196: Correct MMinfra vote register ...................................................................... Patch Set 1: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/86342/comment/53999f27_81bcbc27?us… : PS1, Line 9: fail failure -- To view, visit … [View More]

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[XS] Change in coreboot[main]: soc/mediatek/mt8196: Set the driving strength of SPMI-P to maximum
by Yu-Ping Wu (Code Review) 10 Feb '25

10 Feb '25

Attention is currently required from: Hung-Te Lin, Jarried Lin. Yu-Ping Wu has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/86341?usp=email ) Change subject: soc/mediatek/mt8196: Set the driving strength of SPMI-P to maximum ...................................................................... Patch Set 3: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/86341/comment/59ff6adb_ec3f32fe?us… : PS3, Line 10: maximum a … [View More]

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[XS] Change in coreboot[main]: soc/mediatek/mt8196: Remove tvdpll3 disable/enable
by Yidi Lin (Code Review) 10 Feb '25

10 Feb '25

Attention is currently required from: Hung-Te Lin, Jarried Lin, Yu-Ping Wu. Yidi Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/86343?usp=email ) Change subject: soc/mediatek/mt8196: Remove tvdpll3 disable/enable ...................................................................... Patch Set 1: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/86343/comment/c59ca8d5_ddd5736f?us… : PS1, Line 16: TEST=Bootup OK and … [View More]

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[XS] Change in coreboot[main]: soc/mediatek/mt8196: Remove tvdpll3 disable/enable
by Yidi Lin (Code Review) 10 Feb '25

10 Feb '25

Attention is currently required from: Hung-Te Lin, Jarried Lin, Yu-Ping Wu. Yidi Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/86343?usp=email ) Change subject: soc/mediatek/mt8196: Remove tvdpll3 disable/enable ...................................................................... Patch Set 1: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/86343/comment/d4dab760_31ecaff5?us… : PS1, Line 9: The enable operation … [View More]

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[XS] Change in coreboot[main]: soc/mediatek/mt8196: Correct MMinfra vote register
by Yidi Lin (Code Review) 10 Feb '25

10 Feb '25

Attention is currently required from: Hung-Te Lin, Jarried Lin, Yu-Ping Wu. Yidi Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/86342?usp=email ) Change subject: soc/mediatek/mt8196: Correct MMinfra vote register ...................................................................... Patch Set 1: Code-Review+2 (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/86342/comment/e6e12c94_622416f3?us… : PS1, Line 15: reduce … [View More]

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coreboot-gerrit February 2025