coreboot-gerrit February 2025

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[main]: mb/starlabs/starbook_adl_n: Fix USB port assignments/descriptions
by Sean Rhodes (Code Review) 10 Feb '25

10 Feb '25

Sean Rhodes has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/86346?usp=email ) Change subject: mb/starlabs/starbook_adl_n: Fix USB port assignments/descriptions ...................................................................... Set Ready For Review -- To view, visit https://review.coreboot.org/c/coreboot/+/86346?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If0b341f1c5f99b53df8fff69f8a58fa732adbbc4 Gerrit-Change-Number: 86346 Gerrit-PatchSet: 3 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Comment-Date: Mon, 10 Feb 2025 16:27:24 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: soc/mediatek/mt8196: Remove tvdpll3 disable/enable
by Yu-Ping Wu (Code Review) 10 Feb '25

10 Feb '25

Attention is currently required from: Guangjie Song, Hung-Te Lin, Jarried Lin, Yidi Lin. Yu-Ping Wu has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/86343?usp=email ) Change subject: soc/mediatek/mt8196: Remove tvdpll3 disable/enable ...................................................................... Patch Set 3: Code-Review+2 (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/86343/comment/65ad251a_a7fca481?us… : PS1, Line 9: The enable operation cause tvdpll3 cannot be disabled during suspend, : so we remove it. : tvdpll3 can be enabled/disabled according to its downstream clock : demand automatically. > yes […] 1. Add `by hardware` after `automatically` to make that clear 2. Do not start a new line between sentences, unless you want a new paragraph. -- To view, visit https://review.coreboot.org/c/coreboot/+/86343?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib9c72a1602c1f76dc94cca5c4a61a542a853560b Gerrit-Change-Number: 86343 Gerrit-PatchSet: 3 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Guangjie Song <guangjie.song(a)mediatek.corp-partner.google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Guangjie Song <guangjie.song(a)mediatek.corp-partner.google.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Comment-Date: Mon, 10 Feb 2025 16:01:17 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Guangjie Song <guangjie.song(a)mediatek.corp-partner.google.com> Comment-In-Reply-To: Yidi Lin <yidilin(a)google.com>

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[XS] Change in coreboot[main]: soc/mediatek/mt8196: Correct MMinfra vote register
by Yu-Ping Wu (Code Review) 10 Feb '25

10 Feb '25

Attention is currently required from: Hung-Te Lin, Jarried Lin. Yu-Ping Wu has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/86342?usp=email ) Change subject: soc/mediatek/mt8196: Correct MMinfra vote register ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86342?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7c23c3c53c68b0de85d8b6189b685de7f8398e8b Gerrit-Change-Number: 86342 Gerrit-PatchSet: 2 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Comment-Date: Mon, 10 Feb 2025 15:59:14 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: soc/mediatek/mt8196: Set the driving strength of SPMI-P to maximum
by Yu-Ping Wu (Code Review) 10 Feb '25

10 Feb '25

Attention is currently required from: Hung-Te Lin, Jarried Lin. Yu-Ping Wu has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/86341?usp=email ) Change subject: soc/mediatek/mt8196: Set the driving strength of SPMI-P to maximum ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86341?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I131fd04c0313c7ed64bbd123f61d9a6849c8def4 Gerrit-Change-Number: 86341 Gerrit-PatchSet: 4 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Comment-Date: Mon, 10 Feb 2025 15:58:54 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: ec/starlabs/merlin: Only include lid switch ACPI when needed
by Sean Rhodes (Code Review) 10 Feb '25

10 Feb '25

Attention is currently required from: Matt DeVillier. Sean Rhodes has posted comments on this change by Matt DeVillier. ( https://review.coreboot.org/c/coreboot/+/86322?usp=email ) Change subject: ec/starlabs/merlin: Only include lid switch ACPI when needed ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86322?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iecf3e2558e244cc0bec301a505c0bc86684954aa Gerrit-Change-Number: 86322 Gerrit-PatchSet: 2 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Comment-Date: Mon, 10 Feb 2025 15:58:06 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[NoOp] Change in coreboot[main]: mb/starlabs/starlite_adl: Increase display brightness at POST
by Sean Rhodes (Code Review) 10 Feb '25

10 Feb '25

Attention is currently required from: Matt DeVillier. Sean Rhodes has posted comments on this change by Matt DeVillier. ( https://review.coreboot.org/c/coreboot/+/86345?usp=email ) Change subject: mb/starlabs/starlite_adl: Increase display brightness at POST ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86345?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1704a3479c38510b29427d582ee14c740401cd38 Gerrit-Change-Number: 86345 Gerrit-PatchSet: 1 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Comment-Date: Mon, 10 Feb 2025 15:57:41 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[NoOp] Change in coreboot[main]: mb/starlabs/starlite_adl: Increase display brightness at POST
by Matt DeVillier (Code Review) 10 Feb '25

10 Feb '25

Matt DeVillier has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/86345?usp=email ) Change subject: mb/starlabs/starlite_adl: Increase display brightness at POST ...................................................................... mb/starlabs/starlite_adl: Increase display brightness at POST Adjust the POST brightness level in the VBT from 50 to 150 (max 255). Change-Id: I1704a3479c38510b29427d582ee14c740401cd38 Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com> --- M src/mainboard/starlabs/starlite_adl/variants/mk_v/data.vbt 1 file changed, 0 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/86345/1 diff --git a/src/mainboard/starlabs/starlite_adl/variants/mk_v/data.vbt b/src/mainboard/starlabs/starlite_adl/variants/mk_v/data.vbt index cbd4a5a..a985a4b 100644 --- a/src/mainboard/starlabs/starlite_adl/variants/mk_v/data.vbt +++ b/src/mainboard/starlabs/starlite_adl/variants/mk_v/data.vbt Binary files differ -- To view, visit https://review.coreboot.org/c/coreboot/+/86345?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1704a3479c38510b29427d582ee14c740401cd38 Gerrit-Change-Number: 86345 Gerrit-PatchSet: 1 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com>

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[S] Change in coreboot[main]: mb/starlabs/*: Use a safe configurations for DRAM Sleep GPIO
by Matt DeVillier (Code Review) 10 Feb '25

10 Feb '25

Matt DeVillier has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86332?usp=email ) Change subject: mb/starlabs/*: Use a safe configurations for DRAM Sleep GPIO ...................................................................... mb/starlabs/*: Use a safe configurations for DRAM Sleep GPIO The configuration used was copied from other boards in the tree, NF1/NF2. However, no Intel documents says that GPP_E8 has a native function. As it remains unclear if the other boards in the tree are misconfiugured, or the documents are incorrect, revert to a safe configuration for the GPIO. Change-Id: I49b8faa7f8712ad0ead22b7ccbfa6deca6046368 Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/86332 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier(a)gmail.com> --- M src/mainboard/starlabs/byte_adl/variants/mk_ii/gpio.c M src/mainboard/starlabs/starbook/variants/adl/gpio.c M src/mainboard/starlabs/starbook/variants/adl_n/gpio.c M src/mainboard/starlabs/starbook/variants/rpl/gpio.c M src/mainboard/starlabs/starfighter/variants/rpl/gpio.c M src/mainboard/starlabs/starlite_adl/variants/mk_v/gpio.c 6 files changed, 6 insertions(+), 6 deletions(-) Approvals: build bot (Jenkins): Verified Matt DeVillier: Looks good to me, approved diff --git a/src/mainboard/starlabs/byte_adl/variants/mk_ii/gpio.c b/src/mainboard/starlabs/byte_adl/variants/mk_ii/gpio.c index f17e3ae..8ec1666 100644 --- a/src/mainboard/starlabs/byte_adl/variants/mk_ii/gpio.c +++ b/src/mainboard/starlabs/byte_adl/variants/mk_ii/gpio.c @@ -256,7 +256,7 @@ /* E7: Embedded Controller SMI */ PAD_NC(GPP_E7, NONE), /* E8: DRAM Sleep */ - PAD_NC(GPP_E8, NONE), + PAD_CFG_GPO(GPP_E8, 1, DEEP), /* E9: USB OverCurrent 0 */ PAD_CFG_NF(GPP_E9, NONE, DEEP, NF1), /* E10: Not Connected */ diff --git a/src/mainboard/starlabs/starbook/variants/adl/gpio.c b/src/mainboard/starlabs/starbook/variants/adl/gpio.c index fb3d64d..2ab629f 100644 --- a/src/mainboard/starlabs/starbook/variants/adl/gpio.c +++ b/src/mainboard/starlabs/starbook/variants/adl/gpio.c @@ -255,7 +255,7 @@ /* E7: Embedded Controller SMI */ PAD_NC(GPP_E7, NONE), /* E8: DRAM Sleep */ - PAD_CFG_NF(GPP_E8, NONE, DEEP, NF1), + PAD_CFG_GPO(GPP_E8, 1, DEEP), /* E9: USB OverCurrent 0 */ PAD_NC(GPP_E9, NONE), /* E10: PWD Amplifier Input */ diff --git a/src/mainboard/starlabs/starbook/variants/adl_n/gpio.c b/src/mainboard/starlabs/starbook/variants/adl_n/gpio.c index b59ad9d..835d8f6 100644 --- a/src/mainboard/starlabs/starbook/variants/adl_n/gpio.c +++ b/src/mainboard/starlabs/starbook/variants/adl_n/gpio.c @@ -255,7 +255,7 @@ /* E7: Embedded Controller SMI */ PAD_NC(GPP_E7, NONE), /* E8: DRAM Sleep */ - PAD_CFG_NF(GPP_E8, NONE, DEEP, NF2), + PAD_CFG_GPO(GPP_E8, 1, DEEP), /* E9: USB OverCurrent 0 */ PAD_CFG_NF(GPP_E9, NONE, DEEP, NF1), /* E10: PWD Amplifier Input */ diff --git a/src/mainboard/starlabs/starbook/variants/rpl/gpio.c b/src/mainboard/starlabs/starbook/variants/rpl/gpio.c index e8c2550..5e3cd00 100644 --- a/src/mainboard/starlabs/starbook/variants/rpl/gpio.c +++ b/src/mainboard/starlabs/starbook/variants/rpl/gpio.c @@ -255,7 +255,7 @@ /* E7: Embedded Controller SMI */ PAD_NC(GPP_E7, NONE), /* E8: DRAM Sleep */ - PAD_CFG_NF(GPP_E8, NONE, DEEP, NF1), + PAD_CFG_GPO(GPP_E8, 1, DEEP), /* E9: USB OverCurrent 0 */ PAD_CFG_NF(GPP_E9, NONE, DEEP, NF1), /* E10: PWD Amplifier Input */ diff --git a/src/mainboard/starlabs/starfighter/variants/rpl/gpio.c b/src/mainboard/starlabs/starfighter/variants/rpl/gpio.c index 18c5651..a69b210 100644 --- a/src/mainboard/starlabs/starfighter/variants/rpl/gpio.c +++ b/src/mainboard/starlabs/starfighter/variants/rpl/gpio.c @@ -260,7 +260,7 @@ /* E7: Embedded Controller SMI */ PAD_NC(GPP_E7, NONE), /* E8: DRAM Sleep */ - PAD_CFG_NF(GPP_E8, NONE, DEEP, NF1), + PAD_CFG_GPO(GPP_E8, 1, DEEP), /* E9: USB OverCurrent 0 */ PAD_CFG_NF(GPP_E9, NONE, DEEP, NF1), /* E10: Not Connected */ diff --git a/src/mainboard/starlabs/starlite_adl/variants/mk_v/gpio.c b/src/mainboard/starlabs/starlite_adl/variants/mk_v/gpio.c index 4ca0ca5..edde160 100644 --- a/src/mainboard/starlabs/starlite_adl/variants/mk_v/gpio.c +++ b/src/mainboard/starlabs/starlite_adl/variants/mk_v/gpio.c @@ -254,7 +254,7 @@ /* E7: Embedded Controller SMI */ PAD_NC(GPP_E7, NONE), /* E8: DRAM Sleep */ - PAD_CFG_NF(GPP_E8, NONE, DEEP, NF2), + PAD_CFG_GPO(GPP_E8, 1, DEEP), /* E9: USB OverCurrent 0 */ PAD_NC(GPP_E9, NONE), /* E10: PWD Amplifier Input */ -- To view, visit https://review.coreboot.org/c/coreboot/+/86332?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I49b8faa7f8712ad0ead22b7ccbfa6deca6046368 Gerrit-Change-Number: 86332 Gerrit-PatchSet: 2 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[XS] Change in coreboot[main]: drivers/asmedia/asm1061: Align = only with tabs and not spaces
by Matt DeVillier (Code Review) 10 Feb '25

10 Feb '25

Matt DeVillier has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86335?usp=email ) Change subject: drivers/asmedia/asm1061: Align = only with tabs and not spaces ...................................................................... drivers/asmedia/asm1061: Align = only with tabs and not spaces The `.devices` line only had once space before the =, as the tab boundary is directly after the s of devices. The lines above had once space after the last tab, so the equal sign is closer to the left side. As the whole file aligns the equal sign, replace the space by a tab, and do *not* go the route of not aligning the equal signs. Change-Id: Ic49dc56263cafce3cfe40bb3ed7036fa25300f9f Signed-off-by: Paul Menzel <pmenzel(a)molgen.mpg.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/86335 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Elyes Haouas <ehaouas(a)noos.fr> --- M src/drivers/asmedia/asm1061.c 1 file changed, 3 insertions(+), 3 deletions(-) Approvals: build bot (Jenkins): Verified Elyes Haouas: Looks good to me, approved diff --git a/src/drivers/asmedia/asm1061.c b/src/drivers/asmedia/asm1061.c index 6d2edaa..29d2704 100644 --- a/src/drivers/asmedia/asm1061.c +++ b/src/drivers/asmedia/asm1061.c @@ -42,7 +42,7 @@ }; static const struct pci_driver asmedia_asm1061 __pci_driver = { - .ops = &asm1061_ops, - .vendor = 0x1b21, - .devices = pci_device_ids, + .ops = &asm1061_ops, + .vendor = 0x1b21, + .devices = pci_device_ids, }; -- To view, visit https://review.coreboot.org/c/coreboot/+/86335?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic49dc56263cafce3cfe40bb3ed7036fa25300f9f Gerrit-Change-Number: 86335 Gerrit-PatchSet: 2 Gerrit-Owner: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[S] Change in coreboot[main]: util/cbfstool/eventlog: Add low battery event type
by Matt DeVillier (Code Review) 10 Feb '25

10 Feb '25

Matt DeVillier has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86223?usp=email ) ( 12 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: util/cbfstool/eventlog: Add low battery event type ...................................................................... util/cbfstool/eventlog: Add low battery event type This commit adds a new event type, `ELOG_TYPE_LOW_BATTERY_INDICATOR`, to the event log. This event is logged when the system boots due to a low battery condition. It includes the reason for the shutdown, currently only supporting "Power Off". BUG=b:339673254 TEST=Able to capture the eventlog for low battery boot event. ``` > elogtool list 9 | 2025-02-03 09:44:19+0530 | Low Battery Boot | Power Off ``` Change-Id: I5cc5e5f540657c7dfd174a4928e697a272da813a Signed-off-by: Subrata Banik <subratabanik(a)google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/86223 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Julius Werner <jwerner(a)chromium.org> Reviewed-by: Dinesh Gehlot <digehlot(a)google.com> Reviewed-by: Karthik Ramasubramanian <kramasub(a)google.com> --- M src/commonlib/bsd/include/commonlib/bsd/elog.h M util/cbfstool/eventlog.c 2 files changed, 15 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Karthik Ramasubramanian: Looks good to me, approved Julius Werner: Looks good to me, approved Dinesh Gehlot: Looks good to me, approved diff --git a/src/commonlib/bsd/include/commonlib/bsd/elog.h b/src/commonlib/bsd/include/commonlib/bsd/elog.h index f7dc4a1..01f97f6 100644 --- a/src/commonlib/bsd/include/commonlib/bsd/elog.h +++ b/src/commonlib/bsd/include/commonlib/bsd/elog.h @@ -389,6 +389,9 @@ #define ELOG_FW_POST_RAM_CSE_SYNC 0x1 #define ELOG_FW_CSE_SYNC_AT_PAYLOAD 0x2 +#define ELOG_TYPE_LOW_BATTERY_INDICATOR 0xbe +#define ELOG_FW_ISSUE_SHUTDOWN 0x0 + /* Only the 7-LSB are used for size */ #define ELOG_MAX_EVENT_SIZE 0x7F diff --git a/util/cbfstool/eventlog.c b/util/cbfstool/eventlog.c index 4746670..2312b75 100644 --- a/util/cbfstool/eventlog.c +++ b/util/cbfstool/eventlog.c @@ -170,6 +170,7 @@ {ELOG_TYPE_PSR_DATA_LOST, "PSR data lost"}, {ELOG_TYPE_FW_SPLASH_SCREEN, "Firmware Splash Screen"}, {ELOG_TYPE_FW_CSE_SYNC, "Firmware CSE sync"}, + {ELOG_TYPE_LOW_BATTERY_INDICATOR, "Low Battery boot"}, {ELOG_TYPE_EOL, "End of log"}, }; @@ -491,6 +492,11 @@ {0, NULL}, }; + static const struct valstr low_battery_status[] = { + {ELOG_FW_ISSUE_SHUTDOWN, "Power Off"}, + {0, NULL}, + }; + size_t elog_type_to_min_size[] = { [ELOG_TYPE_LOG_CLEAR] = sizeof(uint16_t), [ELOG_TYPE_BOOT] = sizeof(uint32_t), @@ -513,6 +519,7 @@ [ELOG_TYPE_PSR_DATA_BACKUP] = sizeof(uint8_t), [ELOG_TYPE_FW_SPLASH_SCREEN] = sizeof(uint8_t), [ELOG_TYPE_FW_CSE_SYNC] = sizeof(uint8_t), + [ELOG_TYPE_LOW_BATTERY_INDICATOR] = sizeof(uint8_t), [0xff] = 0, }; @@ -684,6 +691,11 @@ eventlog_printf("%s", val2str(*cse_event, cse_sync_path_types)); break; } + case ELOG_TYPE_LOW_BATTERY_INDICATOR: { + const uint8_t *low_battery_event = event_get_data(event); + eventlog_printf("%s", val2str(*low_battery_event, low_battery_status)); + break; + } default: break; } -- To view, visit https://review.coreboot.org/c/coreboot/+/86223?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I5cc5e5f540657c7dfd174a4928e697a272da813a Gerrit-Change-Number: 86223 Gerrit-PatchSet: 17 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jérémy Compostella <jeremy.compostella(a)intel.com>

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coreboot-gerrit February 2025