coreboot-gerrit February 2025

coreboot-gerrit@coreboot.org

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[XS] Change in coreboot[main]: mainboard/google/fatcat: Fix SMBIOS Processor upgrade info
by Zhixing Ma (Code Review) 10 Feb '25

10 Feb '25

Attention is currently required from: Bora Guvendik. Zhixing Ma has posted comments on this change by Zhixing Ma. ( https://review.coreboot.org/c/coreboot/+/85960?usp=email ) Change subject: mainboard/google/fatcat: Fix SMBIOS Processor upgrade info ...................................................................... Patch Set 4: (1 comment) File src/mainboard/google/fatcat/Kconfig: https://review.coreboot.org/c/coreboot/+/85960/comment/5b646433_df629956?us… : PS3, Line 6: > can you please keep the alphabetical order. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/85960?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ica92d15e4a6123f928fceb77c7638e4c45d6dc7d Gerrit-Change-Number: 85960 Gerrit-PatchSet: 4 Gerrit-Owner: Zhixing Ma <zhixing.ma(a)intel.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-CC: Zhixing Ma <zhixing.ma(a)intel.corp-partner.google.com> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Comment-Date: Mon, 10 Feb 2025 21:57:23 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Bora Guvendik <bora.guvendik(a)intel.com>

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[XS] Change in coreboot[main]: mainboard/google/fatcat: Fix SMBIOS Processor upgrade info
by Zhixing Ma (Code Review) 10 Feb '25

10 Feb '25

Attention is currently required from: Jérémy Compostella, Zhixing Ma. Hello Jayvik Desai, Jérémy Compostella, Kapil Porwal, Pranava Y N, Subrata Banik, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85960?usp=email to look at the new patch set (#4). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: mainboard/google/fatcat: Fix SMBIOS Processor upgrade info ...................................................................... mainboard/google/fatcat: Fix SMBIOS Processor upgrade info The current SMBIOS for fatcat is missing processor upgrade info, This patch adds the missing value by enabling a kconfig flag. Refer to SMBIOS spec sheet for documentation on cpu socket values: https://web.archive.org/web/20221012222420/https://www.dmtf.org/sites/defau… BUG=NONE TEST=Boot and verified that SMBIOS processor upgrade value is correct. Change-Id: Ica92d15e4a6123f928fceb77c7638e4c45d6dc7d Signed-off-by: Zhixing Ma <zhixing.ma(a)intel.com> --- M src/mainboard/google/fatcat/Kconfig 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/85960/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/85960?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ica92d15e4a6123f928fceb77c7638e4c45d6dc7d Gerrit-Change-Number: 85960 Gerrit-PatchSet: 4 Gerrit-Owner: Zhixing Ma <zhixing.ma(a)intel.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-CC: Zhixing Ma <zhixing.ma(a)intel.corp-partner.google.com> Gerrit-Attention: Zhixing Ma <zhixing.ma(a)intel.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com>

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[XS] Change in coreboot[main]: mainboard/google/fatcat: Fix SMBIOS Processor upgrade info
by Bora Guvendik (Code Review) 10 Feb '25

10 Feb '25

Attention is currently required from: Jérémy Compostella, Zhixing Ma. Bora Guvendik has posted comments on this change by Zhixing Ma. ( https://review.coreboot.org/c/coreboot/+/85960?usp=email ) Change subject: mainboard/google/fatcat: Fix SMBIOS Processor upgrade info ...................................................................... Patch Set 3: (1 comment) File src/mainboard/google/fatcat/Kconfig: https://review.coreboot.org/c/coreboot/+/85960/comment/84d04a88_d78a287b?us… : PS3, Line 6: can you please keep the alphabetical order. -- To view, visit https://review.coreboot.org/c/coreboot/+/85960?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ica92d15e4a6123f928fceb77c7638e4c45d6dc7d Gerrit-Change-Number: 85960 Gerrit-PatchSet: 3 Gerrit-Owner: Zhixing Ma <zhixing.ma(a)intel.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-CC: Zhixing Ma <zhixing.ma(a)intel.corp-partner.google.com> Gerrit-Attention: Zhixing Ma <zhixing.ma(a)intel.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Comment-Date: Mon, 10 Feb 2025 21:48:28 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: mainboard/google/fatcat: Fix SMBIOS Processor upgrade info
by Zhixing Ma (Code Review) 10 Feb '25

10 Feb '25

Attention is currently required from: Bora Guvendik. Zhixing Ma has posted comments on this change by Zhixing Ma. ( https://review.coreboot.org/c/coreboot/+/85960?usp=email ) Change subject: mainboard/google/fatcat: Fix SMBIOS Processor upgrade info ...................................................................... Patch Set 3: (1 comment) File src/mainboard/google/fatcat/Kconfig: https://review.coreboot.org/c/coreboot/+/85960/comment/bebd93eb_cd7f1685?us… : PS2, Line 40: > need tab instead of space? Done -- To view, visit https://review.coreboot.org/c/coreboot/+/85960?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ica92d15e4a6123f928fceb77c7638e4c45d6dc7d Gerrit-Change-Number: 85960 Gerrit-PatchSet: 3 Gerrit-Owner: Zhixing Ma <zhixing.ma(a)intel.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-CC: Zhixing Ma <zhixing.ma(a)intel.corp-partner.google.com> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Comment-Date: Mon, 10 Feb 2025 21:42:09 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Bora Guvendik <bora.guvendik(a)intel.com>

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[XS] Change in coreboot[main]: mainboard/google/fatcat: Fix SMBIOS Processor upgrade info
by Zhixing Ma (Code Review) 10 Feb '25

10 Feb '25

Zhixing Ma has posted comments on this change by Zhixing Ma. ( https://review.coreboot.org/c/coreboot/+/85960?usp=email ) Change subject: mainboard/google/fatcat: Fix SMBIOS Processor upgrade info ...................................................................... Set Ready For Review -- To view, visit https://review.coreboot.org/c/coreboot/+/85960?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ica92d15e4a6123f928fceb77c7638e4c45d6dc7d Gerrit-Change-Number: 85960 Gerrit-PatchSet: 3 Gerrit-Owner: Zhixing Ma <zhixing.ma(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-CC: Zhixing Ma <zhixing.ma(a)intel.corp-partner.google.com> Gerrit-Comment-Date: Mon, 10 Feb 2025 21:40:58 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: soc/amd/mendocino/chipset_*: Enable gpp_bridge_[a/b/c] by default
by Maximilian Brune (Code Review) 10 Feb '25

10 Feb '25

Attention is currently required from: Felix Held, Fred Reitberger, Jason Glenesk, Jason Nien, Martin Roth, Matt DeVillier. Maximilian Brune has posted comments on this change by Maximilian Brune. ( https://review.coreboot.org/c/coreboot/+/86273?usp=email ) Change subject: soc/amd/mendocino/chipset_*: Enable gpp_bridge_[a/b/c] by default ...................................................................... Set Ready For Review -- To view, visit https://review.coreboot.org/c/coreboot/+/86273?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ife30f73495d44c98717e147602de10f5a6a89358 Gerrit-Change-Number: 86273 Gerrit-PatchSet: 4 Gerrit-Owner: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Mon, 10 Feb 2025 21:22:32 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: soc/amd/cezanne/chipset.cb: Enable gpp_bridge_[a/b/c] by default
by Maximilian Brune (Code Review) 10 Feb '25

10 Feb '25

Attention is currently required from: Felix Held, Fred Reitberger, Jason Glenesk, Jason Nien, Martin Roth, Matt DeVillier, Maximilian Brune. Maximilian Brune has posted comments on this change by Maximilian Brune. ( https://review.coreboot.org/c/coreboot/+/86272?usp=email ) Change subject: soc/amd/cezanne/chipset.cb: Enable gpp_bridge_[a/b/c] by default ...................................................................... Set Ready For Review -- To view, visit https://review.coreboot.org/c/coreboot/+/86272?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie34bb2abc0211963b2613d1b50b1767df31c1062 Gerrit-Change-Number: 86272 Gerrit-PatchSet: 3 Gerrit-Owner: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Mon, 10 Feb 2025 21:21:26 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: soc/amd/phoenix/chipset_*: Enable gpp_bridge_[a/b/c] by default
by Maximilian Brune (Code Review) 10 Feb '25

10 Feb '25

Attention is currently required from: Felix Held, Fred Reitberger, Jason Glenesk, Matt DeVillier. Maximilian Brune has posted comments on this change by Maximilian Brune. ( https://review.coreboot.org/c/coreboot/+/86271?usp=email ) Change subject: soc/amd/phoenix/chipset_*: Enable gpp_bridge_[a/b/c] by default ...................................................................... Set Ready For Review -- To view, visit https://review.coreboot.org/c/coreboot/+/86271?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic226fd93b431467c7fa3a53140102ff4fd327f40 Gerrit-Change-Number: 86271 Gerrit-PatchSet: 3 Gerrit-Owner: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Mon, 10 Feb 2025 21:21:23 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: soc/amd/glinda/chipset.cb: Enable gpp_bridge_[a/b/c] by default
by Maximilian Brune (Code Review) 10 Feb '25

10 Feb '25

Attention is currently required from: Patrick Rudolph. Maximilian Brune has posted comments on this change by Maximilian Brune. ( https://review.coreboot.org/c/coreboot/+/86270?usp=email ) Change subject: soc/amd/glinda/chipset.cb: Enable gpp_bridge_[a/b/c] by default ...................................................................... Patch Set 1: (1 comment) This change is ready for review. Commit Message: https://review.coreboot.org/c/coreboot/+/86270/comment/2c692279_04204a0d?us… : PS1, Line 9: TODO > Since FSP doesn't support disabling bridges and has no UPDs for that, they must be enabled in DT to […] Thanks. I will take that as commit-msg -- To view, visit https://review.coreboot.org/c/coreboot/+/86270?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Id28a29481f9a1bc570e47a9cb75613d3621b0d44 Gerrit-Change-Number: 86270 Gerrit-PatchSet: 1 Gerrit-Owner: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Comment-Date: Mon, 10 Feb 2025 21:21:18 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Patrick Rudolph <patrick.rudolph(a)9elements.com>

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[XS] Change in coreboot[main]: mb/emulation/spike-riscv/uart.c: Update UART address
by Maximilian Brune (Code Review) 10 Feb '25

10 Feb '25

Attention is currently required from: Philipp Hug, ron minnich. Maximilian Brune has posted comments on this change by Maximilian Brune. ( https://review.coreboot.org/c/coreboot/+/85852?usp=email ) Change subject: mb/emulation/spike-riscv/uart.c: Update UART address ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/85852/comment/f32db692_4d83b2ac?us… : PS1, Line 9: Simualator > Simulator Done -- To view, visit https://review.coreboot.org/c/coreboot/+/85852?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I0e3db9d8b141c733bf609f906018096e3594ce83 Gerrit-Change-Number: 85852 Gerrit-PatchSet: 2 Gerrit-Owner: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: Philipp Hug <philipp(a)hug.cx> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: ron minnich <rminnich(a)gmail.com> Gerrit-Attention: Philipp Hug <philipp(a)hug.cx> Gerrit-Attention: ron minnich <rminnich(a)gmail.com> Gerrit-Comment-Date: Mon, 10 Feb 2025 21:11:35 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nicholas Chin <nic.c3.14(a)gmail.com>

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