coreboot-gerrit February 2025

coreboot-gerrit@coreboot.org

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[L] Change in coreboot[main]: mb/google/nissa/var/dirks: Add initial override devicetree
by Ivy Jian (Code Review) 09 Feb '25

09 Feb '25

Attention is currently required from: David Wu, Dinesh Gehlot, Eric Lai, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Subrata Banik. Ivy Jian has posted comments on this change by Ivy Jian. ( https://review.coreboot.org/c/coreboot/+/86250?usp=email ) Change subject: mb/google/nissa/var/dirks: Add initial override devicetree ...................................................................... Patch Set 3: (1 comment) File src/mainboard/google/brya/variants/dirks/overridetree.cb: https://review.coreboot.org/c/coreboot/+/86250/comment/2658f2ed_39f7996d?us… : PS2, Line 264: > use tab? Done -- To view, visit https://review.coreboot.org/c/coreboot/+/86250?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic0b80e3121d94ede771ecc30cf0c66a67b9a41d0 Gerrit-Change-Number: 86250 Gerrit-PatchSet: 3 Gerrit-Owner: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Reviewer: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Mon, 10 Feb 2025 02:06:02 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com>

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[L] Change in coreboot[main]: mb/google/nissa/var/dirks: Add initial override devicetree
by Ivy Jian (Code Review) 09 Feb '25

09 Feb '25

Attention is currently required from: David Wu, Dinesh Gehlot, Eric Lai, Ivy Jian, Jayvik Desai, Kapil Porwal, Nick Vaccaro. Hello David Wu, Dinesh Gehlot, Eric Lai, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Subrata Banik, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/86250?usp=email to look at the new patch set (#3). The following approvals got outdated and were removed: Code-Review+2 by David Wu, Code-Review+2 by Eric Lai, Verified+1 by build bot (Jenkins) Change subject: mb/google/nissa/var/dirks: Add initial override devicetree ...................................................................... mb/google/nissa/var/dirks: Add initial override devicetree Add initial override devicetree for dirks based on the latest schematic (0W4_TWL_A_MB_0120.pdf). - Add eMMC DLL tuning value (copy from riven) - Configure I2C buses - Configure USB ports - Configure audio codec - Configure WIFI6(CNVi) and WIFI7(PCIe) Note : There will be a separate CL to configure the implementation of repurposing the TCSS port to USB Type-A after FSP support is added. BUG=b:389391653 TEST=none. Change-Id: Ic0b80e3121d94ede771ecc30cf0c66a67b9a41d0 Signed-off-by: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> --- M src/mainboard/google/brya/variants/dirks/overridetree.cb 1 file changed, 345 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/86250/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/86250?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic0b80e3121d94ede771ecc30cf0c66a67b9a41d0 Gerrit-Change-Number: 86250 Gerrit-PatchSet: 3 Gerrit-Owner: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Reviewer: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org>

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[XS] Change in coreboot[main]: mb/google/nissa/var/pujjoniru: Tune I2C_5 parameters
by hualin wei (Code Review) 09 Feb '25

09 Feb '25

Attention is currently required from: Dinesh Gehlot, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Paul Menzel, Weimin Wu. hualin wei has posted comments on this change by hualin wei. ( https://review.coreboot.org/c/coreboot/+/86324?usp=email ) Change subject: mb/google/nissa/var/pujjoniru: Tune I2C_5 parameters ...................................................................... Patch Set 6: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/86324/comment/85797148_a91d339c?us… : PS5, Line 7: Update > Tune Done https://review.coreboot.org/c/coreboot/+/86324/comment/13f974ff_2f52831b?us… : PS5, Line 7: mb/google/nissa/var/pujjoniru: Update I2C_5 parameters > … to below 400 KHz Done -- To view, visit https://review.coreboot.org/c/coreboot/+/86324?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I3c8c8d3b78236247ca7be810ac152085f615a6ef Gerrit-Change-Number: 86324 Gerrit-PatchSet: 6 Gerrit-Owner: hualin wei <weihualin(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Qinghong Zeng <zengqinghong(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Cindy Lu <luyi8(a)huaqin.corp-partner.google.com> Gerrit-CC: Dolan Liu <liuyong5(a)huaqin.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-Comment-Date: Mon, 10 Feb 2025 01:03:05 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org>

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[XS] Change in coreboot[main]: mb/google/nissa/var/pujjoniru: Tune I2C_5 parameters
by hualin wei (Code Review) 09 Feb '25

09 Feb '25

Attention is currently required from: Dinesh Gehlot, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Weimin Wu, hualin wei. Hello Dinesh Gehlot, Eric Lai, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Qinghong Zeng, Subrata Banik, Weimin Wu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/86324?usp=email to look at the new patch set (#6). Change subject: mb/google/nissa/var/pujjoniru: Tune I2C_5 parameters ...................................................................... mb/google/nissa/var/pujjoniru: Tune I2C_5 parameters 1. Modify the I2C frequency of the touchpad to below 400 KHz to meet the spec. 2. Modify the Thd dat of DATA between 0.3 us and 0.9 us to meet the spec. Before: I2C5 - 407KHz Thd - 0.06us After: I2C5 - 387Khz Thd - 0.34us BUG=b:391796230,b:391788680 TEST=Check that the wave form meets the spec. Change-Id: I3c8c8d3b78236247ca7be810ac152085f615a6ef Signed-off-by: Hualin Wei <weihualin(a)huaqin.corp-partner.google.com> --- M src/mainboard/google/brya/variants/pujjoniru/overridetree.cb 1 file changed, 3 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/86324/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/86324?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I3c8c8d3b78236247ca7be810ac152085f615a6ef Gerrit-Change-Number: 86324 Gerrit-PatchSet: 6 Gerrit-Owner: hualin wei <weihualin(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Qinghong Zeng <zengqinghong(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Cindy Lu <luyi8(a)huaqin.corp-partner.google.com> Gerrit-CC: Dolan Liu <liuyong5(a)huaqin.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: hualin wei <weihualin(a)huaqin.corp-partner.google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com>

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[S] Change in coreboot[main]: ec/google/chromeec: Implement early power off
by Caveh Jalali (Code Review) 09 Feb '25

09 Feb '25

Attention is currently required from: Boris Mittelberg, Julius Werner, Karthik Ramasubramanian, Subrata Banik. Caveh Jalali has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/86337?usp=email ) Change subject: ec/google/chromeec: Implement early power off ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/86337?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia53469feb2a020b38a5414728159b09c86c7e32d Gerrit-Change-Number: 86337 Gerrit-PatchSet: 2 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Boris Mittelberg <bmbm(a)google.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: Boris Mittelberg <bmbm(a)google.com> Gerrit-Comment-Date: Sun, 09 Feb 2025 23:53:47 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[L] Change in coreboot[main]: mb/lenovo: Add ThinkCentre M900 (Skylake/LGA 1151)
by Nicholas Chin (Code Review) 09 Feb '25

09 Feb '25

Attention is currently required from: Alexander Couzens, Angel Pons, Felix Singer, Jan Philipp Groß, Paul Menzel. Nicholas Chin has posted comments on this change by Nicholas Chin. ( https://review.coreboot.org/c/coreboot/+/74187?usp=email ) Change subject: mb/lenovo: Add ThinkCentre M900 (Skylake/LGA 1151) ...................................................................... Patch Set 7: (3 comments) File src/mainboard/lenovo/m900/acpi/dptf.asl: PS4: > Yes, along with other DPTF stuff. […] Done File src/mainboard/lenovo/m900/cmos.layout: https://review.coreboot.org/c/coreboot/+/74187/comment/7d52f7ea_97d5b488?us… : PS4, Line 28: ChromeOS > Okay, then I'd at least update the comment to say vboot instead of ChromeOS Done File src/mainboard/lenovo/m900/ramstage.c: https://review.coreboot.org/c/coreboot/+/74187/comment/79001506_e70b1316?us… : PS4, Line 12: params->CdClock = 3; > I'm aware of what CdClock is for, I wanted to know why the code was setting the FSP UPD to 3, I gues […] Yeah, just copypasta. -- To view, visit https://review.coreboot.org/c/coreboot/+/74187?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I4e70c9f42c19f130a00170b32ae74b61f0483a22 Gerrit-Change-Number: 74187 Gerrit-PatchSet: 7 Gerrit-Owner: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Jan Philipp Groß <jeangrande(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jan Philipp Groß <jeangrande(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Comment-Date: Sun, 09 Feb 2025 22:00:03 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Nicholas Chin <nic.c3.14(a)gmail.com>

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[L] Change in coreboot[main]: mb/lenovo: Add ThinkCentre M900 (Skylake/LGA 1151)
by Nicholas Chin (Code Review) 09 Feb '25

09 Feb '25

Attention is currently required from: Alexander Couzens, Felix Singer, Jan Philipp Groß, Nicholas Chin, Paul Menzel. Hello Alexander Couzens, Jan Philipp Groß, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/74187?usp=email to look at the new patch set (#7). Change subject: mb/lenovo: Add ThinkCentre M900 (Skylake/LGA 1151) ...................................................................... mb/lenovo: Add ThinkCentre M900 (Skylake/LGA 1151) The mainboard is marked IQ1X0MS, though it is also known as the MS-7988. The Small Form Factor version was used for this port, though the Mini Tower seems to use the exact same board. Other systems such as the ThinkCentre M800, ThinkStation P310, ThinkStation P320, and IdeaCentre 700-25ISH appear to use the same PCB with different configurations of components. All the code in this port was originally copied from the Asrock H110M and then modified to match the actual configuration of the M900. The VBT was extracted using `intelvbttool -l -v data.vbt` while running version FWKTBFA of the vendor firmware. Working: - Boots to Linux with SeaBIOS 1.16.3 - Boots to Linux with EDK2 (MrChromebox uefipayload_202408) - Display Ports - VGA port - PCIe slots - Console over serial port - Front and rear USB 3.0 ports and internal USB2.0 headers - Front and rear audio jacks - Internal speaker - SATA ports 1-4 (5 and 6 are not populated on the M900) - Hardware monitoring via nct6683 kernel module - Gigabit Ethernet - S3 suspend/resume Unknown/untested: - M.2 E-key slot - Parallel port header - PS/2 Mouse/Keyboard via KB_MS1 header - TPM Change-Id: I4e70c9f42c19f130a00170b32ae74b61f0483a22 Signed-off-by: Nicholas Chin <nic.c3.14(a)gmail.com> --- A src/mainboard/lenovo/m900/Kconfig A src/mainboard/lenovo/m900/Kconfig.name A src/mainboard/lenovo/m900/Makefile.mk A src/mainboard/lenovo/m900/acpi/ec.asl A src/mainboard/lenovo/m900/acpi/superio.asl A src/mainboard/lenovo/m900/board_info.txt A src/mainboard/lenovo/m900/bootblock.c A src/mainboard/lenovo/m900/cmos.default A src/mainboard/lenovo/m900/cmos.layout A src/mainboard/lenovo/m900/data.vbt A src/mainboard/lenovo/m900/devicetree.cb A src/mainboard/lenovo/m900/dsdt.asl A src/mainboard/lenovo/m900/gma-mainboard.ads A src/mainboard/lenovo/m900/gpio.h A src/mainboard/lenovo/m900/hda_verb.c A src/mainboard/lenovo/m900/mainboard.c A src/mainboard/lenovo/m900/ramstage.c A src/mainboard/lenovo/m900/romstage.c 18 files changed, 751 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/74187/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/74187?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I4e70c9f42c19f130a00170b32ae74b61f0483a22 Gerrit-Change-Number: 74187 Gerrit-PatchSet: 7 Gerrit-Owner: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Jan Philipp Groß <jeangrande(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jan Philipp Groß <jeangrande(a)mailbox.org> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu>

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[L] Change in coreboot[main]: mb/lenovo: Add ThinkCentre M900 (Skylake/LGA 1151)
by Nicholas Chin (Code Review) 09 Feb '25

09 Feb '25

Attention is currently required from: Alexander Couzens, Felix Singer, Jan Philipp Groß, Nicholas Chin, Paul Menzel. Hello Alexander Couzens, Jan Philipp Groß, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/74187?usp=email to look at the new patch set (#6). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: mb/lenovo: Add ThinkCentre M900 (Skylake/LGA 1151) ...................................................................... mb/lenovo: Add ThinkCentre M900 (Skylake/LGA 1151) The mainboard is marked IQ1X0MS, though it is also known as the MS-7988. The Small Form Factor version was used for this port, though the Mini Tower seems to use the exact same board. Other systems such as the ThinkCentre M800, ThinkStation P310, ThinkStation P320, and IdeaCentre 700-25ISH appear to use the same PCB with different configurations of components. All the code in this port was originally copied from the Asrock H110M and then modified to match the actual configuration of the M900. The VBT was extracted using `intelvbttool -l -v data.vbt` while running version FWKTBFA of the vendor firmware. Working: - Boots to Linux with SeaBIOS 1.16.3 - Boots to Linux with EDK2 (MrChromebox uefipayload_202408) - Display Ports - VGA port - PCIe slots - Console over serial port - Front and rear USB 3.0 ports and internal USB2.0 headers - Front and rear audio jacks - Internal speaker - SATA ports 1-4 (5 and 6 are not populated on the M900) - Hardware monitoring via nct6683 kernel module - Gigabit Ethernet - S3 suspend/resume Unknown/untested: - M.2 E-key slot - Parallel port header - PS/2 Mouse/Keyboard via KB_MS1 header - TPM Change-Id: I4e70c9f42c19f130a00170b32ae74b61f0483a22 Signed-off-by: Nicholas Chin <nic.c3.14(a)gmail.com> --- A src/mainboard/lenovo/m900/Kconfig A src/mainboard/lenovo/m900/Kconfig.name A src/mainboard/lenovo/m900/Makefile.mk A src/mainboard/lenovo/m900/acpi/ec.asl A src/mainboard/lenovo/m900/acpi/superio.asl A src/mainboard/lenovo/m900/board_info.txt A src/mainboard/lenovo/m900/bootblock.c A src/mainboard/lenovo/m900/cmos.default A src/mainboard/lenovo/m900/cmos.layout A src/mainboard/lenovo/m900/data.vbt A src/mainboard/lenovo/m900/devicetree.cb A src/mainboard/lenovo/m900/dsdt.asl A src/mainboard/lenovo/m900/gma-mainboard.ads A src/mainboard/lenovo/m900/gpio.h A src/mainboard/lenovo/m900/hda_verb.c A src/mainboard/lenovo/m900/mainboard.c A src/mainboard/lenovo/m900/ramstage.c A src/mainboard/lenovo/m900/romstage.c 18 files changed, 751 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/74187/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/74187?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I4e70c9f42c19f130a00170b32ae74b61f0483a22 Gerrit-Change-Number: 74187 Gerrit-PatchSet: 6 Gerrit-Owner: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Jan Philipp Groß <jeangrande(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jan Philipp Groß <jeangrande(a)mailbox.org> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu>

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[XS] Change in coreboot[main]: mb/erying/tgl: Drop specifying which timers to use
by Angel Pons (Code Review) 09 Feb '25

09 Feb '25

Angel Pons has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86093?usp=email ) ( 5 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: mb/erying/tgl: Drop specifying which timers to use ...................................................................... mb/erying/tgl: Drop specifying which timers to use With 8254 timer enabled, system would hang while entering s0ix state. If we build coreboot with both timers =N, system enters s0ix state (although it doesn't cut the power to the platform) and can be woken up by pressing the key on the keyboard. Since there's less potential for data loss in case of accidental suspend, I think it makes sense to do it this way. Change-Id: If6e0ac1d289447c292a49111251d321c951078e2 Signed-off-by: Alicja Michalska <alicja.michalska(a)9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/86093 Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/erying/tgl/Kconfig 1 file changed, 0 insertions(+), 6 deletions(-) Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved diff --git a/src/mainboard/erying/tgl/Kconfig b/src/mainboard/erying/tgl/Kconfig index 01e5dd98..e8a2a1f 100644 --- a/src/mainboard/erying/tgl/Kconfig +++ b/src/mainboard/erying/tgl/Kconfig @@ -30,12 +30,6 @@ config CBFS_SIZE default 0xA00000 -config USE_PM_ACPI_TIMER - default n - -config USE_LEGACY_8254_TIMER - default y - config PCIEXP_ASPM default n -- To view, visit https://review.coreboot.org/c/coreboot/+/86093?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If6e0ac1d289447c292a49111251d321c951078e2 Gerrit-Change-Number: 86093 Gerrit-PatchSet: 7 Gerrit-Owner: Alicja Michalska <ahplka19(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Matt DeVillier <matt.devillier(a)gmail.com>

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[L] Change in coreboot[main]: mb/lenovo: Add ThinkCentre M900 (Skylake/LGA 1151)
by Angel Pons (Code Review) 09 Feb '25

09 Feb '25

Attention is currently required from: Alexander Couzens, Felix Singer, Jan Philipp Groß, Nicholas Chin, Paul Menzel. Angel Pons has posted comments on this change by Nicholas Chin. ( https://review.coreboot.org/c/coreboot/+/74187?usp=email ) Change subject: mb/lenovo: Add ThinkCentre M900 (Skylake/LGA 1151) ...................................................................... Patch Set 5: (1 comment) File src/mainboard/lenovo/m900/ramstage.c: https://review.coreboot.org/c/coreboot/+/74187/comment/220519e3_585fe585?us… : PS4, Line 12: params->CdClock = 3; > Seems like it corresponds to the Core Display Clock Frequency selection, based on a comment in `soc/ […] I'm aware of what CdClock is for, I wanted to know why the code was setting the FSP UPD to 3, I guess it's copypasta? :D -- To view, visit https://review.coreboot.org/c/coreboot/+/74187?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I4e70c9f42c19f130a00170b32ae74b61f0483a22 Gerrit-Change-Number: 74187 Gerrit-PatchSet: 5 Gerrit-Owner: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Jan Philipp Groß <jeangrande(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jan Philipp Groß <jeangrande(a)mailbox.org> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Comment-Date: Sun, 09 Feb 2025 21:39:21 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Nicholas Chin <nic.c3.14(a)gmail.com>

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coreboot-gerrit February 2025