coreboot-gerrit January 2025

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[XS] Change in coreboot[main]: mb/starlabs/starbook/adl_n: Fix PLD Group
by Sean Rhodes (Code Review) 22 Jan '25

22 Jan '25

Sean Rhodes has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86083?usp=email ) Change subject: mb/starlabs/starbook/adl_n: Fix PLD Group ...................................................................... mb/starlabs/starbook/adl_n: Fix PLD Group The group number was incorrect. Change-Id: I87928f190af2ed7fd00cb08283036aede7fd6383 Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/86083 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier(a)gmail.com> --- M src/mainboard/starlabs/starbook/variants/adl_n/devicetree.cb 1 file changed, 2 insertions(+), 2 deletions(-) Approvals: build bot (Jenkins): Verified Matt DeVillier: Looks good to me, approved diff --git a/src/mainboard/starlabs/starbook/variants/adl_n/devicetree.cb b/src/mainboard/starlabs/starbook/variants/adl_n/devicetree.cb index da8e14b..cf52628 100644 --- a/src/mainboard/starlabs/starbook/variants/adl_n/devicetree.cb +++ b/src/mainboard/starlabs/starbook/variants/adl_n/devicetree.cb @@ -109,13 +109,13 @@ chip drivers/usb/acpi register "desc" = ""Right USB Type-A"" register "type" = "UPC_TYPE_USB3_A" - register "group" = "ACPI_PLD_GROUP(0, 2)" + register "group" = "ACPI_PLD_GROUP(0, 3)" device ref usb2_port1 on end end chip drivers/usb/acpi register "desc" = ""Right USB Type-A"" register "type" = "UPC_TYPE_USB3_A" - register "group" = "ACPI_PLD_GROUP(0, 2)" + register "group" = "ACPI_PLD_GROUP(0, 3)" device ref usb3_port2 on end end chip drivers/usb/acpi -- To view, visit https://review.coreboot.org/c/coreboot/+/86083?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I87928f190af2ed7fd00cb08283036aede7fd6383 Gerrit-Change-Number: 86083 Gerrit-PatchSet: 2 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[XS] Change in coreboot[main]: mb/starlabs/starbook/adl_n: Fix inconsistant PLD Name
by Sean Rhodes (Code Review) 22 Jan '25

22 Jan '25

Sean Rhodes has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86082?usp=email ) Change subject: mb/starlabs/starbook/adl_n: Fix inconsistant PLD Name ...................................................................... mb/starlabs/starbook/adl_n: Fix inconsistant PLD Name Correct the position of the word "Back" so it's the same each interface of the port. Change-Id: I10285c081838b358f8708a69317ba6bf3b551eb2 Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/86082 Reviewed-by: Matt DeVillier <matt.devillier(a)gmail.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/starlabs/starbook/variants/adl_n/devicetree.cb 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: Matt DeVillier: Looks good to me, approved build bot (Jenkins): Verified diff --git a/src/mainboard/starlabs/starbook/variants/adl_n/devicetree.cb b/src/mainboard/starlabs/starbook/variants/adl_n/devicetree.cb index c9ad59c..da8e14b 100644 --- a/src/mainboard/starlabs/starbook/variants/adl_n/devicetree.cb +++ b/src/mainboard/starlabs/starbook/variants/adl_n/devicetree.cb @@ -77,7 +77,7 @@ device ref usb2_port2 on end end chip drivers/usb/acpi - register "desc" = ""USB Type-C Back"" + register "desc" = ""Back USB Type-C"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" register "group" = "ACPI_PLD_GROUP(0, 0)" device ref usb3_port3 on end -- To view, visit https://review.coreboot.org/c/coreboot/+/86082?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I10285c081838b358f8708a69317ba6bf3b551eb2 Gerrit-Change-Number: 86082 Gerrit-PatchSet: 2 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[XS] Change in coreboot[main]: mb/starlabs/starbook/adl_n: Correct the DRAM Sleep GPIO config
by Sean Rhodes (Code Review) 22 Jan '25

22 Jan '25

Sean Rhodes has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86077?usp=email ) Change subject: mb/starlabs/starbook/adl_n: Correct the DRAM Sleep GPIO config ...................................................................... mb/starlabs/starbook/adl_n: Correct the DRAM Sleep GPIO config This is NF2, not NF1. Change-Id: Ie99903b0947165a70d260f383889421500f10b4c Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/86077 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier(a)gmail.com> --- M src/mainboard/starlabs/starbook/variants/adl_n/gpio.c 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Matt DeVillier: Looks good to me, approved diff --git a/src/mainboard/starlabs/starbook/variants/adl_n/gpio.c b/src/mainboard/starlabs/starbook/variants/adl_n/gpio.c index 16bbff7..71b64bd 100644 --- a/src/mainboard/starlabs/starbook/variants/adl_n/gpio.c +++ b/src/mainboard/starlabs/starbook/variants/adl_n/gpio.c @@ -255,7 +255,7 @@ /* E7: Embedded Controller SMI */ PAD_NC(GPP_E7, NONE), /* E8: DRAM Sleep */ - PAD_CFG_NF(GPP_E8, NONE, DEEP, NF1), + PAD_CFG_NF(GPP_E8, NONE, DEEP, NF2), /* E9: USB OverCurrent 0 */ PAD_CFG_NF(GPP_E9, NONE, DEEP, NF1), /* E10: PWD Amplifier Input */ -- To view, visit https://review.coreboot.org/c/coreboot/+/86077?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie99903b0947165a70d260f383889421500f10b4c Gerrit-Change-Number: 86077 Gerrit-PatchSet: 2 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[XS] Change in coreboot[main]: mb/starlabs/starbook/adl_n: Set TCP0 HPD GPIO to DEEP
by Sean Rhodes (Code Review) 22 Jan '25

22 Jan '25

Sean Rhodes has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86076?usp=email ) Change subject: mb/starlabs/starbook/adl_n: Set TCP0 HPD GPIO to DEEP ...................................................................... mb/starlabs/starbook/adl_n: Set TCP0 HPD GPIO to DEEP Set the pad to DEEP, instead of PLTRST as this is more reliable when resuming from S3. Change-Id: Ida3713bbbce1eb9c6793fec2172005b4dfd54e86 Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/86076 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier(a)gmail.com> --- M src/mainboard/starlabs/starbook/variants/adl_n/gpio.c 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Matt DeVillier: Looks good to me, approved diff --git a/src/mainboard/starlabs/starbook/variants/adl_n/gpio.c b/src/mainboard/starlabs/starbook/variants/adl_n/gpio.c index 2388f5e..16bbff7 100644 --- a/src/mainboard/starlabs/starbook/variants/adl_n/gpio.c +++ b/src/mainboard/starlabs/starbook/variants/adl_n/gpio.c @@ -75,7 +75,7 @@ /* A18: DDI B DP HPD */ PAD_CFG_NF(GPP_A18, NONE, DEEP, NF1), /* A19: TCP0 HPD */ - PAD_CFG_NF(GPP_A19, NONE, PLTRST, NF1), + PAD_CFG_NF(GPP_A19, NONE, DEEP, NF1), /* A20: Test Point 44 */ PAD_NC(GPP_A20, NONE), /* A21: Fingerprint Reader Interrupt */ -- To view, visit https://review.coreboot.org/c/coreboot/+/86076?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ida3713bbbce1eb9c6793fec2172005b4dfd54e86 Gerrit-Change-Number: 86076 Gerrit-PatchSet: 2 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[S] Change in coreboot[main]: mb/starlabs/starbook/adl_n: Disconnect unused GPIOs
by Sean Rhodes (Code Review) 22 Jan '25

22 Jan '25

Sean Rhodes has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86075?usp=email ) Change subject: mb/starlabs/starbook/adl_n: Disconnect unused GPIOs ...................................................................... mb/starlabs/starbook/adl_n: Disconnect unused GPIOs These GPIO's are not used, so disconnect them or set the outputs low accordingly. Change-Id: I5e5f7587b59da0b91e7c247b4813c5e78d2c1313 Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/86075 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier(a)gmail.com> --- M src/mainboard/starlabs/starbook/variants/adl_n/gpio.c 1 file changed, 24 insertions(+), 24 deletions(-) Approvals: Matt DeVillier: Looks good to me, approved build bot (Jenkins): Verified diff --git a/src/mainboard/starlabs/starbook/variants/adl_n/gpio.c b/src/mainboard/starlabs/starbook/variants/adl_n/gpio.c index 5eea160..2388f5e 100644 --- a/src/mainboard/starlabs/starbook/variants/adl_n/gpio.c +++ b/src/mainboard/starlabs/starbook/variants/adl_n/gpio.c @@ -27,11 +27,11 @@ /* GPD3: Power Button */ PAD_CFG_NF(GPD3, UP_20K, DEEP, NF1), /* GPD4: Sleep S3 */ - PAD_CFG_NF(GPD4, NONE, DEEP, NF1), + PAD_NC(GPD4, NONE), /* GPD5: Sleep S4 */ - PAD_CFG_NF(GPD5, NONE, DEEP, NF1), + PAD_NC(GPD5, NONE), /* GPD6: Sleep A */ - PAD_CFG_NF(GPD6, NONE, DEEP, NF1), + PAD_NC(GPD6, NONE), /* GPD7: Power Adapter Disable */ PAD_CFG_GPO(GPD7, 0, PWROK), /* GPD8: Suspend Clock */ @@ -39,7 +39,7 @@ /* GPD9: Wireless LAN Sleep */ PAD_CFG_NF(GPD9, NONE, DEEP, NF1), /* GPD10: Sleep S5 */ - PAD_CFG_NF(GPD10, NONE, DEEP, NF1), + PAD_NC(GPD10, NONE), /* GPD11: LAN PHY Enable */ PAD_NC(GPD11, NONE), @@ -110,7 +110,7 @@ /* B11: Not Connected */ PAD_NC(GPP_B11, NONE), /* B12: PM SLP S0 */ - PAD_CFG_NF(GPP_B12, NONE, DEEP, NF1), + PAD_NC(GPP_B12, NONE), /* B13: PLT RST */ PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1), /* B14: Top Swap Override Weak Internal PD 20K @@ -206,7 +206,7 @@ /* D4: Not Connected */ PAD_NC(GPP_D4, NONE), /* D5: Clock Request 0 PCH M.2 SSD */ - PAD_CFG_NF(GPP_D5, NONE, DEEP, NF1), + PAD_CFG_NF(GPP_D5, NONE, DEEP, NF1), /* D6: Clock Request 1 Wireless LAN */ PAD_CFG_NF(GPP_D6, NONE, DEEP, NF1), /* D7: Clock Request 2 */ @@ -241,7 +241,7 @@ /* E1: Not used Accelerometer Interrupt */ PAD_NC(GPP_E1, NONE), /* E2: Not Connected */ - PAD_CFG_GPO(GPP_E2, 1, PLTRST), + PAD_NC(GPP_E2, NONE), /* E3: WiFi RF Kill */ PAD_CFG_GPO_GPIO_DRIVER(GPP_E3, 1, DEEP, NONE), /* E4: Test Point 14 */ @@ -259,7 +259,7 @@ /* E9: USB OverCurrent 0 */ PAD_CFG_NF(GPP_E9, NONE, DEEP, NF1), /* E10: PWD Amplifier Input */ - PAD_CFG_GPO(GPP_E10, 0, PLTRST), + PAD_NC(GPP_E10, NONE), /* E11: TPM IRQ */ PAD_CFG_NF(GPP_E11, NONE, DEEP, NF1), /* E12: Touchpad Interrupt */ @@ -273,7 +273,7 @@ /* E16: Not Connected */ PAD_NC(GPP_E16, NONE), /* E17: Not Connected */ - PAD_CFG_GPO(GPP_E17, 1, PLTRST), + PAD_NC(GPP_E17, NONE), /* E18: Not Connected */ PAD_NC(GPP_E18, NONE), /* E19: Thunderbolt LSX RXD */ @@ -304,13 +304,13 @@ /* F7: TBT LSX VCCIO Weak Internal PD 20K Low: 1.8V High: 3.3V */ - PAD_NC(GPP_F7, NONE), + PAD_CFG_GPO(GPP_F7, 0, DEEP), /* F8: Not Connected */ PAD_NC(GPP_F8, NONE), - /* F9: EC Sleep S0 */ - PAD_CFG_GPO(GPP_F9, 1, PLTRST), + /* F9: */ + PAD_NC(GPP_F9, NONE), /* F10: Weak Internal PD 20K */ - PAD_CFG_GPO(GPP_F10, 1, PLTRST), + PAD_CFG_GPO(GPP_F10, 0, DEEP), /* F11: TPM ID */ PAD_NC(GPP_F11, NONE), /* F12: Not Connected */ @@ -319,20 +319,20 @@ PAD_NC(GPP_F13, NONE), /* F14: Not Connected */ PAD_NC(GPP_F14, NONE), - /* F15: Not used Accelerometer Interrupt 2*/ + /* F15: Not used */ PAD_NC(GPP_F15, NONE), /* F16: Not Connected */ PAD_NC(GPP_F16, NONE), - /* F17: Not used Touch Panel Reset */ + /* F17: Not used */ PAD_NC(GPP_F17, NONE), - /* F18: Not used Touch Panel Interrupt */ + /* F18: Not used */ PAD_NC(GPP_F18, NONE), /* F19: Not Connected */ PAD_NC(GPP_F19, NONE), - /* F20: CPU M.2 SSD Reset */ + /* F20: Not Connected */ PAD_NC(GPP_F20, NONE), - /* F21: GPPC_F21 */ - PAD_CFG_NF(GPP_F21, NONE, DEEP, NF1), + /* F21: Not Connected */ + PAD_NC(GPP_F21, NONE), /* F22: Not Connected */ PAD_NC(GPP_F22, NONE), /* F23: Not Connected */ @@ -341,14 +341,14 @@ /* H0: PCH M.2 SSD Reset */ PAD_CFG_GPO(GPP_H0, 1, PLTRST), /* H1: BFX Strap 2 Bit 3 Weak Internal PD 20K */ - PAD_CFG_GPO(GPP_H1, 1, PLTRST), + PAD_CFG_GPO(GPP_H1, 0, DEEP), /* H2: Wireless LAN Reset */ PAD_CFG_GPO(GPP_H2, 1, PLTRST), /* H3: Not Connected */ PAD_NC(GPP_H3, NONE), /* H4: I2C 0 SDA Touchpad */ PAD_NC(GPP_H4, NONE), - /* H5: I2C 0 SDL Touchpad */ + /* H5: I2C 0 SCL Touchpad */ PAD_NC(GPP_H5, NONE), /* H6: Not Connected */ PAD_NC(GPP_H6, NONE), @@ -361,7 +361,7 @@ /* H12: Not Connected */ PAD_NC(GPP_H12, NONE), /* H13: PCH M.2 SSD Device Sleep */ - PAD_CFG_GPO(GPP_H13, 0, PLTRST), + PAD_NC(GPP_H13, NONE), /* H14: Not Connected */ PAD_NC(GPP_H14, NONE), /* H15: DDPB Control Clock */ @@ -388,9 +388,9 @@ /* S1: Not Connected */ PAD_NC(GPP_S1, NONE), /* S2: DMIC Clock */ - PAD_CFG_NF(GPP_S2, NONE, DEEP, NF2), + PAD_NC(GPP_S2, NONE), /* S3: DMIC Data */ - PAD_CFG_NF(GPP_S3, NONE, DEEP, NF2), + PAD_NC(GPP_S3, NONE), /* S4: Not Connected */ PAD_NC(GPP_S4, NONE), /* S5: Not Connected */ -- To view, visit https://review.coreboot.org/c/coreboot/+/86075?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I5e5f7587b59da0b91e7c247b4813c5e78d2c1313 Gerrit-Change-Number: 86075 Gerrit-PatchSet: 4 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[XS] Change in coreboot[main]: mb/starlabs/starbook/adl_n: Remove SSD detect delay
by Sean Rhodes (Code Review) 22 Jan '25

22 Jan '25

Sean Rhodes has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86074?usp=email ) Change subject: mb/starlabs/starbook/adl_n: Remove SSD detect delay ...................................................................... mb/starlabs/starbook/adl_n: Remove SSD detect delay This was copied from `starbook/adl` and is not needed. Change-Id: I9a234d8653c026b09411aa5b63ecba477aef325f Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/86074 Reviewed-by: Paul Menzel <paulepanter(a)mailbox.org> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier(a)gmail.com> --- M src/mainboard/starlabs/starbook/variants/adl_n/devicetree.cb 1 file changed, 0 insertions(+), 1 deletion(-) Approvals: Paul Menzel: Looks good to me, but someone else must approve Matt DeVillier: Looks good to me, approved build bot (Jenkins): Verified diff --git a/src/mainboard/starlabs/starbook/variants/adl_n/devicetree.cb b/src/mainboard/starlabs/starbook/variants/adl_n/devicetree.cb index 4db39bc..c9ad59c 100644 --- a/src/mainboard/starlabs/starbook/variants/adl_n/devicetree.cb +++ b/src/mainboard/starlabs/starbook/variants/adl_n/devicetree.cb @@ -187,7 +187,6 @@ .flags = PCIE_RP_LTR | PCIE_RP_AER, .pcie_rp_aspm = ASPM_L0S_L1, .PcieRpL1Substates = L1_SS_L1_2, - .pcie_rp_detect_timeout_ms = 50, }" smbios_slot_desc "SlotTypeM2Socket3" -- To view, visit https://review.coreboot.org/c/coreboot/+/86074?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I9a234d8653c026b09411aa5b63ecba477aef325f Gerrit-Change-Number: 86074 Gerrit-PatchSet: 2 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[XS] Change in coreboot[main]: mb/starlabs/starlite_adl: Enable DRAM sleep GPIO
by Sean Rhodes (Code Review) 22 Jan '25

22 Jan '25

Sean Rhodes has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86067?usp=email ) Change subject: mb/starlabs/starlite_adl: Enable DRAM sleep GPIO ...................................................................... mb/starlabs/starlite_adl: Enable DRAM sleep GPIO Change-Id: Ic07cace736ce9d97bf7352b17951fe706b57ecf3 Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/86067 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier(a)gmail.com> --- M src/mainboard/starlabs/starlite_adl/variants/mk_v/gpio.c 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Matt DeVillier: Looks good to me, approved diff --git a/src/mainboard/starlabs/starlite_adl/variants/mk_v/gpio.c b/src/mainboard/starlabs/starlite_adl/variants/mk_v/gpio.c index 002d0e5..cb4308f 100644 --- a/src/mainboard/starlabs/starlite_adl/variants/mk_v/gpio.c +++ b/src/mainboard/starlabs/starlite_adl/variants/mk_v/gpio.c @@ -254,7 +254,7 @@ /* E7: Embedded Controller SMI */ PAD_NC(GPP_E7, NONE), /* E8: DRAM Sleep */ - PAD_NC(GPP_E8, NONE), + PAD_CFG_NF(GPP_E8, NONE, DEEP, NF2), /* E9: USB OverCurrent 0 */ PAD_NC(GPP_E9, NONE), /* E10: PWD Amplifier Input */ -- To view, visit https://review.coreboot.org/c/coreboot/+/86067?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic07cace736ce9d97bf7352b17951fe706b57ecf3 Gerrit-Change-Number: 86067 Gerrit-PatchSet: 5 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[XS] Change in coreboot[main]: mb/starlabs/starlite_adl: Enable TLS Confidentiality GPIO
by Sean Rhodes (Code Review) 22 Jan '25

22 Jan '25

Sean Rhodes has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86066?usp=email ) Change subject: mb/starlabs/starlite_adl: Enable TLS Confidentiality GPIO ...................................................................... mb/starlabs/starlite_adl: Enable TLS Confidentiality GPIO This board does not have a 20K Pull Down resistor fitted here, meaning this will not change anything. However, it unifies the the configuration with the other Star Labs boards. Change-Id: Iee0adea21c124e0a421a1506310944cc883a73fb Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/86066 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier(a)gmail.com> --- M src/mainboard/starlabs/starlite_adl/variants/mk_v/gpio.c 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Matt DeVillier: Looks good to me, approved diff --git a/src/mainboard/starlabs/starlite_adl/variants/mk_v/gpio.c b/src/mainboard/starlabs/starlite_adl/variants/mk_v/gpio.c index dac6896..002d0e5 100644 --- a/src/mainboard/starlabs/starlite_adl/variants/mk_v/gpio.c +++ b/src/mainboard/starlabs/starlite_adl/variants/mk_v/gpio.c @@ -148,7 +148,7 @@ /* C2: TLS Confidentiality Weak Internal PD 20K Low: Disabled High: Enabled */ - PAD_CFG_GPO(GPP_C2, 0, DEEP), + PAD_CFG_GPO(GPP_C2, 1, PLTRST), /* C3: SML 0 Clock */ PAD_CFG_NF(GPP_C3, NONE, DEEP, NF1), /* C4: SML 0 Data */ -- To view, visit https://review.coreboot.org/c/coreboot/+/86066?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iee0adea21c124e0a421a1506310944cc883a73fb Gerrit-Change-Number: 86066 Gerrit-PatchSet: 4 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[S] Change in coreboot[main]: mb/starlabs/starlite_adl: Disconnect unused GPIOs
by Sean Rhodes (Code Review) 22 Jan '25

22 Jan '25

Sean Rhodes has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86065?usp=email ) ( 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: mb/starlabs/starlite_adl: Disconnect unused GPIOs ...................................................................... mb/starlabs/starlite_adl: Disconnect unused GPIOs These GPIO's are not used, so disconnect them. Change-Id: I68e0c8c840c811de733775e7a6f79d9d9e91bb8c Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/86065 Reviewed-by: Matt DeVillier <matt.devillier(a)gmail.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/starlabs/starlite_adl/variants/mk_v/gpio.c 1 file changed, 8 insertions(+), 8 deletions(-) Approvals: build bot (Jenkins): Verified Matt DeVillier: Looks good to me, approved diff --git a/src/mainboard/starlabs/starlite_adl/variants/mk_v/gpio.c b/src/mainboard/starlabs/starlite_adl/variants/mk_v/gpio.c index f57f122..dac6896 100644 --- a/src/mainboard/starlabs/starlite_adl/variants/mk_v/gpio.c +++ b/src/mainboard/starlabs/starlite_adl/variants/mk_v/gpio.c @@ -27,11 +27,11 @@ /* GPD3: Power Button */ PAD_CFG_NF(GPD3, UP_20K, DEEP, NF1), /* GPD4: Sleep S3 */ - PAD_CFG_NF(GPD4, NONE, DEEP, NF1), + PAD_NC(GPD4, NONE), /* GPD5: Sleep S4 */ - PAD_CFG_NF(GPD5, NONE, DEEP, NF1), + PAD_NC(GPD5, NONE), /* GPD6: Sleep A */ - PAD_CFG_NF(GPD6, NONE, DEEP, NF1), + PAD_NC(GPD6, NONE), /* GPD7: Power Adapter Disable */ PAD_CFG_GPO(GPD7, 0, PWROK), /* GPD8: Suspend Clock */ @@ -39,9 +39,9 @@ /* GPD9: Wireless LAN Sleep */ PAD_CFG_NF(GPD9, NONE, DEEP, NF1), /* GPD10: Sleep S5 */ - PAD_CFG_NF(GPD10, NONE, DEEP, NF1), + PAD_NC(GPD10, NONE), /* GPD11: LAN PHY Enable */ - PAD_CFG_GPO(GPD11, 0, PWROK), + PAD_NC(GPD11, NONE), /* A0: ESPI IO 0 */ /* A1: ESPI IO 1 */ @@ -69,7 +69,7 @@ /* A15: Camera Reset */ PAD_NC(GPP_A15, NONE), /* A16: USB OverCurrent 3 */ - PAD_CFG_NF(GPP_A16, NONE, DEEP, NF1), + PAD_NC(GPP_A16, NONE), /* A17: Not Connected */ PAD_NC(GPP_A17, NONE), /* A18: DDI B DP HPD */ @@ -111,7 +111,7 @@ /* B11: I2C PMC PD Interrupt Test Point 28 */ PAD_NC(GPP_B11, NONE), /* B12: PM SLP S0 */ - PAD_CFG_NF(GPP_B12, NONE, DEEP, NF1), + PAD_NC(GPP_B12, NONE), /* B13: PLT RST */ PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1), /* B14: Webcam Privacy LED */ @@ -256,7 +256,7 @@ /* E8: DRAM Sleep */ PAD_NC(GPP_E8, NONE), /* E9: USB OverCurrent 0 */ - PAD_CFG_NF(GPP_E9, NONE, DEEP, NF1), + PAD_NC(GPP_E9, NONE), /* E10: PWD Amplifier Input */ PAD_NC(GPP_E10, NONE), /* E11: TPM IRQ */ -- To view, visit https://review.coreboot.org/c/coreboot/+/86065?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I68e0c8c840c811de733775e7a6f79d9d9e91bb8c Gerrit-Change-Number: 86065 Gerrit-PatchSet: 3 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[S] Change in coreboot[main]: mb/starlabs/starlite_adl: Select more appropriate macros for USB ports
by Sean Rhodes (Code Review) 22 Jan '25

22 Jan '25

Sean Rhodes has submitted this change. ( https://review.coreboot.org/c/coreboot/+/85974?usp=email ) ( 8 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: mb/starlabs/starlite_adl: Select more appropriate macros for USB ports ...................................................................... mb/starlabs/starlite_adl: Select more appropriate macros for USB ports Add the trace lengths as comments, and update the macros used for the USB ports accordingly. Like other boards, avoid the `USB2_PORT_TYPE_C` macro, as it makes ports behave inconsistantly. Change-Id: Id193b3ed86c58aedc7d5a1f384f2829a2bf18671 Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/85974 Reviewed-by: Matt DeVillier <matt.devillier(a)gmail.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/starlabs/starlite_adl/variants/mk_v/devicetree.cb 1 file changed, 10 insertions(+), 10 deletions(-) Approvals: build bot (Jenkins): Verified Matt DeVillier: Looks good to me, approved diff --git a/src/mainboard/starlabs/starlite_adl/variants/mk_v/devicetree.cb b/src/mainboard/starlabs/starlite_adl/variants/mk_v/devicetree.cb index 8c87eff..cca6059 100644 --- a/src/mainboard/starlabs/starlite_adl/variants/mk_v/devicetree.cb +++ b/src/mainboard/starlabs/starlite_adl/variants/mk_v/devicetree.cb @@ -49,22 +49,22 @@ end device ref gna on end device ref xhci on - # Bottom USB 3.0 Type-C - register "usb2_ports[0]" = "USB2_PORT_MID(OC_SKIP)" + # Bottom USB 3.0 Type-C 3289 mil + register "usb2_ports[0]" = "USB2_PORT_SHORT(OC_SKIP)" register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC_SKIP)" - # Top USB 3.0 Type-C - register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)" + # Top USB 3.0 Type-C 4237 mil + register "usb2_ports[1]" = "USB2_PORT_SHORT(OC_SKIP)" register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" - # Detachable Keyboard + SD Card Reader - register "usb2_ports[2]" = "USB2_PORT_MID(OC_SKIP)" + # Detachable Keyboard + SD Card Reader 6418 mil + register "usb2_ports[2]" = "USB2_PORT_SHORT(OC_SKIP)" - # Camera + Webcam - register "usb2_ports[CONFIG_CCD_PORT]" = "USB2_PORT_MID(OC_SKIP)" + # Camera + Webcam 3249 mil + register "usb2_ports[CONFIG_CCD_PORT]" = "USB2_PORT_SHORT(OC_SKIP)" - # Internal Bluetooth - register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" + # Internal Bluetooth 1874 mil + register "usb2_ports[9]" = "USB2_PORT_SHORT(OC_SKIP)" chip drivers/usb/acpi device ref xhci_root_hub on -- To view, visit https://review.coreboot.org/c/coreboot/+/85974?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Id193b3ed86c58aedc7d5a1f384f2829a2bf18671 Gerrit-Change-Number: 85974 Gerrit-PatchSet: 10 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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