coreboot-gerrit January 2025

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[S] Change in blobs[main]: soc/mediatek/mt8196: Add mtk_fsp_romstage version v1.0
by Jarried Lin (Code Review) 23 Jan '25

23 Jan '25

Attention is currently required from: Yidi Lin, Yu-Ping Wu. Jarried Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/blobs/+/86110?usp=email ) Change subject: soc/mediatek/mt8196: Add mtk_fsp_romstage version v1.0 ...................................................................... Patch Set 4: (8 comments) Commit Message: https://review.coreboot.org/c/blobs/+/86110/comment/c970b01a_715bd4da?usp=e… : PS2, Line 9: It is a new blob named MediaTek firmware support package (mtk-fsp) in : romstage include power switch init. > mtk_fsp_romstage initializes power switch in romstage. Done File soc/mediatek/mt8196/README.md: https://review.coreboot.org/c/blobs/+/86110/comment/ac732203_f82f0b6d?usp=e… : PS2, Line 240: `mtk_fsp_romstage.elf` is an ELF format file > Remove this sentence, as it's trivial from the file name. Done https://review.coreboot.org/c/blobs/+/86110/comment/782737bf_7c90338d?usp=e… : PS2, Line 241: include > includes Done https://review.coreboot.org/c/blobs/+/86110/comment/531ffb0f_486694fe?usp=e… : PS2, Line 244: in > to Done https://review.coreboot.org/c/blobs/+/86110/comment/3583f9d0_e8005eda?usp=e… : PS2, Line 244: > This is a markdown file, so we don't need to align the text like this. […] Done https://review.coreboot.org/c/blobs/+/86110/comment/6fd11306_75f3a5b1?usp=e… : PS2, Line 245: such as the CVCC (Constant Voltage, Constant Current) : voltage of SRAM. > Note the line length. Done https://review.coreboot.org/c/blobs/+/86110/comment/156d6b34_09125054?usp=e… : PS2, Line 256: -1 > non-zero Done File soc/mediatek/mt8196/mtk_fsp_romstage_release_notes.txt: https://review.coreboot.org/c/blobs/+/86110/comment/423eb180_20520917?usp=e… : PS2, Line 4: > `2. […] Done -- To view, visit https://review.coreboot.org/c/blobs/+/86110?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: blobs Gerrit-Branch: main Gerrit-Change-Id: Ice4a51f375a86693674545a7730b16e656c57ac4 Gerrit-Change-Number: 86110 Gerrit-PatchSet: 4 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Thu, 23 Jan 2025 03:44:07 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Yidi Lin <yidilin(a)google.com> Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com>

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[S] Change in blobs[main]: soc/mediatek/mt8196: Add mtk_fsp_romstage version v1.0
by Jarried Lin (Code Review) 23 Jan '25

23 Jan '25

Attention is currently required from: Jarried Lin. Hello Yidi Lin, Yu-Ping Wu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/blobs/+/86110?usp=email to look at the new patch set (#4). Change subject: soc/mediatek/mt8196: Add mtk_fsp_romstage version v1.0 ...................................................................... soc/mediatek/mt8196: Add mtk_fsp_romstage version v1.0 mtk_fsp_romstage initializes power switch in romstage. TEST=Build pass BUG=b:373797027 Change-Id: Ice4a51f375a86693674545a7730b16e656c57ac4 Signed-off-by: Jarried Lin <jarried.lin(a)mediatek.corp-partner.google.com> --- M soc/mediatek/mt8196/README.md A soc/mediatek/mt8196/mtk_fsp_romstage.elf A soc/mediatek/mt8196/mtk_fsp_romstage.elf.md5 A soc/mediatek/mt8196/mtk_fsp_romstage_release_notes.txt 4 files changed, 30 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/blobs refs/changes/10/86110/4 -- To view, visit https://review.coreboot.org/c/blobs/+/86110?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: blobs Gerrit-Branch: main Gerrit-Change-Id: Ice4a51f375a86693674545a7730b16e656c57ac4 Gerrit-Change-Number: 86110 Gerrit-PatchSet: 4 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com>

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[S] Change in blobs[main]: soc/mediatek/mt8196: Add PI_IMG firmware v1.0
by Jarried Lin (Code Review) 23 Jan '25

23 Jan '25

Attention is currently required from: Yidi Lin, Yu-Ping Wu. Jarried Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/blobs/+/86095?usp=email ) Change subject: soc/mediatek/mt8196: Add PI_IMG firmware v1.0 ...................................................................... Patch Set 2: (1 comment) File soc/mediatek/mt8196/pi_img.img.md5: https://review.coreboot.org/c/blobs/+/86095/comment/63fd7e01_b1bf15ee?usp=e… : PS1, Line 1: 357c892eea80a341201b9493de177362 > Seems incorrect. My result starts with `d0f3`. Done -- To view, visit https://review.coreboot.org/c/blobs/+/86095?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: blobs Gerrit-Branch: main Gerrit-Change-Id: I4b36c928ad194f155442cf0e4314a826cfd3ef68 Gerrit-Change-Number: 86095 Gerrit-PatchSet: 2 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Comment-Date: Thu, 23 Jan 2025 03:41:22 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com>

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[S] Change in blobs[main]: soc/mediatek/mt8196: Add PI_IMG firmware v1.0
by Jarried Lin (Code Review) 23 Jan '25

23 Jan '25

Attention is currently required from: Yidi Lin, Yu-Ping Wu. Jarried Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/blobs/+/86095?usp=email ) Change subject: soc/mediatek/mt8196: Add PI_IMG firmware v1.0 ...................................................................... Patch Set 2: (3 comments) File soc/mediatek/mt8196/README.md: https://review.coreboot.org/c/blobs/+/86095/comment/5b41a8a9_6cbfa3d0?usp=e… : PS1, Line 222: mcupm > MCUPM Done https://review.coreboot.org/c/blobs/+/86095/comment/20d9b410_472626a2?usp=e… : PS1, Line 228: Use CBFS to load `pi_img.img`. > ``` […] Done https://review.coreboot.org/c/blobs/+/86095/comment/6eab0a67_ec99b97b?usp=e… : PS1, Line 229: No need to pass other parameters to pi_img > Missing `. […] Done -- To view, visit https://review.coreboot.org/c/blobs/+/86095?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: blobs Gerrit-Branch: main Gerrit-Change-Id: I4b36c928ad194f155442cf0e4314a826cfd3ef68 Gerrit-Change-Number: 86095 Gerrit-PatchSet: 2 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Comment-Date: Thu, 23 Jan 2025 03:40:08 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com>

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[S] Change in blobs[main]: soc/mediatek/mt8196: Add PI_IMG firmware v1.0
by Jarried Lin (Code Review) 23 Jan '25

23 Jan '25

Attention is currently required from: Jarried Lin, Yidi Lin. Hello Yidi Lin, Yu-Ping Wu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/blobs/+/86095?usp=email to look at the new patch set (#2). Change subject: soc/mediatek/mt8196: Add PI_IMG firmware v1.0 ...................................................................... soc/mediatek/mt8196: Add PI_IMG firmware v1.0 Add initial PI_IMG firmware using MTK release branch and align with MCUPM. TEST=Build pass BUG=b:317009620 Change-Id: I4b36c928ad194f155442cf0e4314a826cfd3ef68 Signed-off-by: Jarried Lin <jarried.lin(a)mediatek.corp-partner.google.com> --- M soc/mediatek/mt8196/README.md A soc/mediatek/mt8196/pi_img.img A soc/mediatek/mt8196/pi_img.img.md5 A soc/mediatek/mt8196/pi_img_release_notes.txt 4 files changed, 25 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/blobs refs/changes/95/86095/2 -- To view, visit https://review.coreboot.org/c/blobs/+/86095?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: blobs Gerrit-Branch: main Gerrit-Change-Id: I4b36c928ad194f155442cf0e4314a826cfd3ef68 Gerrit-Change-Number: 86095 Gerrit-PatchSet: 2 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com>

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[S] Change in blobs[main]: soc/mediatek/mt8196: Add mtk_fsp_romstage version v1.0
by Jarried Lin (Code Review) 23 Jan '25

23 Jan '25

Attention is currently required from: Jarried Lin. Hello Yidi Lin, Yu-Ping Wu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/blobs/+/86110?usp=email to look at the new patch set (#3). Change subject: soc/mediatek/mt8196: Add mtk_fsp_romstage version v1.0 ...................................................................... soc/mediatek/mt8196: Add mtk_fsp_romstage version v1.0 It is a new blob named MediaTek firmware support package (mtk-fsp) in romstage include power switch init. TEST=Build pass BUG=b:373797027 Change-Id: Ice4a51f375a86693674545a7730b16e656c57ac4 Signed-off-by: Jarried Lin <jarried.lin(a)mediatek.corp-partner.google.com> --- M soc/mediatek/mt8196/README.md A soc/mediatek/mt8196/mtk_fsp_romstage.elf A soc/mediatek/mt8196/mtk_fsp_romstage.elf.md5 A soc/mediatek/mt8196/mtk_fsp_romstage_release_notes.txt 4 files changed, 26 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/blobs refs/changes/10/86110/3 -- To view, visit https://review.coreboot.org/c/blobs/+/86110?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: blobs Gerrit-Branch: main Gerrit-Change-Id: Ice4a51f375a86693674545a7730b16e656c57ac4 Gerrit-Change-Number: 86110 Gerrit-PatchSet: 3 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com>

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[XS] Change in coreboot[main]: mb/google/fatcat/var/francka: Update Touch screen configuration
by Dtrain Hsu (Code Review) 23 Jan '25

23 Jan '25

Attention is currently required from: Ian Feng, Jayvik Desai, Kapil Porwal, Pranava Y N, Subrata Banik. Dtrain Hsu has posted comments on this change by Ian Feng. ( https://review.coreboot.org/c/coreboot/+/86117?usp=email ) Change subject: mb/google/fatcat/var/francka: Update Touch screen configuration ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86117?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iba26f496176c2e406285df323e3da3e861fa2ffc Gerrit-Change-Number: 86117 Gerrit-PatchSet: 1 Gerrit-Owner: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-Reviewer: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-CC: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-CC: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Comment-Date: Thu, 23 Jan 2025 03:24:36 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: soc/intel/common: Add Panther Lake DTT support
by Jérémy Compostella (Code Review) 23 Jan '25

23 Jan '25

Attention is currently required from: Deepika Punyamurtula, Intel coreboot Reviewers. Hello Deepika Punyamurtula, Intel coreboot Reviewers, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/86118?usp=email to look at the new patch set (#4). Change subject: soc/intel/common: Add Panther Lake DTT support ...................................................................... soc/intel/common: Add Panther Lake DTT support This commit adds the Panther Lake Intel Dynamic Tuning Technology (Intel DTT) PCI Device ID to the list of supported devices in the ACPI Common Block DTT driver. TEST=Devices are being listed under /sys/class/thermal on a fatcat board. Change-Id: Ia8dbe86efdf341a629de037d37750b79395ec3e8 Signed-off-by: Jeremy Compostella <jeremy.compostella(a)intel.com> --- M src/include/device/pci_ids.h M src/soc/intel/common/block/dtt/dtt.c 2 files changed, 2 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/86118/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/86118?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia8dbe86efdf341a629de037d37750b79395ec3e8 Gerrit-Change-Number: 86118 Gerrit-PatchSet: 4 Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Deepika Punyamurtula <deepika.punyamurtula(a)intel.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Deepika Punyamurtula <deepika.punyamurtula(a)intel.com>

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[XS] Change in coreboot[main]: soc/intel/common: Add Panther Lake DTT support
by Jérémy Compostella (Code Review) 23 Jan '25

23 Jan '25

Attention is currently required from: Deepika Punyamurtula, Intel coreboot Reviewers. Hello Deepika Punyamurtula, Intel coreboot Reviewers, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/86118?usp=email to look at the new patch set (#3). Change subject: soc/intel/common: Add Panther Lake DTT support ...................................................................... soc/intel/common: Add Panther Lake DTT support This commit adds the Panther Lake Intel Dynamic Tuning Technology (Intel DTT) PCI Device ID to the list of supported devices in the ACPI Common Block DTT driver. TEST=devices are being listed under /sys/class/thermal on a fatcat board. Change-Id: Ia8dbe86efdf341a629de037d37750b79395ec3e8 Signed-off-by: Jeremy Compostella <jeremy.compostella(a)intel.com> --- M src/include/device/pci_ids.h M src/soc/intel/common/block/dtt/dtt.c 2 files changed, 2 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/86118/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/86118?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia8dbe86efdf341a629de037d37750b79395ec3e8 Gerrit-Change-Number: 86118 Gerrit-PatchSet: 3 Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Deepika Punyamurtula <deepika.punyamurtula(a)intel.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Deepika Punyamurtula <deepika.punyamurtula(a)intel.com>

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[XS] Change in coreboot[main]: soc/intel/common: Add Panther Lake DTT support
by Jérémy Compostella (Code Review) 23 Jan '25

23 Jan '25

Jérémy Compostella has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/86118?usp=email ) Change subject: soc/intel/common: Add Panther Lake DTT support ...................................................................... soc/intel/common: Add Panther Lake DTT support This commit adds the Panther Lake Intel Dynamic Tuning Technology (Intel DTT) PCI Device ID to the list of supported devices in the ACPI Common Block DTT driver. Change-Id: Ia8dbe86efdf341a629de037d37750b79395ec3e8 Signed-off-by: Jeremy Compostella <jeremy.compostella(a)intel.com> --- M src/include/device/pci_ids.h M src/soc/intel/common/block/dtt/dtt.c 2 files changed, 2 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/86118/1 diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index c882fdc..d17dca4 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -4854,6 +4854,7 @@ #define PCI_DID_INTEL_ADL_DTT 0x461d #define PCI_DID_INTEL_MTL_DTT 0x7d03 #define PCI_DID_INTEL_RPL_DTT 0xa71d +#define PCI_DID_INTEL_PTL_DTT 0xb01d /* Intel CNVi WiFi/BT device IDs */ #define PCI_DID_INTEL_CML_LP_CNVI_WIFI 0x02f0 diff --git a/src/soc/intel/common/block/dtt/dtt.c b/src/soc/intel/common/block/dtt/dtt.c index 1d70335..8b086e0 100644 --- a/src/soc/intel/common/block/dtt/dtt.c +++ b/src/soc/intel/common/block/dtt/dtt.c @@ -8,6 +8,7 @@ #include <intelblocks/acpi.h> static const unsigned short pci_device_ids[] = { + PCI_DID_INTEL_PTL_DTT, PCI_DID_INTEL_RPL_DTT, PCI_DID_INTEL_MTL_DTT, PCI_DID_INTEL_CML_DTT, -- To view, visit https://review.coreboot.org/c/coreboot/+/86118?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia8dbe86efdf341a629de037d37750b79395ec3e8 Gerrit-Change-Number: 86118 Gerrit-PatchSet: 1 Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com>

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coreboot-gerrit January 2025