coreboot-gerrit January 2025

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[XS] Change in coreboot[main]: soc/intel/alderlake: Fix incorrect reporting of S0ix
by Sean Rhodes (Code Review) 23 Jan '25

23 Jan '25

Attention is currently required from: Dinesh Gehlot, Intel coreboot Reviewers, Jayvik Desai, Kapil Porwal, Matt DeVillier, Nick Vaccaro, Paul Menzel, Subrata Banik. Sean Rhodes has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/86089?usp=email ) Change subject: soc/intel/alderlake: Fix incorrect reporting of S0ix ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/86089/comment/79083b7d_aea7605d?us… : PS1, Line 11: > Tested how? Done -- To view, visit https://review.coreboot.org/c/coreboot/+/86089?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia31fbfd0b9795990b0ca98220bb002bf2c3857b2 Gerrit-Change-Number: 86089 Gerrit-PatchSet: 2 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Thu, 23 Jan 2025 10:04:42 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org>

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[XS] Change in coreboot[main]: soc/intel/alderlake: Fix incorrect reporting of S0ix
by Sean Rhodes (Code Review) 23 Jan '25

23 Jan '25

Attention is currently required from: Dinesh Gehlot, Intel coreboot Reviewers, Jayvik Desai, Kapil Porwal, Matt DeVillier, Nick Vaccaro, Sean Rhodes, Subrata Banik. Hello Dinesh Gehlot, Intel coreboot Reviewers, Jayvik Desai, Kapil Porwal, Matt DeVillier, Nick Vaccaro, Subrata Banik, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/86089?usp=email to look at the new patch set (#2). Change subject: soc/intel/alderlake: Fix incorrect reporting of S0ix ...................................................................... soc/intel/alderlake: Fix incorrect reporting of S0ix If S0ix is not enabled, then it should not be reported that it is supported. TEST=boot linux on starlabs/starlite_adl, check S0ix isn't reported as supported. Change-Id: Ia31fbfd0b9795990b0ca98220bb002bf2c3857b2 Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> --- M src/soc/intel/alderlake/cpu.c 1 file changed, 4 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/86089/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86089?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia31fbfd0b9795990b0ca98220bb002bf2c3857b2 Gerrit-Change-Number: 86089 Gerrit-PatchSet: 2 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org>

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[XS] Change in coreboot[main]: mb/google/corsola: Increase ANX7625 data trail time
by Paul Menzel (Code Review) 23 Jan '25

23 Jan '25

Attention is currently required from: Hung-Te Lin, Xin Ji, Yidi Lin, Yu-Ping Wu. Paul Menzel has posted comments on this change by Xin Ji. ( https://review.coreboot.org/c/coreboot/+/86101?usp=email ) Change subject: mb/google/corsola: Increase ANX7625 data trail time ...................................................................... Patch Set 4: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/86101?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I677667240c7f3b0e14c6a728931921e32f539c57 Gerrit-Change-Number: 86101 Gerrit-PatchSet: 4 Gerrit-Owner: Xin Ji <xji(a)analogix.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Xin Ji <xji(a)analogix.corp-partner.google.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Thu, 23 Jan 2025 09:54:35 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: soc/intel/alderlake: Fix incorrect reporting of S0ix
by Paul Menzel (Code Review) 23 Jan '25

23 Jan '25

Attention is currently required from: Dinesh Gehlot, Intel coreboot Reviewers, Jayvik Desai, Kapil Porwal, Matt DeVillier, Nick Vaccaro, Sean Rhodes, Subrata Banik. Paul Menzel has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/86089?usp=email ) Change subject: soc/intel/alderlake: Fix incorrect reporting of S0ix ...................................................................... Patch Set 1: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/86089/comment/d1bbdde5_72e0c400?us… : PS1, Line 11: Tested how? -- To view, visit https://review.coreboot.org/c/coreboot/+/86089?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia31fbfd0b9795990b0ca98220bb002bf2c3857b2 Gerrit-Change-Number: 86089 Gerrit-PatchSet: 1 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Thu, 23 Jan 2025 09:53:40 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: soc/intel/alderlake: Fix incorrect reporting of S0ix
by Sean Rhodes (Code Review) 23 Jan '25

23 Jan '25

Attention is currently required from: Matt DeVillier. Sean Rhodes has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/86089?usp=email ) Change subject: soc/intel/alderlake: Fix incorrect reporting of S0ix ...................................................................... Patch Set 1: This change is ready for review. -- To view, visit https://review.coreboot.org/c/coreboot/+/86089?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia31fbfd0b9795990b0ca98220bb002bf2c3857b2 Gerrit-Change-Number: 86089 Gerrit-PatchSet: 1 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Comment-Date: Thu, 23 Jan 2025 09:40:50 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: mb/google/fatcat/variants/fatcat: Enable BT audio offload
by Uday Bhat (Code Review) 23 Jan '25

23 Jan '25

Uday Bhat has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/86121?usp=email ) Change subject: mb/google/fatcat/variants/fatcat: Enable BT audio offload ...................................................................... mb/google/fatcat/variants/fatcat: Enable BT audio offload vGPIO configs are configured to enable SSP2 for BT audio offload. BUG=b:391771159 Test=Verified BT offload with I2S and soundwire configuration Change-Id: Id68667d674386cf9e6abc066a4637ee055a967f3 Signed-off-by: Uday M Bhat <uday.m.bhat(a)intel.com> --- M src/mainboard/google/fatcat/variants/fatcat/fw_config.c M src/mainboard/google/fatcat/variants/fatcat/variant.c 2 files changed, 37 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/86121/1 diff --git a/src/mainboard/google/fatcat/variants/fatcat/fw_config.c b/src/mainboard/google/fatcat/variants/fatcat/fw_config.c index 3e6a192..12fce92 100644 --- a/src/mainboard/google/fatcat/variants/fatcat/fw_config.c +++ b/src/mainboard/google/fatcat/variants/fatcat/fw_config.c @@ -85,6 +85,25 @@ PAD_CFG_GPO(GPP_D13, 1, PLTRST), }; +static const struct pad_config bt_i2s_enable_pads[] = { + /* GPP_V30 : [] ==> BT_I2S_BCLK - SSP2 */ + PAD_CFG_NF(GPP_VGPIO30, NONE, DEEP, NF3), + /* GPP_V31 : [] ==> BT_I2S_SYNC - SSP2 */ + PAD_CFG_NF(GPP_VGPIO31, NONE, DEEP, NF3), + /* GPP_V32 : [] ==> BT_I2S_SDO - SSP2 */ + PAD_CFG_NF(GPP_VGPIO32, NONE, DEEP, NF3), + /* GPP_V33 : [] ==> BT_I2S_SDI - SSP2 */ + PAD_CFG_NF(GPP_VGPIO33, NONE, DEEP, NF3), + /* GPP_V34 : [] ==> SSP_SCLK */ + PAD_CFG_NF(GPP_VGPIO34, NONE, DEEP, NF1), + /* GPP_V35 : [] ==> SSP_SFRM */ + PAD_CFG_NF(GPP_VGPIO35, NONE, DEEP, NF1), + /* GPP_V36 : [] ==> SSP_TXD */ + PAD_CFG_NF(GPP_VGPIO36, NONE, DEEP, NF1), + /* GPP_V37 : [] ==> SSP_RXD */ + PAD_CFG_NF(GPP_VGPIO37, NONE, DEEP, NF1), +}; + static const struct pad_config sndw_alc722_enable_pads[] = { /* SNDW3_CLK */ PAD_CFG_NF(GPP_S00, NONE, DEEP, NF1), @@ -541,15 +560,27 @@ if (fw_config_probe(FW_CONFIG(AUDIO, AUDIO_NONE))) GPIO_PADBASED_OVERRIDE(padbased_table, audio_disable_pads); - else if (fw_config_probe(FW_CONFIG(AUDIO, AUDIO_MAX98360_ALC5682I_I2S))) + else if (fw_config_probe(FW_CONFIG(AUDIO, AUDIO_MAX98360_ALC5682I_I2S))) { + printk(BIOS_INFO, "Configure GPIOs for I2S MAX98360 ALC5682 audio.\n"); GPIO_PADBASED_OVERRIDE(padbased_table, i2s_enable_pads); + printk(BIOS_INFO, "Configure GPIOs for BT offload mode.\n"); + GPIO_PADBASED_OVERRIDE(padbased_table, bt_i2s_enable_pads); + } else if (fw_config_probe(FW_CONFIG(AUDIO, AUDIO_MAX98373_ALC5682_SNDW))) GPIO_PADBASED_OVERRIDE(padbased_table, sndw_external_codec_enable_pads); else if (fw_config_probe(FW_CONFIG(AUDIO, AUDIO_ALC722_SNDW)) || - fw_config_probe(FW_CONFIG(AUDIO, AUDIO_ALC721_SNDW))) + fw_config_probe(FW_CONFIG(AUDIO, AUDIO_ALC721_SNDW))) { + printk(BIOS_INFO, "Configure GPIOs for Soundwire audio.\n"); GPIO_PADBASED_OVERRIDE(padbased_table, sndw_alc722_enable_pads); - else if (fw_config_probe(FW_CONFIG(AUDIO, AUDIO_ALC256_HDA))) + printk(BIOS_INFO, "Configure GPIOs for BT offload mode.\n"); + GPIO_PADBASED_OVERRIDE(padbased_table, bt_i2s_enable_pads); + } + else if (fw_config_probe(FW_CONFIG(AUDIO, AUDIO_ALC256_HDA))) { + printk(BIOS_INFO, "Configure GPIOs for HDA ALC 256 mode.\n"); GPIO_PADBASED_OVERRIDE(padbased_table, hda_enable_pads); + printk(BIOS_INFO, "Configure GPIOs for BT offload mode.\n"); + GPIO_PADBASED_OVERRIDE(padbased_table, bt_i2s_enable_pads); + } if (fw_config_probe(FW_CONFIG(WIFI, WIFI_PCIE_6)) || fw_config_probe(FW_CONFIG(WIFI, WIFI_PCIE_7))) { diff --git a/src/mainboard/google/fatcat/variants/fatcat/variant.c b/src/mainboard/google/fatcat/variants/fatcat/variant.c index 086f709..8774b2f 100644 --- a/src/mainboard/google/fatcat/variants/fatcat/variant.c +++ b/src/mainboard/google/fatcat/variants/fatcat/variant.c @@ -14,10 +14,13 @@ { config->cnvi_wifi_core = false; config->cnvi_bt_core = false; + printk(BIOS_INFO, "Configure BT audio offload config.\n"); /* CNVi */ if (fw_config_probe(FW_CONFIG(WIFI, WIFI_CNVI_6)) || fw_config_probe(FW_CONFIG(WIFI, WIFI_CNVI_7))) { config->cnvi_wifi_core = true; config->cnvi_bt_core = true; + printk(BIOS_INFO, "Configure BT audio offload config to true.\n"); + config->cnvi_bt_audio_offload = true; } } -- To view, visit https://review.coreboot.org/c/coreboot/+/86121?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Id68667d674386cf9e6abc066a4637ee055a967f3 Gerrit-Change-Number: 86121 Gerrit-PatchSet: 1 Gerrit-Owner: Uday Bhat <uday.m.bhat(a)intel.com>

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[S] Change in coreboot[main]: cbfstool: Do not compress the BIOS binary if A/B recovery
by Patrick Rudolph (Code Review) 23 Jan '25

23 Jan '25

Attention is currently required from: Bao Zheng, Felix Held, Fred Reitberger, Jason Glenesk, Julius Werner, Marshall Dawson, Matt DeVillier, Zheng Bao. Patrick Rudolph has posted comments on this change by Bao Zheng. ( https://review.coreboot.org/c/coreboot/+/85628?usp=email ) Change subject: cbfstool: Do not compress the BIOS binary if A/B recovery ...................................................................... Patch Set 12: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/85628/comment/df95acc3_ec59d007?us… : PS12, Line 7: / I don't see the relation to A/B recovery. From what I understand it's only necessary for `CONFIG_CBFS_VERIFICATION` https://review.coreboot.org/c/coreboot/+/85628/comment/4d01b851_79f02500?us… : PS12, Line 9: verification Who verifies the CBFS? Does it verify before decompression? -- To view, visit https://review.coreboot.org/c/coreboot/+/85628?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I10db7ad44d2a92c143f46d9ee6fc7824b2ff0cc6 Gerrit-Change-Number: 85628 Gerrit-PatchSet: 12 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Zheng Bao Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 23 Jan 2025 08:17:35 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[M] Change in coreboot[main]: soc/amd: Add some PSP commands
by Patrick Rudolph (Code Review) 23 Jan '25

23 Jan '25

Attention is currently required from: Bao Zheng, Felix Held, Fred Reitberger, Jason Glenesk, Julius Werner, Matt DeVillier, Zheng Bao. Patrick Rudolph has posted comments on this change by Bao Zheng. ( https://review.coreboot.org/c/coreboot/+/85650?usp=email ) Change subject: soc/amd: Add some PSP commands ...................................................................... Patch Set 13: (1 comment) File src/soc/amd/common/block/psp/psp_gen2.c: https://review.coreboot.org/c/coreboot/+/85650/comment/4c68b9fd_818ca071?us… : PS13, Line 181: 1 why not `set_bootpartition(get_bootpartition() ^ 1)` ? -- To view, visit https://review.coreboot.org/c/coreboot/+/85650?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia7f2eedae5b277745cb34a0761bd1a8b61441695 Gerrit-Change-Number: 85650 Gerrit-PatchSet: 13 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Zheng Bao Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 23 Jan 2025 08:06:09 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: WIP:A/B RECOVERY: Add setting boot status and corrupt type
by Patrick Rudolph (Code Review) 23 Jan '25

23 Jan '25

Attention is currently required from: Bao Zheng, Julius Werner, Zheng Bao. Patrick Rudolph has posted comments on this change by Bao Zheng. ( https://review.coreboot.org/c/coreboot/+/85645?usp=email ) Change subject: WIP:A/B RECOVERY: Add setting boot status and corrupt type ...................................................................... Patch Set 9: (1 comment) File src/lib/prog_loaders.c: https://review.coreboot.org/c/coreboot/+/85645/comment/bf52f2c0_8a39e7ea?us… : PS9, Line 197: PSP_AB_RECOVERY There's a weak implementation for that: `set_boot_successful` -- To view, visit https://review.coreboot.org/c/coreboot/+/85645?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I55a379b9c9f85fabbd8a1f98fbef3f57d7d8118d Gerrit-Change-Number: 85645 Gerrit-PatchSet: 9 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-CC: ritul guru <ritul.bits(a)gmail.com> Gerrit-Attention: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Zheng Bao Gerrit-Comment-Date: Thu, 23 Jan 2025 08:02:57 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[M] Change in coreboot[main]: soc/amd/common/acpi: Add SPI flash controller
by Patrick Rudolph (Code Review) 23 Jan '25

23 Jan '25

Attention is currently required from: Ana Carolina Cabral, Fred Reitberger, Jason Glenesk, Matt DeVillier, Paul Menzel. Patrick Rudolph has posted comments on this change by Ana Carolina Cabral. ( https://review.coreboot.org/c/coreboot/+/84918?usp=email ) Change subject: soc/amd/common/acpi: Add SPI flash controller ...................................................................... Patch Set 5: (1 comment) File src/soc/amd/common/acpi/spi.asl: https://review.coreboot.org/c/coreboot/+/84918/comment/9ee6a864_2b83c8eb?us… : PS5, Line 38: Serialized Why do you need to aquire the mutex here, it's a `Serialized` method, thus it cannot be re-entered. -- To view, visit https://review.coreboot.org/c/coreboot/+/84918?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I0f2c1e3351671ad47fbe5c890e4f99d2e19dbfbf Gerrit-Change-Number: 84918 Gerrit-PatchSet: 5 Gerrit-Owner: Ana Carolina Cabral Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Ana Carolina Cabral Gerrit-Comment-Date: Thu, 23 Jan 2025 07:48:45 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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coreboot-gerrit January 2025