coreboot-gerrit January 2025

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[XS] Change in coreboot[main]: soc/mediatek/mt8196: Initialize mt6685 PMIF for RTC read/write API
by Jarried Lin (Code Review) 25 Jan '25

25 Jan '25

Attention is currently required from: Hung-Te Lin, Jarried Lin, Yu-Ping Wu. Hello Hung-Te Lin, Yidi Lin, Yu-Ping Wu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/86155?usp=email to look at the new patch set (#5). Change subject: soc/mediatek/mt8196: Initialize mt6685 PMIF for RTC read/write API ...................................................................... soc/mediatek/mt8196: Initialize mt6685 PMIF for RTC read/write API RTC read/write API requires mt6685 PMIF initialization to prevent assertion from rtc_get(). BUG=b:382351678 TEST=Build pass, boot successfully, boot log show: [INFO ] [mt6685_init_pmif_arb]CHIP ID = 0x85 Change-Id: I4b0298e71c2c270e0c48723755319348928ac1af Signed-off-by: Jarried Lin <jarried.lin(a)mediatek.corp-partner.google.com> --- M src/soc/mediatek/mt8196/soc.c 1 file changed, 2 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/86155/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/86155?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I4b0298e71c2c270e0c48723755319348928ac1af Gerrit-Change-Number: 86155 Gerrit-PatchSet: 5 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com>

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[XS] Change in coreboot[main]: soc/mediatek/mt8196: Initialize mt6685 PMIF for RTC read/write API
by Yidi Lin (Code Review) 25 Jan '25

25 Jan '25

Attention is currently required from: Hung-Te Lin, Jarried Lin, Yu-Ping Wu. Yidi Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/86155?usp=email ) The change is no longer submittable: All-Comments-Resolved is unsatisfied now. Change subject: soc/mediatek/mt8196: Initialize mt6685 PMIF for RTC read/write API ...................................................................... Patch Set 4: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/86155/comment/bf845ebe_dfaf8cb7?us… : PS4, Line 12: 317009620 382351678 -- To view, visit https://review.coreboot.org/c/coreboot/+/86155?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I4b0298e71c2c270e0c48723755319348928ac1af Gerrit-Change-Number: 86155 Gerrit-PatchSet: 4 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Sat, 25 Jan 2025 08:48:20 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: soc/mediatek/mt8196: Initialize mt6685 PMIF for RTC read/write API
by Yidi Lin (Code Review) 25 Jan '25

25 Jan '25

Attention is currently required from: Hung-Te Lin, Jarried Lin, Yu-Ping Wu. Yidi Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/86155?usp=email ) Change subject: soc/mediatek/mt8196: Initialize mt6685 PMIF for RTC read/write API ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86155?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I4b0298e71c2c270e0c48723755319348928ac1af Gerrit-Change-Number: 86155 Gerrit-PatchSet: 4 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Sat, 25 Jan 2025 08:47:13 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: soc/mediatek/mt8196: Initialize mt6685 PMIF for RTC read/write API
by Jarried Lin (Code Review) 25 Jan '25

25 Jan '25

Attention is currently required from: Hung-Te Lin, Yidi Lin, Yu-Ping Wu. Jarried Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/86155?usp=email ) Change subject: soc/mediatek/mt8196: Initialize mt6685 PMIF for RTC read/write API ...................................................................... Patch Set 4: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/86155/comment/488e50e3_44924b9e?us… : PS3, Line 7: Add RTC read/write support in ramstage > Initialize mt6685 PMIF for RTC read/write API Done https://review.coreboot.org/c/coreboot/+/86155/comment/18bcc778_0a2e0cb1?us… : PS3, Line 9: Add support for RTC in ramstage to avoid mt6685 assertion when coreboot : uses rtc_get. > RTC read/write API requires mt6685 PMIF initialization to prevent assertion […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/86155?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I4b0298e71c2c270e0c48723755319348928ac1af Gerrit-Change-Number: 86155 Gerrit-PatchSet: 4 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Sat, 25 Jan 2025 08:43:56 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Yidi Lin <yidilin(a)google.com>

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[XS] Change in coreboot[main]: soc/mediatek/mt8196: Initialize mt6685 PMIF for RTC read/write API
by Jarried Lin (Code Review) 25 Jan '25

25 Jan '25

Attention is currently required from: Hung-Te Lin, Jarried Lin, Yu-Ping Wu. Hello Hung-Te Lin, Yidi Lin, Yu-Ping Wu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/86155?usp=email to look at the new patch set (#4). Change subject: soc/mediatek/mt8196: Initialize mt6685 PMIF for RTC read/write API ...................................................................... soc/mediatek/mt8196: Initialize mt6685 PMIF for RTC read/write API RTC read/write API requires mt6685 PMIF initialization to prevent assertion from rtc_get(). BUG=b:317009620 TEST=Build pass, boot successfully, boot log show: [INFO ] [mt6685_init_pmif_arb]CHIP ID = 0x85 Change-Id: I4b0298e71c2c270e0c48723755319348928ac1af Signed-off-by: Jarried Lin <jarried.lin(a)mediatek.corp-partner.google.com> --- M src/soc/mediatek/mt8196/soc.c 1 file changed, 2 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/86155/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/86155?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I4b0298e71c2c270e0c48723755319348928ac1af Gerrit-Change-Number: 86155 Gerrit-PatchSet: 4 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com>

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[XS] Change in coreboot[main]: soc/mediatek/mt8196: Add RTC read/write support in ramstage
by Yidi Lin (Code Review) 25 Jan '25

25 Jan '25

Attention is currently required from: Hung-Te Lin, Jarried Lin, Yu-Ping Wu. Yidi Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/86155?usp=email ) Change subject: soc/mediatek/mt8196: Add RTC read/write support in ramstage ...................................................................... Patch Set 3: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/86155/comment/6b6e5a79_3a9c2b0c?us… : PS3, Line 7: Add RTC read/write support in ramstage Initialize mt6685 PMIF for RTC read/write API https://review.coreboot.org/c/coreboot/+/86155/comment/fbc91d24_11e4e952?us… : PS3, Line 9: Add support for RTC in ramstage to avoid mt6685 assertion when coreboot : uses rtc_get. RTC read/write API requires mt6685 PMIF initialization to prevent assertion from `rtc_get()`. -- To view, visit https://review.coreboot.org/c/coreboot/+/86155?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I4b0298e71c2c270e0c48723755319348928ac1af Gerrit-Change-Number: 86155 Gerrit-PatchSet: 3 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Sat, 25 Jan 2025 08:23:49 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: soc/mediatek/mt8196: Add RTC read/write support in ramstage
by Jarried Lin (Code Review) 25 Jan '25

25 Jan '25

Attention is currently required from: Hung-Te Lin, Jarried Lin, Yidi Lin, Yu-Ping Wu. Hello Hung-Te Lin, Yidi Lin, Yu-Ping Wu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/86155?usp=email to look at the new patch set (#3). The following approvals got outdated and were removed: Verified-1 by build bot (Jenkins) Change subject: soc/mediatek/mt8196: Add RTC read/write support in ramstage ...................................................................... soc/mediatek/mt8196: Add RTC read/write support in ramstage Add support for RTC in ramstage to avoid mt6685 assertion when coreboot uses rtc_get. BUG=b:317009620 TEST=Build pass, boot successfully, boot log show: [INFO ] [mt6685_init_pmif_arb]CHIP ID = 0x85 Change-Id: I4b0298e71c2c270e0c48723755319348928ac1af Signed-off-by: Jarried Lin <jarried.lin(a)mediatek.corp-partner.google.com> --- M src/soc/mediatek/mt8196/soc.c 1 file changed, 2 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/86155/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/86155?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I4b0298e71c2c270e0c48723755319348928ac1af Gerrit-Change-Number: 86155 Gerrit-PatchSet: 3 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com>

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[XS] Change in coreboot[main]: soc/mediatek/mt8196: Add RTC read/write support in ramstage
by Jarried Lin (Code Review) 25 Jan '25

25 Jan '25

Attention is currently required from: Hung-Te Lin, Jarried Lin, Yidi Lin, Yu-Ping Wu. Hello Hung-Te Lin, Yidi Lin, Yu-Ping Wu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/86155?usp=email to look at the new patch set (#2). Change subject: soc/mediatek/mt8196: Add RTC read/write support in ramstage ...................................................................... soc/mediatek/mt8196: Add RTC read/write support in ramstage Add support for RTC in ramstage to avoid mt6685 assertion when coreboot uses rtc_get. BUG=b:317009620 TEST=Build pass, boot successfully, boot log show: [INFO ] [mt6685_init_pmif_arb]CHIP ID = 0x85 Change-Id: I4b0298e71c2c270e0c48723755319348928ac1af Signed-off-by: Jarried Lin <jarried.lin(a)mediatek.corp-partner.google.com> --- M src/soc/mediatek/mt8196/soc.c 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/86155/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86155?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I4b0298e71c2c270e0c48723755319348928ac1af Gerrit-Change-Number: 86155 Gerrit-PatchSet: 2 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com>

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[XS] Change in coreboot[main]: soc/mediatek/mt8196: Add RTC read/write support in ramstage
by Jarried Lin (Code Review) 25 Jan '25

25 Jan '25

Jarried Lin has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/86155?usp=email ) Change subject: soc/mediatek/mt8196: Add RTC read/write support in ramstage ...................................................................... soc/mediatek/mt8196: Add RTC read/write support in ramstage Add support for RTC in ramstage to avoid mt6685 assertion when Coreboot uses rtc_get. BUG=b:317009620 TEST=Build pass, boot successfully, boot log show: [INFO ] [mt6685_init_pmif_arb]CHIP ID = 0x85 Change-Id: I4b0298e71c2c270e0c48723755319348928ac1af Signed-off-by: Jarried Lin <jarried.lin(a)mediatek.corp-partner.google.com> --- M src/soc/mediatek/mt8196/soc.c 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/86155/1 diff --git a/src/soc/mediatek/mt8196/soc.c b/src/soc/mediatek/mt8196/soc.c index 1636f29..333af61 100644 --- a/src/soc/mediatek/mt8196/soc.c +++ b/src/soc/mediatek/mt8196/soc.c @@ -8,6 +8,7 @@ #include <soc/gpueb.h> #include <soc/mcupm.h> #include <soc/mmu_operations.h> +#include <soc/mt6685.h> #include <soc/mtk_fsp.h> #include <soc/pcie.h> #include <soc/sspm.h> -- To view, visit https://review.coreboot.org/c/coreboot/+/86155?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I4b0298e71c2c270e0c48723755319348928ac1af Gerrit-Change-Number: 86155 Gerrit-PatchSet: 1 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com>

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[S] Change in coreboot[main]: mb/google/brox: Check to powergate the UFS controller
by Subrata Banik (Code Review) 25 Jan '25

25 Jan '25

Attention is currently required from: Karthik Ramasubramanian, Sowmya Aralguppe. Subrata Banik has posted comments on this change by Karthik Ramasubramanian. ( https://review.coreboot.org/c/coreboot/+/86151?usp=email ) Change subject: mb/google/brox: Check to powergate the UFS controller ...................................................................... Patch Set 3: (2 comments) File src/mainboard/google/brox/variants/baseboard/brox/ramstage.c: https://review.coreboot.org/c/coreboot/+/86151/comment/f03d9a0b_d1ecd2f0?us… : PS3, Line 113: extern bool mainboard_expects_another_reset(void); why we need this function to be declared as extern ? are we not adding the header file where we have declared mainboard_expects_another_reset ? https://review.coreboot.org/c/coreboot/+/86151/comment/3666ddec_ef4affec?us… : PS3, Line 114: : static uint8_t pmc_get_pch_ip_pg_sts(uint32_t offset) : { : uint8_t val = 0; : uintptr_t pmc_bar; : : pmc_bar = soc_read_pmc_base(); : val = read8p(pmc_bar + offset); : return val; : } can you please move this into pmclib.c ? looks very generic API and we might need this later -- To view, visit https://review.coreboot.org/c/coreboot/+/86151?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I31f1cfc995a98bb345ac64ec3ae68a3bcc413f29 Gerrit-Change-Number: 86151 Gerrit-PatchSet: 3 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Sowmya Aralguppe <sowmya.aralguppe(a)intel.corp-partner.google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sowmya Aralguppe <sowmya.aralguppe(a)intel.corp-partner.google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Sat, 25 Jan 2025 07:20:13 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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coreboot-gerrit January 2025