coreboot-gerrit January 2025

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[XS] Change in coreboot[main]: soc/mediatek/common: Fix wrong write API for protect_key_setting
by Yidi Lin (Code Review) 19 Jan '25

19 Jan '25

Yidi Lin has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86034?usp=email ) Change subject: soc/mediatek/common: Fix wrong write API for protect_key_setting ...................................................................... soc/mediatek/common: Fix wrong write API for protect_key_setting Fix the issue where the DUT cannot power on during S5. When writing key_protect_setting to PMIC, PMIC expects receiving 1 byte per write. PMIC would receive unexpected zero byte if using mt6363_write16. Fix the write operation by using mt6363_write8. TEST=Build pass, DUT can power on during S5. BUG=b:388666377 Change-Id: I0a7c0d2fa1f93a55731b4b58923d6f80a4c4be89 Signed-off-by: Jarried Lin <jarried.lin(a)mediatek.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/86034 Reviewed-by: Yidi Lin <yidilin(a)google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso(a)google.com> --- M src/soc/mediatek/common/mt6363.c 1 file changed, 1 insertion(+), 7 deletions(-) Approvals: Yu-Ping Wu: Looks good to me, approved Yidi Lin: Looks good to me, approved build bot (Jenkins): Verified diff --git a/src/soc/mediatek/common/mt6363.c b/src/soc/mediatek/common/mt6363.c index 220a7ce..e675ef2 100644 --- a/src/soc/mediatek/common/mt6363.c +++ b/src/soc/mediatek/common/mt6363.c @@ -50,12 +50,6 @@ pmif_arb->write(pmif_arb, SPMI_SLAVE_4, reg, data); } -static void mt6363_write16(u32 reg, u16 data) -{ - assert(pmif_arb); - pmif_arb->write16(pmif_arb, SPMI_SLAVE_4, reg, data); -} - static u32 mt6363_read_field(u32 reg, u32 mask, u32 shift) { assert(pmif_arb); @@ -101,7 +95,7 @@ for (int i = 0; i < ARRAY_SIZE(key_protect_setting); i++) { entry = &key_protect_setting[i]; - mt6363_write16(entry->addr, lock ? 0 : entry->val); + mt6363_write8(entry->addr, lock ? 0 : entry->val); } printk(BIOS_INFO, "%s done\n", __func__); } -- To view, visit https://review.coreboot.org/c/coreboot/+/86034?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I0a7c0d2fa1f93a55731b4b58923d6f80a4c4be89 Gerrit-Change-Number: 86034 Gerrit-PatchSet: 4 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[XS] Change in coreboot[main]: soc/mediatek/mt8196: Add GCE ddren sel control to mminfra
by Yidi Lin (Code Review) 19 Jan '25

19 Jan '25

Yidi Lin has submitted this change. ( https://review.coreboot.org/c/coreboot/+/86027?usp=email ) ( 5 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: soc/mediatek/mt8196: Add GCE ddren sel control to mminfra ...................................................................... soc/mediatek/mt8196: Add GCE ddren sel control to mminfra MMINFRA_GCE_DDREN_SEL is a setting for switching the DRAM transaction ACK from SPM: 0, non-SPM: 0x1. In MT8196, SPM has masked all the DDR requests, so this setting should be set to non-SPM whenever mminfra is powering on. Otherwise, GCE will hang when accessing DRAM. BUG=b:379039600 TEST=boot up ok, GCE can access DRAM continuously Change-Id: I30309b0426f803e28858eb15652a649927f94c7e Signed-off-by: Jason-jh Lin <jason-jh.lin(a)mediatek.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/86027 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso(a)google.com> Reviewed-by: Yidi Lin <yidilin(a)google.com> --- M src/soc/mediatek/mt8196/include/soc/mminfra.h M src/soc/mediatek/mt8196/mminfra.c 2 files changed, 3 insertions(+), 0 deletions(-) Approvals: Yu-Ping Wu: Looks good to me, approved Yidi Lin: Looks good to me, approved build bot (Jenkins): Verified diff --git a/src/soc/mediatek/mt8196/include/soc/mminfra.h b/src/soc/mediatek/mt8196/include/soc/mminfra.h index 13a4e5c..4404040 100644 --- a/src/soc/mediatek/mt8196/include/soc/mminfra.h +++ b/src/soc/mediatek/mt8196/include/soc/mminfra.h @@ -4,6 +4,7 @@ #define __SOC_MEDIATEK_MMINFRA_H__ /* mminfra_ao */ +#define MMINFRA_GCE_DDREN_SEL (MMINFRA_AO_CONFIG + 0x418) #define MMINFRA_GCE_PROT_EN (MMINFRA_AO_CONFIG + 0x428) /* mminfra0 */ diff --git a/src/soc/mediatek/mt8196/mminfra.c b/src/soc/mediatek/mt8196/mminfra.c index 55ddf47..c5eadf3 100644 --- a/src/soc/mediatek/mt8196/mminfra.c +++ b/src/soc/mediatek/mt8196/mminfra.c @@ -26,11 +26,13 @@ GCE_D_SLEEPPORT_RX_EN | GCE_D_HAND_SLEEPPORT_RX_EN | GCE_D_HAND_SLEEPPORT_TX_EN | GCE_M_SLEEPPORT_RX_EN | GCE_M_HAND_SLEEPPORT_RX_EN | GCE_M_HAND_SLEEPPORT_TX_EN); + write32p(MMINFRA_GCE_DDREN_SEL, 0); } static void mm_gce_release_prot_en(void) { write32p(MMINFRA_GCE_PROT_EN, 0); + write32p(MMINFRA_GCE_DDREN_SEL, 0x1); } static void mm_infra0_lock_prot_en(void) -- To view, visit https://review.coreboot.org/c/coreboot/+/86027?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I30309b0426f803e28858eb15652a649927f94c7e Gerrit-Change-Number: 86027 Gerrit-PatchSet: 7 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Jason-jh Lin <jason-jh.lin(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[S] Change in coreboot[main]: drivers/option: Add CBFS file based option backend
by Swift Geek (Sebastian Grzywna) (Code Review) 19 Jan '25

19 Jan '25

Attention is currently required from: Julius Werner, Jérémy Compostella, Nicholas Chin, Subrata Banik. Swift Geek (Sebastian Grzywna) has posted comments on this change by Nicholas Chin. ( https://review.coreboot.org/c/coreboot/+/85905?usp=email ) Change subject: drivers/option: Add CBFS file based option backend ...................................................................... Patch Set 15: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/85905?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ifc0439ee42f13f49ae54d4855d1d9333c39b01f5 Gerrit-Change-Number: 85905 Gerrit-PatchSet: 15 Gerrit-Owner: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: Swift Geek (Sebastian Grzywna) <swiftgeek(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-CC: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Comment-Date: Sun, 19 Jan 2025 07:26:20 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[M] Change in coreboot[main]: mb/asus/p8z77-v: Attempt to correctly route PCIe lanes
by Bill XIE (Code Review) 19 Jan '25

19 Jan '25

Attention is currently required from: Keith Hui. Bill XIE has posted comments on this change by Keith Hui. ( https://review.coreboot.org/c/coreboot/+/85413?usp=email ) Change subject: mb/asus/p8z77-v: Attempt to correctly route PCIe lanes ...................................................................... Patch Set 3: (1 comment) File src/mainboard/asus/p8x7x-series/variants/p8z77-v/early_init.c: https://review.coreboot.org/c/coreboot/+/85413/comment/c556e0c1_1ce9f3ce?us… : PS2, Line 77: {7, 34, 20, -1} > Throughout all this testing, did the PCIe x1 card you used to test never work? The card works when put on PCIEX1_1, but never on PCIEX1_2. -- To view, visit https://review.coreboot.org/c/coreboot/+/85413?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If41197a1f817a48c209d25fc1ae461ec97ccf16c Gerrit-Change-Number: 85413 Gerrit-PatchSet: 3 Gerrit-Owner: Keith Hui <buurin(a)gmail.com> Gerrit-Reviewer: Bill XIE <persmule(a)hardenedlinux.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Keith Hui <buurin(a)gmail.com> Gerrit-Comment-Date: Sun, 19 Jan 2025 03:31:15 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Bill XIE <persmule(a)hardenedlinux.org> Comment-In-Reply-To: Keith Hui <buurin(a)gmail.com>

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[S] Change in coreboot[main]: soc/mediatek/mt8196: Add unmask eint event for bootblock
by Yu-Ping Wu (Code Review) 19 Jan '25

19 Jan '25

Attention is currently required from: Chhao Chang, Jarried Lin. Yu-Ping Wu has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/84025?usp=email ) Change subject: soc/mediatek/mt8196: Add unmask eint event for bootblock ...................................................................... Patch Set 18: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/84025?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I4bf3820a89172186b8f51591f8760787affbb7a3 Gerrit-Change-Number: 84025 Gerrit-PatchSet: 18 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Chhao Chang <ot_chhao.chang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Chhao Chang <ot_chhao.chang(a)mediatek.corp-partner.google.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Comment-Date: Sun, 19 Jan 2025 02:55:50 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: soc/mediatek/mt8196: Add unmask eint event for bootblock
by Yidi Lin (Code Review) 19 Jan '25

19 Jan '25

Attention is currently required from: Chhao Chang, Jarried Lin, Yu-Ping Wu. Yidi Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/84025?usp=email ) Change subject: soc/mediatek/mt8196: Add unmask eint event for bootblock ...................................................................... Patch Set 18: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/84025?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I4bf3820a89172186b8f51591f8760787affbb7a3 Gerrit-Change-Number: 84025 Gerrit-PatchSet: 18 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Chhao Chang <ot_chhao.chang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Chhao Chang <ot_chhao.chang(a)mediatek.corp-partner.google.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Sun, 19 Jan 2025 00:18:37 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[M] Change in coreboot[main]: util/nvramtool: Fix spacing issues reported by linter
by Name of user not set (Code Review) 19 Jan '25

19 Jan '25

openrc(a)posteo.de has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/86052?usp=email ) Change subject: util/nvramtool: Fix spacing issues reported by linter ...................................................................... util/nvramtool: Fix spacing issues reported by linter Fix for several ERROR:POINTER_LOCATION and many other errors reported by linter. Change-Id: I5a18a571300c6175ea6c8123e79807afa7a6f084 Signed-off-by: libreandre <openrc(a)posteo.de> --- M util/nvramtool/accessors/cmos-hw-unix.c M util/nvramtool/accessors/cmos-mem.c M util/nvramtool/accessors/layout-bin.c M util/nvramtool/accessors/layout-text.c M util/nvramtool/accessors/layout-text.h M util/nvramtool/cbfs.c M util/nvramtool/cbfs.h M util/nvramtool/cli/nvramtool.c M util/nvramtool/cmos_lowlevel.c M util/nvramtool/cmos_lowlevel.h M util/nvramtool/cmos_ops.c M util/nvramtool/cmos_ops.h M util/nvramtool/common.c M util/nvramtool/common.h M util/nvramtool/hexdump.c M util/nvramtool/hexdump.h M util/nvramtool/input_file.c M util/nvramtool/input_file.h M util/nvramtool/layout.c M util/nvramtool/layout.h M util/nvramtool/lbtable.c 21 files changed, 111 insertions(+), 111 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/86052/1 diff --git a/util/nvramtool/accessors/cmos-hw-unix.c b/util/nvramtool/accessors/cmos-hw-unix.c index 101f034..398f4cc 100644 --- a/util/nvramtool/accessors/cmos-hw-unix.c +++ b/util/nvramtool/accessors/cmos-hw-unix.c @@ -23,7 +23,7 @@ static inline void outb(uint8_t value, uint16_t port) { - asm volatile ("outb %b0,%w1": :"a" (value), "Nd" (port)); + asm volatile ("outb %b0,%w1" : : "a" (value), "Nd" (port)); } static inline uint8_t inb(uint16_t port) @@ -35,7 +35,7 @@ static inline void outw(uint16_t value, uint16_t port) { - asm volatile ("outw %w0,%w1": :"a" (value), "Nd" (port)); + asm volatile ("outw %w0,%w1" : : "a" (value), "Nd" (port)); } static inline uint16_t inw(uint16_t port) @@ -47,7 +47,7 @@ static inline void outl(uint32_t value, uint16_t port) { - asm volatile ("outl %0,%w1": :"a" (value), "Nd" (port)); + asm volatile ("outl %0,%w1" : : "a" (value), "Nd" (port)); } static inline uint32_t inl(uint16_t port) @@ -76,7 +76,7 @@ #define INL inl #endif -static void cmos_hal_init(void* data); +static void cmos_hal_init(void *data); static unsigned char cmos_hal_read(unsigned addr); static void cmos_hal_write(unsigned addr, unsigned char value); static void cmos_set_iopl(int level); diff --git a/util/nvramtool/accessors/cmos-mem.c b/util/nvramtool/accessors/cmos-mem.c index 619a68a..4b9c00a 100644 --- a/util/nvramtool/accessors/cmos-mem.c +++ b/util/nvramtool/accessors/cmos-mem.c @@ -1,12 +1,12 @@ #include <assert.h> #include "cmos_lowlevel.h" -static void mem_hal_init(void* data); +static void mem_hal_init(void *data); static unsigned char mem_hal_read(unsigned addr); static void mem_hal_write(unsigned addr, unsigned char value); static void mem_set_iopl(int level); -static unsigned char* mem_hal_data = (unsigned char*)-1; +static unsigned char *mem_hal_data = (unsigned char *)-1; static void mem_hal_init(void *data) { mem_hal_data = data; @@ -14,13 +14,13 @@ static unsigned char mem_hal_read(unsigned index) { - assert(mem_hal_data != (unsigned char*)-1); + assert(mem_hal_data != (unsigned char *)-1); return mem_hal_data[index]; } static void mem_hal_write(unsigned index, unsigned char value) { - assert(mem_hal_data != (unsigned char*)-1); + assert(mem_hal_data != (unsigned char *)-1); mem_hal_data[index] = value; } diff --git a/util/nvramtool/accessors/layout-bin.c b/util/nvramtool/accessors/layout-bin.c index 3ae1d6e..d9475ef 100644 --- a/util/nvramtool/accessors/layout-bin.c +++ b/util/nvramtool/accessors/layout-bin.c @@ -16,9 +16,9 @@ static void process_cmos_table(void); static void get_cmos_checksum_info(void); -static void try_convert_checksum_layout(cmos_checksum_layout_t * layout); -static void try_add_cmos_table_enum(cmos_enum_t * cmos_enum); -static void try_add_cmos_table_entry(cmos_entry_t * cmos_entry); +static void try_convert_checksum_layout(cmos_checksum_layout_t *layout); +static void try_add_cmos_table_enum(cmos_enum_t *cmos_enum); +static void try_add_cmos_table_entry(cmos_entry_t *cmos_entry); static const struct cmos_entries *first_cmos_table_entry(void); static const struct cmos_entries *next_cmos_table_entry(const struct cmos_entries *last); diff --git a/util/nvramtool/accessors/layout-text.c b/util/nvramtool/accessors/layout-text.c index acbe7f8..fc29ed6 100644 --- a/util/nvramtool/accessors/layout-text.c +++ b/util/nvramtool/accessors/layout-text.c @@ -6,24 +6,24 @@ #include "cmos_lowlevel.h" #include "reg_expr.h" -static void process_layout_file(FILE * f); -static void skip_past_start(FILE * f); -static int process_entry(FILE * f, int skip_add); -static int process_enum(FILE * f, int skip_add); -static void process_checksum_info(FILE * f); -static void skip_remaining_lines(FILE * f); -static void create_entry(cmos_entry_t * cmos_entry, +static void process_layout_file(FILE *f); +static void skip_past_start(FILE *f); +static int process_entry(FILE *f, int skip_add); +static int process_enum(FILE *f, int skip_add); +static void process_checksum_info(FILE *f); +static void skip_remaining_lines(FILE *f); +static void create_entry(cmos_entry_t *cmos_entry, const char start_bit_str[], const char length_str[], const char config_str[], const char config_id_str[], const char name_str[]); -static void try_add_layout_file_entry(const cmos_entry_t * cmos_entry); -static void create_enum(cmos_enum_t * cmos_enum, const char id_str[], +static void try_add_layout_file_entry(const cmos_entry_t *cmos_entry); +static void create_enum(cmos_enum_t *cmos_enum, const char id_str[], const char value_str[], const char text_str[]); -static void try_add_cmos_enum(const cmos_enum_t * cmos_enum); +static void try_add_cmos_enum(const cmos_enum_t *cmos_enum); static void set_checksum_info(const char start_str[], const char end_str[], const char index_str[]); static char cmos_entry_char_value(cmos_entry_config_t config); -static int get_layout_file_line(FILE * f, char line[], int line_buf_size); +static int get_layout_file_line(FILE *f, char line[], int line_buf_size); static unsigned string_to_unsigned(const char str[], const char str_name[]); static unsigned long string_to_unsigned_long(const char str[], const char str_name[]); @@ -247,7 +247,7 @@ * Write CMOS layout information to file 'f'. The output is written in the * format that CMOS layout files adhere to. ****************************************************************************/ -void write_cmos_layout(FILE * f) +void write_cmos_layout(FILE *f) { const cmos_entry_t *cmos_entry; const cmos_enum_t *cmos_enum; @@ -283,7 +283,7 @@ * Read CMOS layout information from file 'f' and add it to our internal * repository. ****************************************************************************/ -static void process_layout_file(FILE * f) +static void process_layout_file(FILE *f) { compile_reg_expr(REG_EXTENDED | REG_NEWLINE, blank_or_comment_regex, &blank_or_comment_expr); compile_reg_expr(REG_EXTENDED | REG_NEWLINE, start_entries_regex, &start_entries_expr); @@ -298,7 +298,7 @@ /* Skip past all entries. We will process these later when we * make a second pass through the file. */ - while (!process_entry(f, 1)) ; + while (!process_entry(f, 1)); /* Process all enums, adding them to our internal repository as * we go. */ @@ -309,7 +309,7 @@ exit(1); } - while (!process_enum(f, 0)) ; + while (!process_enum(f, 0)); /* Go back to start of file. */ line_num = 1; @@ -331,10 +331,10 @@ exit(1); } - while (!process_entry(f, 0)) ; + while (!process_entry(f, 0)); /* Skip past all enums. They have already been processed. */ - while (!process_enum(f, 1)) ; + while (!process_enum(f, 1)); /* Process CMOS checksum info. */ process_checksum_info(f); @@ -358,7 +358,7 @@ * * Skip past the line that marks the start of the "entries" section. ****************************************************************************/ -static void skip_past_start(FILE * f) +static void skip_past_start(FILE *f) { char line[LINE_BUF_SIZE]; @@ -392,7 +392,7 @@ * of layout information. Return 0 if an entry was found and processed. * Return 1 if there are no more entries. ****************************************************************************/ -static int process_entry(FILE * f, int skip_add) +static int process_entry(FILE *f, int skip_add) { static const size_t N_MATCHES = 6; char line[LINE_BUF_SIZE]; @@ -452,7 +452,7 @@ * repository of layout information. Return 0 if an enumeration was found * and processed. Return 1 if there are no more enumerations. ****************************************************************************/ -static int process_enum(FILE * f, int skip_add) +static int process_enum(FILE *f, int skip_add) { static const size_t N_MATCHES = 4; char line[LINE_BUF_SIZE]; @@ -508,7 +508,7 @@ * * Get line containing CMOS checksum information. ****************************************************************************/ -static void process_checksum_info(FILE * f) +static void process_checksum_info(FILE *f) { static const size_t N_MATCHES = 4; char line[LINE_BUF_SIZE]; @@ -549,7 +549,7 @@ * Get any remaining lines of unprocessed input. Complain if we find a line * that contains anything other than comments and whitespace. ****************************************************************************/ -static void skip_remaining_lines(FILE * f) +static void skip_remaining_lines(FILE *f) { char line[LINE_BUF_SIZE]; @@ -571,7 +571,7 @@ * Create a CMOS entry structure representing the given information. Perform * sanity checking on input parameters. ****************************************************************************/ -static void create_entry(cmos_entry_t * cmos_entry, +static void create_entry(cmos_entry_t *cmos_entry, const char start_bit_str[], const char length_str[], const char config_str[], const char config_id_str[], const char name_str[]) @@ -629,7 +629,7 @@ * Attempt to add the given CMOS entry to our internal repository. Exit with * an error message on failure. ****************************************************************************/ -static void try_add_layout_file_entry(const cmos_entry_t * cmos_entry) +static void try_add_layout_file_entry(const cmos_entry_t *cmos_entry) { const cmos_entry_t *conflict; @@ -684,7 +684,7 @@ * Create a CMOS enumeration structure representing the given information. * Perform sanity checking on input parameters. ****************************************************************************/ -static void create_enum(cmos_enum_t * cmos_enum, const char id_str[], +static void create_enum(cmos_enum_t *cmos_enum, const char id_str[], const char value_str[], const char text_str[]) { cmos_enum->config_id = string_to_unsigned(id_str, "ID"); @@ -707,7 +707,7 @@ * Attempt to add the given CMOS enum to our internal repository. Exit with * an error message on failure. ****************************************************************************/ -static void try_add_cmos_enum(const cmos_enum_t * cmos_enum) +static void try_add_cmos_enum(const cmos_enum_t *cmos_enum) { switch (add_cmos_enum(cmos_enum)) { case OK: @@ -845,7 +845,7 @@ * array of 'line_buf_size' bytes. Return OK on success or an error code on * failure. ****************************************************************************/ -static int get_layout_file_line(FILE * f, char line[], int line_buf_size) +static int get_layout_file_line(FILE *f, char line[], int line_buf_size) { switch (get_line_from_file(f, line, line_buf_size)) { case OK: diff --git a/util/nvramtool/accessors/layout-text.h b/util/nvramtool/accessors/layout-text.h index db8bf48..98e3c89 100644 --- a/util/nvramtool/accessors/layout-text.h +++ b/util/nvramtool/accessors/layout-text.h @@ -8,7 +8,7 @@ void set_layout_filename(const char filename[]); void get_layout_from_file(void); -void write_cmos_layout(FILE * f); +void write_cmos_layout(FILE *f); void write_cmos_output_bin(const char *binary_filename); void write_cmos_layout_header(const char *header_filename); extern int is_ident(char *str); diff --git a/util/nvramtool/cbfs.c b/util/nvramtool/cbfs.c index cbf95c4..1015d3e 100644 --- a/util/nvramtool/cbfs.c +++ b/util/nvramtool/cbfs.c @@ -17,12 +17,12 @@ #include "cbfs.h" #include "common.h" -#define ALIGN(x,a) __ALIGN_MASK(x,(typeof(x))(a)-1) -#define __ALIGN_MASK(x,mask) (((x)+(mask))&~(mask)) +#define ALIGN(x, a) __ALIGN_MASK(x,(typeof(x))(a)-1) +#define __ALIGN_MASK(x, mask) (((x)+(mask))&~(mask)) static void *cbfs_mapped; static void *cbfs_offset; -static void* virt_to_phys(u32 virt) +static void *virt_to_phys(u32 virt) { return cbfs_offset + virt; } @@ -42,7 +42,7 @@ { struct cbfs_header *header; - void *ptr = virt_to_phys(*((u32*)virt_to_phys(CBFS_HEADPTR_ADDR))); + void *ptr = virt_to_phys(*((u32 *)virt_to_phys(CBFS_HEADPTR_ADDR))); debug("Check CBFS header at %p\n", ptr); header = (struct cbfs_header *) ptr; @@ -65,7 +65,7 @@ return NULL; offset = virt_to_phys(0 - ntohl(header->romsize) + ntohl(header->offset)); - int align= ntohl(header->align); + int align = ntohl(header->align); while(1) { struct cbfs_file *file = (struct cbfs_file *) offset; @@ -79,7 +79,7 @@ debug("CBFS: follow chain: %p + %x + %x + align -> ", offset, foffset, flen); void *oldoffset = offset; - offset = (void*)ALIGN((uintptr_t)(offset + foffset + flen), align); + offset = (void *)ALIGN((uintptr_t)(offset + foffset + flen), align); debug("%p\n", (void *)offset); if (offset <= oldoffset) return NULL; diff --git a/util/nvramtool/cbfs.h b/util/nvramtool/cbfs.h index 0bded53..24d6505 100644 --- a/util/nvramtool/cbfs.h +++ b/util/nvramtool/cbfs.h @@ -126,9 +126,9 @@ } __attribute__((packed)); #define CBFS_NAME(_c) (((char *) (_c)) + sizeof(struct cbfs_file)) -#define CBFS_SUBHEADER(_p) ( (void *) ((((u8 *) (_p)) + ntohl((_p)->offset))) ) +#define CBFS_SUBHEADER(_p) ((void *) ((((u8 *) (_p)) + ntohl((_p)->offset)))) -void * cbfs_get_file(const char *name); +void *cbfs_get_file(const char *name); struct cbfs_file *cbfs_find(const char *name); void *cbfs_find_file(const char *name, unsigned int type, unsigned int *len); diff --git a/util/nvramtool/cli/nvramtool.c b/util/nvramtool/cli/nvramtool.c index 046bd9b..89ec2fc 100644 --- a/util/nvramtool/cli/nvramtool.c +++ b/util/nvramtool/cli/nvramtool.c @@ -45,9 +45,9 @@ static int list_all_params(void); static void list_param_enums(const char name[]); static void set_one_param(const char name[], const char value[]); -static void set_params(FILE * f); +static void set_params(FILE *f); static void parse_assignment(char arg[], const char **name, const char **value); -static int list_cmos_entry(const cmos_entry_t * e, int show_name); +static int list_cmos_entry(const cmos_entry_t *e, int show_name); static uint16_t convert_checksum_value(const char value[]); static const op_fn_t op_fns[] = { op_show_version, @@ -675,7 +675,7 @@ * * Set coreboot parameters according to the contents of file 'f'. ****************************************************************************/ -static void set_params(FILE * f) +static void set_params(FILE *f) { /* First process the input file. Then perform writes only if there were * no problems processing the input. Either all values will be written * successfully or no values will be written. @@ -725,7 +725,7 @@ * along with its value. On success, return OK. On error, print an error * message and return 1. ****************************************************************************/ -static int list_cmos_entry(const cmos_entry_t * e, int show_name) +static int list_cmos_entry(const cmos_entry_t *e, int show_name) { const cmos_enum_t *p; unsigned long long value; @@ -804,7 +804,7 @@ case CMOS_ENTRY_STRING: w = (char *)(unsigned long)value; while (*w) { - if(!isprint((int)(unsigned char)*w)) { + if (!isprint((int)(unsigned char)*w)) { if (show_name) printf("# Bad value -> %s\n", e->name); else @@ -850,7 +850,7 @@ uint16_t result; int negative; - for (p = value; isspace((int)(unsigned char)*p); p++) ; + for (p = value; isspace((int)(unsigned char)*p); p++); negative = (*p == '-'); n = strtoul(value, (char **)&p, 0); diff --git a/util/nvramtool/cmos_lowlevel.c b/util/nvramtool/cmos_lowlevel.c index 8b56164..d986281 100644 --- a/util/nvramtool/cmos_lowlevel.c +++ b/util/nvramtool/cmos_lowlevel.c @@ -20,7 +20,7 @@ void select_hal(hal_t hal, void *data) { - switch(hal) { + switch (hal) { #ifdef CMOS_HAL case HAL_CMOS: current_access = &cmos_hal; @@ -41,10 +41,10 @@ } cmos_bit_op_location_t; static unsigned cmos_bit_op_strategy(unsigned bit, unsigned bits_left, - cmos_bit_op_location_t * where); -static unsigned char cmos_read_bits(const cmos_bit_op_location_t * where, + cmos_bit_op_location_t *where); +static unsigned char cmos_read_bits(const cmos_bit_op_location_t *where, unsigned nr_bits); -static void cmos_write_bits(const cmos_bit_op_location_t * where, +static void cmos_write_bits(const cmos_bit_op_location_t *where, unsigned nr_bits, unsigned char value); static unsigned char get_bits(unsigned long long value, unsigned bit, unsigned nr_bits); @@ -88,7 +88,7 @@ * Returned value is either (unsigned long long), or malloc()'d (char *) * cast to (unsigned long long) ****************************************************************************/ -unsigned long long cmos_read(const cmos_entry_t * e) +unsigned long long cmos_read(const cmos_entry_t *e) { cmos_bit_op_location_t where; unsigned bit = e->bit, length = e->length; @@ -140,7 +140,7 @@ * The I/O privilege level of the currently executing process must be set * appropriately. ****************************************************************************/ -void cmos_write(const cmos_entry_t * e, unsigned long long value) +void cmos_write(const cmos_entry_t *e, unsigned long long value) { cmos_bit_op_location_t where; unsigned bit = e->bit, length = e->length; @@ -282,7 +282,7 @@ * bits to read or write next. ****************************************************************************/ static unsigned cmos_bit_op_strategy(unsigned bit, unsigned bits_left, - cmos_bit_op_location_t * where) + cmos_bit_op_location_t *where) { unsigned max_bits; @@ -298,7 +298,7 @@ * Read a chunk of bits from a byte location within CMOS memory. Return the * value represented by the chunk of bits. ****************************************************************************/ -static unsigned char cmos_read_bits(const cmos_bit_op_location_t * where, +static unsigned char cmos_read_bits(const cmos_bit_op_location_t *where, unsigned nr_bits) { return (cmos_read_byte(where->byte_index) >> where->bit_offset) & @@ -311,7 +311,7 @@ * Write a chunk of bits (the low order 'nr_bits' bits of 'value') to an area * within a particular byte of CMOS memory. ****************************************************************************/ -static void cmos_write_bits(const cmos_bit_op_location_t * where, +static void cmos_write_bits(const cmos_bit_op_location_t *where, unsigned nr_bits, unsigned char value) { unsigned char n, mask; diff --git a/util/nvramtool/cmos_lowlevel.h b/util/nvramtool/cmos_lowlevel.h index 3efdbd0..72e0fe1 100644 --- a/util/nvramtool/cmos_lowlevel.h +++ b/util/nvramtool/cmos_lowlevel.h @@ -7,7 +7,7 @@ #include "layout.h" typedef struct { - void (*init)(void* data); + void (*init)(void *data); unsigned char (*read)(unsigned addr); void (*write)(unsigned addr, unsigned char value); void (*set_iopl)(int level); @@ -20,8 +20,8 @@ #define CMOS_AREA_OVERLAPS_RTC (CMOS_RESULT_START + 1) #define CMOS_AREA_TOO_WIDE (CMOS_RESULT_START + 2) -unsigned long long cmos_read(const cmos_entry_t * e); -void cmos_write(const cmos_entry_t * e, unsigned long long value); +unsigned long long cmos_read(const cmos_entry_t *e); +void cmos_write(const cmos_entry_t *e, unsigned long long value); unsigned char cmos_read_byte(unsigned index); void cmos_write_byte(unsigned index, unsigned char value); void cmos_read_all(unsigned char data[]); diff --git a/util/nvramtool/cmos_ops.c b/util/nvramtool/cmos_ops.c index 0286309..d5e713f 100644 --- a/util/nvramtool/cmos_ops.c +++ b/util/nvramtool/cmos_ops.c @@ -4,14 +4,14 @@ #include "cmos_ops.h" #include "cmos_lowlevel.h" -static int prepare_cmos_op_common(const cmos_entry_t * e); +static int prepare_cmos_op_common(const cmos_entry_t *e); /**************************************************************************** * prepare_cmos_op_common * * Perform a few checks common to both reads and writes. ****************************************************************************/ -static int prepare_cmos_op_common(const cmos_entry_t * e) +static int prepare_cmos_op_common(const cmos_entry_t *e) { int result; @@ -33,7 +33,7 @@ * sanity checking on 'e'. If a problem was found with e, return an error * code. Else return OK. ****************************************************************************/ -int prepare_cmos_read(const cmos_entry_t * e) +int prepare_cmos_read(const cmos_entry_t *e) { int result; @@ -61,7 +61,7 @@ * checking on 'value_str'. On error, return an error code. Else store the * numeric equivalent of 'value_str' in '*value' and return OK. ****************************************************************************/ -int prepare_cmos_write(const cmos_entry_t * e, const char value_str[], +int prepare_cmos_write(const cmos_entry_t *e, const char value_str[], unsigned long long *value) { const cmos_enum_t *q; @@ -97,7 +97,7 @@ /* See if the first character of 'value_str' (excluding * any initial whitespace) is a minus sign. */ - for (p = value_str; isspace((int)(unsigned char)*p); p++) ; + for (p = value_str; isspace((int)(unsigned char)*p); p++); negative = (*p == '-'); out = strtoull(value_str, (char **)&p, 0); diff --git a/util/nvramtool/cmos_ops.h b/util/nvramtool/cmos_ops.h index 8c819df..5783c9a 100644 --- a/util/nvramtool/cmos_ops.h +++ b/util/nvramtool/cmos_ops.h @@ -13,8 +13,8 @@ #define CMOS_OP_VALUE_TOO_WIDE (CMOS_OP_RESULT_START + 4) #define CMOS_OP_NO_MATCHING_ENUM (CMOS_OP_RESULT_START + 5) -int prepare_cmos_read(const cmos_entry_t * e); -int prepare_cmos_write(const cmos_entry_t * e, const char value_str[], +int prepare_cmos_read(const cmos_entry_t *e); +int prepare_cmos_write(const cmos_entry_t *e, const char value_str[], unsigned long long *value); uint16_t cmos_checksum_read(void); void cmos_checksum_write(uint16_t checksum); diff --git a/util/nvramtool/common.c b/util/nvramtool/common.c index 68d2618..5f1eb20 100644 --- a/util/nvramtool/common.c +++ b/util/nvramtool/common.c @@ -14,7 +14,7 @@ * Get a line of input from file 'f'. Store result in 'line' which is an * array of 'line_buf_size' bytes. ****************************************************************************/ -int get_line_from_file(FILE * f, char line[], int line_buf_size) +int get_line_from_file(FILE *f, char line[], int line_buf_size) { if (fgets(line, line_buf_size, f) == NULL) return LINE_EOF; @@ -44,7 +44,7 @@ * Write a usage message to 'outfile'. If 'outfile' is 'stderr' then exit * with a value of 1. Otherwise exit with a value of 0. ****************************************************************************/ -void usage(FILE * outfile) +void usage(FILE *outfile) { fprintf(outfile, "Usage: %s [-y LAYOUT_FILE | -t] PARAMETER ...\n\n" diff --git a/util/nvramtool/common.h b/util/nvramtool/common.h index e15138c..f6f9dad 100644 --- a/util/nvramtool/common.h +++ b/util/nvramtool/common.h @@ -57,8 +57,8 @@ /* version of this program */ extern const char prog_version[]; -int get_line_from_file(FILE * f, char line[], int line_buf_size); +int get_line_from_file(FILE *f, char line[], int line_buf_size); noreturn void out_of_memory(void); -void usage(FILE * outfile); +void usage(FILE *outfile); #endif /* COMMON_H */ diff --git a/util/nvramtool/hexdump.c b/util/nvramtool/hexdump.c index 1d4fee1..de00d97 100644 --- a/util/nvramtool/hexdump.c +++ b/util/nvramtool/hexdump.c @@ -3,7 +3,7 @@ #include "hexdump.h" #include <ctype.h> -static void addrprint(FILE * outfile, uint64_t address, int width); +static void addrprint(FILE *outfile, uint64_t address, int width); /*-------------------------------------------------------------------------- * hexdump @@ -22,7 +22,7 @@ * formatted. *--------------------------------------------------------------------------*/ void hexdump(const void *mem, int bytes, uint64_t addrprint_start, - FILE * outfile, const hexdump_format_t * format) + FILE *outfile, const hexdump_format_t *format) { int bytes_left, index, i; const unsigned char *p; @@ -117,7 +117,7 @@ * width: The number of bytes wide the address should be displayed as. * Must be a value from 1 to 8. *--------------------------------------------------------------------------*/ -static void addrprint(FILE * outfile, uint64_t address, int width) +static void addrprint(FILE *outfile, uint64_t address, int width) { char s[17]; int i; diff --git a/util/nvramtool/hexdump.h b/util/nvramtool/hexdump.h index 2a4e563..4f15b59 100644 --- a/util/nvramtool/hexdump.h +++ b/util/nvramtool/hexdump.h @@ -60,6 +60,6 @@ * formatted. *--------------------------------------------------------------------------*/ void hexdump(const void *mem, int bytes, uint64_t addrprint_start, - FILE * outfile, const hexdump_format_t * format); + FILE * outfile, const hexdump_format_t *format); #endif /* _HEXDUMP_H */ diff --git a/util/nvramtool/input_file.c b/util/nvramtool/input_file.c index 8d2c9f2..83309f6 100644 --- a/util/nvramtool/input_file.c +++ b/util/nvramtool/input_file.c @@ -8,7 +8,7 @@ #include "reg_expr.h" static int get_input_file_line(FILE * f, char line[], int line_buf_size); -static unsigned long long try_prepare_cmos_write(const cmos_entry_t * e, +static unsigned long long try_prepare_cmos_write(const cmos_entry_t *e, const char value_str[]); /* matches either a blank line or a comment line */ @@ -46,7 +46,7 @@ * write operations. Perform sanity checking on all write operations and * exit with an error message if there is a problem. ****************************************************************************/ -cmos_write_t *process_input_file(FILE * f) +cmos_write_t *process_input_file(FILE *f) { static const int LINE_BUF_SIZE = 256; static const size_t N_MATCHES = 4; @@ -126,7 +126,7 @@ * all sanity checks. Perform all write operations, destroying the list as * we go. ****************************************************************************/ -void do_cmos_writes(cmos_write_t * list) +void do_cmos_writes(cmos_write_t *list) { cmos_write_t *item; @@ -154,7 +154,7 @@ * array of 'line_buf_size' bytes. Return OK on success or an error code on * error. ****************************************************************************/ -static int get_input_file_line(FILE * f, char line[], int line_buf_size) +static int get_input_file_line(FILE *f, char line[], int line_buf_size) { switch (get_line_from_file(f, line, line_buf_size)) { case OK: @@ -185,7 +185,7 @@ * CMOS memory. On success, return the converted value. On error, exit with * an error message. ****************************************************************************/ -static unsigned long long try_prepare_cmos_write(const cmos_entry_t * e, +static unsigned long long try_prepare_cmos_write(const cmos_entry_t *e, const char value_str[]) { unsigned long long value; diff --git a/util/nvramtool/input_file.h b/util/nvramtool/input_file.h index b479e48..4278758 100644 --- a/util/nvramtool/input_file.h +++ b/util/nvramtool/input_file.h @@ -21,8 +21,8 @@ cmos_write_t *next; }; -cmos_write_t *process_input_file(FILE * f); -void do_cmos_writes(cmos_write_t * list); +cmos_write_t *process_input_file(FILE *f); +void do_cmos_writes(cmos_write_t *list); extern const char assignment_regex[]; diff --git a/util/nvramtool/layout.c b/util/nvramtool/layout.c index 582f14c..1ebd43f 100644 --- a/util/nvramtool/layout.c +++ b/util/nvramtool/layout.c @@ -21,7 +21,7 @@ static void default_cmos_layout_get_fn(void); static int areas_overlap(unsigned area_0_start, unsigned area_0_length, unsigned area_1_start, unsigned area_1_length); -static int entries_overlap(const cmos_entry_t * p, const cmos_entry_t * q); +static int entries_overlap(const cmos_entry_t *p, const cmos_entry_t *q); static const cmos_enum_item_t *find_first_cmos_enum_id(unsigned config_id); const char checksum_param_name[] = "check_sum"; @@ -71,8 +71,8 @@ * * Return 1 if CMOS entries 'p' and 'q' overlap. Else return 0. ****************************************************************************/ -static inline int entries_overlap(const cmos_entry_t * p, - const cmos_entry_t * q) +static inline int entries_overlap(const cmos_entry_t *p, + const cmos_entry_t *q) { return areas_overlap(p->bit, p->length, q->bit, q->length); } @@ -83,7 +83,7 @@ * Return a pointer to the cmos_entry_item_t that 'p' is embedded within. ****************************************************************************/ static inline const cmos_entry_item_t *cmos_entry_to_const_item - (const cmos_entry_t * p) { + (const cmos_entry_t *p) { static const cmos_entry_t *pos = &((cmos_entry_item_t *) 0)->item; unsigned long offset, address; @@ -98,7 +98,7 @@ * Return a pointer to the cmos_enum_item_t that 'p' is embedded within. ****************************************************************************/ static inline const cmos_enum_item_t *cmos_enum_to_const_item - (const cmos_enum_t * p) { + (const cmos_enum_t *p) { static const cmos_enum_t *pos = &((cmos_enum_item_t *) 0)->item; unsigned long offset, address; @@ -136,7 +136,7 @@ * operation fails because 'e' overlaps an existing CMOS entry, '*conflict' * will be set to point to the overlapping entry. ****************************************************************************/ -int add_cmos_entry(const cmos_entry_t * e, const cmos_entry_t ** conflict) +int add_cmos_entry(const cmos_entry_t *e, const cmos_entry_t **conflict) { cmos_entry_item_t *item, *prev, *new_entry; @@ -165,7 +165,7 @@ */ for (item = cmos_entry_list, prev = NULL; (item != NULL) && (item->item.bit < e->bit); - prev = item, item = item->next) ; + prev = item, item = item->next); if (prev == NULL) { if (entries_overlap(e, &cmos_entry_list->item)) { @@ -232,7 +232,7 @@ * Return a pointer to next entry in list after 'last' or NULL if no more * entries. ****************************************************************************/ -const cmos_entry_t *next_cmos_entry(const cmos_entry_t * last) +const cmos_entry_t *next_cmos_entry(const cmos_entry_t *last) { const cmos_entry_item_t *last_item, *next_item; @@ -247,7 +247,7 @@ * Attempt to add CMOS enum 'e' to our internal repository of layout * information. Return OK on success or an error code on failure. ****************************************************************************/ -int add_cmos_enum(const cmos_enum_t * e) +int add_cmos_enum(const cmos_enum_t *e) { cmos_enum_item_t *item, *prev, *new_enum; @@ -268,7 +268,7 @@ */ for (item = cmos_enum_list, prev = NULL; (item != NULL) && (item->item.config_id < e->config_id); - prev = item, item = item->next) ; + prev = item, item = item->next); if (item == NULL) { new_enum->next = NULL; @@ -357,7 +357,7 @@ * Return a pointer to next enum in list after 'last' or NULL if no more * enums. ****************************************************************************/ -const cmos_enum_t *next_cmos_enum(const cmos_enum_t * last) +const cmos_enum_t *next_cmos_enum(const cmos_enum_t *last) { const cmos_enum_item_t *last_item, *next_item; @@ -386,7 +386,7 @@ * Return a pointer to next enum in list after 'last' that matches the * 'config_id' field of 'last' or NULL if there are no more matching enums. ****************************************************************************/ -const cmos_enum_t *next_cmos_enum_id(const cmos_enum_t * last) +const cmos_enum_t *next_cmos_enum_id(const cmos_enum_t *last) { const cmos_enum_item_t *item; @@ -414,7 +414,7 @@ * bit positions to byte positions. Return OK on success or an error code if * a sanity check fails. ****************************************************************************/ -int checksum_layout_to_bytes(cmos_checksum_layout_t * layout) +int checksum_layout_to_bytes(cmos_checksum_layout_t *layout) { unsigned start, end, index; @@ -461,7 +461,7 @@ * On entry, '*layout' contains checksum-related layout information expressed * in bytes. Convert this information to bit positions. ****************************************************************************/ -void checksum_layout_to_bits(cmos_checksum_layout_t * layout) +void checksum_layout_to_bits(cmos_checksum_layout_t *layout) { layout->summed_area_start *= 8; layout->summed_area_end = (layout->summed_area_end * 8) + 7; @@ -507,7 +507,7 @@ for (item = cmos_enum_list; (item != NULL) && (item->item.config_id < config_id); - item = item->next) ; + item = item->next); return ((item == NULL) || (item->item.config_id > config_id)) ? NULL : item; diff --git a/util/nvramtool/layout.h b/util/nvramtool/layout.h index 02652e0..4cb1848 100644 --- a/util/nvramtool/layout.h +++ b/util/nvramtool/layout.h @@ -65,18 +65,18 @@ void register_cmos_layout_get_fn(cmos_layout_get_fn_t fn); void get_cmos_layout(void); -int add_cmos_entry(const cmos_entry_t * e, const cmos_entry_t ** conflict); +int add_cmos_entry(const cmos_entry_t *e, const cmos_entry_t **conflict); const cmos_entry_t *find_cmos_entry(const char name[]); const cmos_entry_t *first_cmos_entry(void); -const cmos_entry_t *next_cmos_entry(const cmos_entry_t * last); -int add_cmos_enum(const cmos_enum_t * e); +const cmos_entry_t *next_cmos_entry(const cmos_entry_t *last); +int add_cmos_enum(const cmos_enum_t *e); const cmos_enum_t *find_cmos_enum(unsigned config_id, unsigned long long value); const cmos_enum_t *first_cmos_enum(void); -const cmos_enum_t *next_cmos_enum(const cmos_enum_t * last); +const cmos_enum_t *next_cmos_enum(const cmos_enum_t *last); const cmos_enum_t *first_cmos_enum_id(unsigned config_id); -const cmos_enum_t *next_cmos_enum_id(const cmos_enum_t * last); +const cmos_enum_t *next_cmos_enum_id(const cmos_enum_t *last); int is_checksum_name(const char name[]); -int checksum_layout_to_bytes(cmos_checksum_layout_t * layout); -void checksum_layout_to_bits(cmos_checksum_layout_t * layout); +int checksum_layout_to_bytes(cmos_checksum_layout_t *layout); +void checksum_layout_to_bits(cmos_checksum_layout_t *layout); #endif /* LAYOUT_H */ diff --git a/util/nvramtool/lbtable.c b/util/nvramtool/lbtable.c index 6993cc0..44d359d 100644 --- a/util/nvramtool/lbtable.c +++ b/util/nvramtool/lbtable.c @@ -15,7 +15,7 @@ #include "hexdump.h" #include "cbfs.h" -typedef void (*lbtable_print_fn_t) (const struct lb_record * rec); +typedef void (*lbtable_print_fn_t) (const struct lb_record *rec); /* This structure represents an item in the coreboot table that may be * displayed using the -l option. @@ -451,7 +451,7 @@ for (p = start; (p <= end) && (end - p >= (sizeof(uint32_t) - 1)); p += 4) { - if (*(uint32_t*)phystov(p) != sig) + if (*(uint32_t *)phystov(p) != sig) continue; /* We found a valid signature. */ -- To view, visit https://review.coreboot.org/c/coreboot/+/86052?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I5a18a571300c6175ea6c8123e79807afa7a6f084 Gerrit-Change-Number: 86052 Gerrit-PatchSet: 1 Gerrit-Owner: openrc(a)posteo.de

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[XS] Change in coreboot[main]: cpu/x86/smm: Fix smm_get_save_state() returning invalid pointer
by Jamie Ryu (Code Review) 18 Jan '25

18 Jan '25

Attention is currently required from: Arthur Heymans, Intel coreboot Reviewers, Jérémy Compostella. Jamie Ryu has posted comments on this change by Jérémy Compostella. ( https://review.coreboot.org/c/coreboot/+/86038?usp=email ) Change subject: cpu/x86/smm: Fix smm_get_save_state() returning invalid pointer ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86038?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I09f969105190a004372c43cb1542f5b716da1eda Gerrit-Change-Number: 86038 Gerrit-PatchSet: 2 Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Comment-Date: Sat, 18 Jan 2025 21:52:16 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[M] Change in coreboot[main]: mb/asus/p8z77-v: Attempt to correctly route PCIe lanes
by Keith Hui (Code Review) 18 Jan '25

18 Jan '25

Attention is currently required from: Bill XIE. Keith Hui has posted comments on this change by Keith Hui. ( https://review.coreboot.org/c/coreboot/+/85413?usp=email ) Change subject: mb/asus/p8z77-v: Attempt to correctly route PCIe lanes ...................................................................... Patch Set 3: (1 comment) File src/mainboard/asus/p8x7x-series/variants/p8z77-v/early_init.c: https://review.coreboot.org/c/coreboot/+/85413/comment/57cec226_6d5f4fa4?us… : PS2, Line 77: {7, 34, 20, -1} > I read sb/intel/common/gpio.c again... and you're right. But I'll flip the enum around instead. […] I should add, the when-fixed values you reported is as I intended - I do intend to let 1061 keep the lane if there's no card in the slot. Do you want manual control? -- To view, visit https://review.coreboot.org/c/coreboot/+/85413?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If41197a1f817a48c209d25fc1ae461ec97ccf16c Gerrit-Change-Number: 85413 Gerrit-PatchSet: 3 Gerrit-Owner: Keith Hui <buurin(a)gmail.com> Gerrit-Reviewer: Bill XIE <persmule(a)hardenedlinux.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Bill XIE <persmule(a)hardenedlinux.org> Gerrit-Comment-Date: Sat, 18 Jan 2025 20:05:10 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Bill XIE <persmule(a)hardenedlinux.org> Comment-In-Reply-To: Keith Hui <buurin(a)gmail.com>

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[M] Change in coreboot[main]: mb/asus/p8z77-v: Attempt to correctly route PCIe lanes
by Keith Hui (Code Review) 18 Jan '25

18 Jan '25

Attention is currently required from: Bill XIE. Keith Hui has posted comments on this change by Keith Hui. ( https://review.coreboot.org/c/coreboot/+/85413?usp=email ) Change subject: mb/asus/p8z77-v: Attempt to correctly route PCIe lanes ...................................................................... Patch Set 2: (1 comment) File src/mainboard/asus/p8x7x-series/variants/p8z77-v/early_init.c: https://review.coreboot.org/c/coreboot/+/85413/comment/389431df_c1b60028?us… : PS2, Line 77: {7, 34, 20, -1} > This order should be reversed to {20, 34, 7, -1}, as get_gpios() works in little-endian way. […] I read sb/intel/common/gpio.c again... and you're right. But I'll flip the enum around instead. Should work the same. Throughout all this testing, did the PCIe x1 card you used to test never work? -- To view, visit https://review.coreboot.org/c/coreboot/+/85413?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If41197a1f817a48c209d25fc1ae461ec97ccf16c Gerrit-Change-Number: 85413 Gerrit-PatchSet: 2 Gerrit-Owner: Keith Hui <buurin(a)gmail.com> Gerrit-Reviewer: Bill XIE <persmule(a)hardenedlinux.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Bill XIE <persmule(a)hardenedlinux.org> Gerrit-Comment-Date: Sat, 18 Jan 2025 20:01:43 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Bill XIE <persmule(a)hardenedlinux.org>

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