coreboot-gerrit January 2025

coreboot-gerrit@coreboot.org

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[XL] Change in coreboot[main]: soc/mediatek/mt8196: Add eDP driver
by Jarried Lin (Code Review) 20 Jan '25

20 Jan '25

Attention is currently required from: Bincai Liu, Hung-Te Lin, Jarried Lin, Jitao Shi, Yidi Lin. Hello Bincai Liu, Hung-Te Lin, Yidi Lin, Yu-Ping Wu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85949?usp=email to look at the new patch set (#8). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: soc/mediatek/mt8196: Add eDP driver ...................................................................... soc/mediatek/mt8196: Add eDP driver Add eDP driver to adjust training flow and turn off PHY power before PHY configuration to prevent potential link training failures. DISP_DVO is a highly advanced variant of DP_INTF block for eDP or HDMI or simply digital video output. DISP represents “display”, while DVO is the abbreviation of “digital video output”. This version of DISP_DVO is mainly designed for eDP1.5 protocol. TEST=check edp training pass and show log: EQ training pass BUG=b:343351631 Change-Id: Iccba53f6c6181ca84624c216f9641a2ae9041671 Signed-off-by: Bincai Liu <bincai.liu(a)mediatek.corp-partner.google.com> Signed-off-by: Yidi Lin <yidilin(a)chromium.org> --- M src/soc/mediatek/common/dp/include/soc/dptx_common.h M src/soc/mediatek/mt8196/Makefile.mk A src/soc/mediatek/mt8196/dp_intf.c A src/soc/mediatek/mt8196/dptx.c A src/soc/mediatek/mt8196/dptx_hal.c M src/soc/mediatek/mt8196/include/soc/addressmap.h A src/soc/mediatek/mt8196/include/soc/dp_intf.h A src/soc/mediatek/mt8196/include/soc/dptx.h A src/soc/mediatek/mt8196/include/soc/dptx_hal.h A src/soc/mediatek/mt8196/include/soc/dptx_reg.h 10 files changed, 1,452 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/85949/8 -- To view, visit https://review.coreboot.org/c/coreboot/+/85949?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iccba53f6c6181ca84624c216f9641a2ae9041671 Gerrit-Change-Number: 85949 Gerrit-PatchSet: 8 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Bincai Liu <bincai.liu(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jitao Shi <jitao.shi(a)mediatek.corp-partner.google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Jitao Shi <jitao.shi(a)mediatek.corp-partner.google.com> Gerrit-Attention: Bincai Liu <bincai.liu(a)mediatek.corp-partner.google.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com>

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[XS] Change in coreboot[main]: soc/intel/elkhartlake/fsp_params.c: Adjust PchLegacyIoLowLatency param
by Johannes Hahn (Code Review) 20 Jan '25

20 Jan '25

Johannes Hahn has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/86068?usp=email ) Change subject: soc/intel/elkhartlake/fsp_params.c: Adjust PchLegacyIoLowLatency param ...................................................................... soc/intel/elkhartlake/fsp_params.c: Adjust PchLegacyIoLowLatency param According to Intel's recommendation for Time Coordinated Computing (TCC) the FSP-S parameter PchLegacyIoLowLatency should be set to 'Enabled' in order to promote low latencies on the PCH. With the previous setting 'Disbaled' == 0 low latencies on the PCH for I/O operations are not enhanced. Change-Id: I009cc10fee1f2cf2e2d7e6329cf98d2f95ea77b5 Signed-off-by: Johannes Hahn <johannes-hahn(a)siemens.com> --- M src/soc/intel/elkhartlake/fsp_params.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/86068/1 diff --git a/src/soc/intel/elkhartlake/fsp_params.c b/src/soc/intel/elkhartlake/fsp_params.c index 7b715f8..2f2e740 100644 --- a/src/soc/intel/elkhartlake/fsp_params.c +++ b/src/soc/intel/elkhartlake/fsp_params.c @@ -329,7 +329,7 @@ params->PsfTccEnable = 1; params->PmcLpmS0ixSubStateEnableMask = 0; params->PchDmiAspmCtrl = 0; - params->PchLegacyIoLowLatency = 0; + params->PchLegacyIoLowLatency = 1; params->EnableItbm = 0; params->D3ColdEnable = 0; params->PmcOsIdleEnable = 0; -- To view, visit https://review.coreboot.org/c/coreboot/+/86068?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I009cc10fee1f2cf2e2d7e6329cf98d2f95ea77b5 Gerrit-Change-Number: 86068 Gerrit-PatchSet: 1 Gerrit-Owner: Johannes Hahn <johannes-hahn(a)siemens.com>

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[XS] Change in coreboot[main]: mb/starlabs/starlite_adl: Enable DRAM and SSD sleep GPIOs
by Sean Rhodes (Code Review) 20 Jan '25

20 Jan '25

Sean Rhodes has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/86067?usp=email ) Change subject: mb/starlabs/starlite_adl: Enable DRAM and SSD sleep GPIOs ...................................................................... Set Ready For Review -- To view, visit https://review.coreboot.org/c/coreboot/+/86067?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic07cace736ce9d97bf7352b17951fe706b57ecf3 Gerrit-Change-Number: 86067 Gerrit-PatchSet: 1 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Comment-Date: Mon, 20 Jan 2025 11:41:28 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: mb/starlabs/starlite_adl: Enable TLS Confidentiality
by Sean Rhodes (Code Review) 20 Jan '25

20 Jan '25

Sean Rhodes has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/86066?usp=email ) Change subject: mb/starlabs/starlite_adl: Enable TLS Confidentiality ...................................................................... Set Ready For Review -- To view, visit https://review.coreboot.org/c/coreboot/+/86066?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iee0adea21c124e0a421a1506310944cc883a73fb Gerrit-Change-Number: 86066 Gerrit-PatchSet: 1 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Comment-Date: Mon, 20 Jan 2025 11:41:26 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: mb/starlabs/starlite_adl: Disconnect unused GPIOs
by Sean Rhodes (Code Review) 20 Jan '25

20 Jan '25

Sean Rhodes has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/86065?usp=email ) Change subject: mb/starlabs/starlite_adl: Disconnect unused GPIOs ...................................................................... Set Ready For Review -- To view, visit https://review.coreboot.org/c/coreboot/+/86065?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I68e0c8c840c811de733775e7a6f79d9d9e91bb8c Gerrit-Change-Number: 86065 Gerrit-PatchSet: 1 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Comment-Date: Mon, 20 Jan 2025 11:41:24 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: mb/starlabs/starlite_adl: Correct USB port configuration for cameras
by Sean Rhodes (Code Review) 20 Jan '25

20 Jan '25

Sean Rhodes has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/86064?usp=email ) Change subject: mb/starlabs/starlite_adl: Correct USB port configuration for cameras ...................................................................... Set Ready For Review -- To view, visit https://review.coreboot.org/c/coreboot/+/86064?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia2d8698394de69af53489e3a08c7fe7b4f2fbc07 Gerrit-Change-Number: 86064 Gerrit-PatchSet: 3 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 20 Jan 2025 11:41:15 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: mb/starlabs/starlite_adl: Correct USB Port comments
by Sean Rhodes (Code Review) 20 Jan '25

20 Jan '25

Sean Rhodes has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/86063?usp=email ) Change subject: mb/starlabs/starlite_adl: Correct USB Port comments ...................................................................... Set Ready For Review -- To view, visit https://review.coreboot.org/c/coreboot/+/86063?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ifd46cd7e633f37e57213fffee4f70a7262894100 Gerrit-Change-Number: 86063 Gerrit-PatchSet: 1 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Comment-Date: Mon, 20 Jan 2025 11:37:21 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: mb/starlabs/starlite_adl: Select more appropriate macros for USB ports
by Sean Rhodes (Code Review) 20 Jan '25

20 Jan '25

Attention is currently required from: Matt DeVillier, Sean Rhodes. Hello Matt DeVillier, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85974?usp=email to look at the new patch set (#7). Change subject: mb/starlabs/starlite_adl: Select more appropriate macros for USB ports ...................................................................... mb/starlabs/starlite_adl: Select more appropriate macros for USB ports Add the trace lengths as comments, and update the macros used for the USB ports accordingly. Like other boards, avoid the `USB2_PORT_TYPE_C` macro, as it makes ports behave inconsistantly. Change-Id: Id193b3ed86c58aedc7d5a1f384f2829a2bf18671 Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> --- M src/mainboard/starlabs/starlite_adl/variants/mk_v/devicetree.cb 1 file changed, 10 insertions(+), 10 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/85974/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/85974?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Id193b3ed86c58aedc7d5a1f384f2829a2bf18671 Gerrit-Change-Number: 85974 Gerrit-PatchSet: 7 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com>

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[S] Change in coreboot[main]: mb/starlabs/starlite_adl: Select more appropriate macros for USB ports
by Sean Rhodes (Code Review) 20 Jan '25

20 Jan '25

Attention is currently required from: Matt DeVillier, Sean Rhodes. Hello Matt DeVillier, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85974?usp=email to look at the new patch set (#6). Change subject: mb/starlabs/starlite_adl: Select more appropriate macros for USB ports ...................................................................... mb/starlabs/starlite_adl: Select more appropriate macros for USB ports Add the trace lengths as comments, and update the macros used for the USB ports accordingly. Like other boards, avoid the `USB2_PORT_TYPE_C` macro, as it makes ports behave inconsistantly. Change-Id: Id193b3ed86c58aedc7d5a1f384f2829a2bf18671 Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> --- M src/mainboard/starlabs/starlite_adl/variants/mk_v/devicetree.cb 1 file changed, 7 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/85974/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/85974?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Id193b3ed86c58aedc7d5a1f384f2829a2bf18671 Gerrit-Change-Number: 85974 Gerrit-PatchSet: 6 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com>

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[S] Change in coreboot[main]: mb/starlabs/starlite_adl: Select more appropriate macros for USB ports
by Sean Rhodes (Code Review) 20 Jan '25

20 Jan '25

Attention is currently required from: Matt DeVillier, Sean Rhodes. Hello Matt DeVillier, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85974?usp=email to look at the new patch set (#5). The following approvals got outdated and were removed: Code-Review+1 by Matt DeVillier, Verified+1 by build bot (Jenkins) Change subject: mb/starlabs/starlite_adl: Select more appropriate macros for USB ports ...................................................................... mb/starlabs/starlite_adl: Select more appropriate macros for USB ports Add the trace lengths as comments, and update the macros used for the USB ports accordingly. Like other boards, avoid the `USB2_PORT_TYPE_C` macro, as it makes ports behave inconsistantly. Change-Id: Id193b3ed86c58aedc7d5a1f384f2829a2bf18671 Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> --- M src/mainboard/starlabs/starlite_adl/variants/mk_v/devicetree.cb 1 file changed, 7 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/85974/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/85974?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Id193b3ed86c58aedc7d5a1f384f2829a2bf18671 Gerrit-Change-Number: 85974 Gerrit-PatchSet: 5 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com>

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coreboot-gerrit January 2025