coreboot-gerrit January 2025

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[main]: soc/intel/cmn/cnvi: Drop CNIP ACPI method
by Jérémy Compostella (Code Review) 22 Jan '25

22 Jan '25

Attention is currently required from: Cliff Huang, Intel coreboot Reviewers, Matt DeVillier, Sean Rhodes. Jérémy Compostella has posted comments on this change by Matt DeVillier. ( https://review.coreboot.org/c/coreboot/+/86091?usp=email ) Change subject: soc/intel/cmn/cnvi: Drop CNIP ACPI method ...................................................................... Patch Set 1: Code-Review+1 (1 comment) Patchset: PS1: Adding Cliff. -- To view, visit https://review.coreboot.org/c/coreboot/+/86091?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib60c48852923e965620f4eee6a886c8c0f5c1783 Gerrit-Change-Number: 86091 Gerrit-PatchSet: 1 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Comment-Date: Tue, 21 Jan 2025 22:03:42 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes

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[M] Change in coreboot[main]: drivers/intel/fsp2_0: Add option to control debug log level using CBFS
by Julius Werner (Code Review) 21 Jan '25

21 Jan '25

Attention is currently required from: Andrey Petrov, Intel coreboot Reviewers, Paul Menzel, Ronak Kanabar, Subrata Banik. Julius Werner has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/86001?usp=email ) Change subject: drivers/intel/fsp2_0: Add option to control debug log level using CBFS ...................................................................... Patch Set 8: (1 comment) File src/drivers/intel/fsp2_0/debug.c: https://review.coreboot.org/c/coreboot/+/86001/comment/667ce7cf_55824a49?us… : PS6, Line 185: if (!CONFIG(USE_CBFS_FILE_OPTION_BACKEND)) > > > Why? Why shouldn't this just work for all option backends equally? […] Not really sure which comment you're referring to but it's possible I may have missed something. I still don't really understand why you need this. As far as I can tell, the previous code in `fsp_control_log_level()` would just always return `fsp_map_console_log_level()`. With the implementation I proposed, an option file could override that behavior, but if the file doesn't exist it will still fall back to `fsp_map_console_log_level()`. So the default behavior doesn't change? If your concern is that after this change you want to build ChromeOS images that have the debug FSP built-in but don't enable the debug output by default (unless someone manually overwrote the setting), I think the obvious answer is to just have our ebuild add an option file with value 0 by default? -- To view, visit https://review.coreboot.org/c/coreboot/+/86001?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I2c14d26021dd0048fa24024119df857e216f18bd Gerrit-Change-Number: 86001 Gerrit-PatchSet: 8 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Comment-Date: Tue, 21 Jan 2025 21:24:41 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org>

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[S] Change in coreboot[main]: soc/intel/cmn/cnvi: Fix scope of CFLR ACPI method
by Matt DeVillier (Code Review) 21 Jan '25

21 Jan '25

Attention is currently required from: Intel coreboot Reviewers, Sean Rhodes. Hello Intel coreboot Reviewers, Sean Rhodes, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/86092?usp=email to look at the new patch set (#3). Change subject: soc/intel/cmn/cnvi: Fix scope of CFLR ACPI method ...................................................................... soc/intel/cmn/cnvi: Fix scope of CFLR ACPI method When the CFLR method was added, it was inadvertently put outside of the scope of the CNVW device. Move CFLR under CNVW, and adjust the method/ variable references as needed. TEST=boot linux, dump ACPI, verify no unknown methods or objects related to the CNVW device. Change-Id: I7065e24626b2f763868909b8f85a8f18b4cc229b Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com> --- M src/soc/intel/common/block/cnvi/cnvi.c 1 file changed, 7 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/86092/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/86092?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7065e24626b2f763868909b8f85a8f18b4cc229b Gerrit-Change-Number: 86092 Gerrit-PatchSet: 3 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com>

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[S] Change in coreboot[main]: soc/intel/cmn/cnvi: Fix scope of ACPI methods
by Matt DeVillier (Code Review) 21 Jan '25

21 Jan '25

Attention is currently required from: Intel coreboot Reviewers, Sean Rhodes. Hello Intel coreboot Reviewers, Sean Rhodes, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/86092?usp=email to look at the new patch set (#2). Change subject: soc/intel/cmn/cnvi: Fix scope of ACPI methods ...................................................................... soc/intel/cmn/cnvi: Fix scope of ACPI methods When the CFLR method was added, it was inadvertently put outside of the scope of the CNVW device. Move CFLR under CNVW, and adjust the method/ variable references as needed. TEST=boot linux, dump ACPI, verify no unknown methods or objects related to the CNVW device. Change-Id: I7065e24626b2f763868909b8f85a8f18b4cc229b Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com> --- M src/soc/intel/common/block/cnvi/cnvi.c 1 file changed, 7 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/86092/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86092?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7065e24626b2f763868909b8f85a8f18b4cc229b Gerrit-Change-Number: 86092 Gerrit-PatchSet: 2 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com>

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[S] Change in coreboot[main]: soc/intel/cmn/cnvi: Fix scope of ACPI methods
by Matt DeVillier (Code Review) 21 Jan '25

21 Jan '25

Attention is currently required from: Intel coreboot Reviewers. Matt DeVillier has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/86092?usp=email ) Change subject: soc/intel/cmn/cnvi: Fix scope of ACPI methods ...................................................................... soc/intel/cmn/cnvi: Fix scope of ACPI methods When the CFLR and CNIP methods were added, they were inadvertently put outside of the scope of the CNVW device. Move them under it, and just method/variable references as needed. TEST=boot linux, dump ACPI, verify no unknown methods or objects related to the CNVW device. Change-Id: I7065e24626b2f763868909b8f85a8f18b4cc229b Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com> --- M src/soc/intel/common/block/cnvi/cnvi.c 1 file changed, 7 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/86092/1 diff --git a/src/soc/intel/common/block/cnvi/cnvi.c b/src/soc/intel/common/block/cnvi/cnvi.c index 301fb3a..964aa17 100644 --- a/src/soc/intel/common/block/cnvi/cnvi.c +++ b/src/soc/intel/common/block/cnvi/cnvi.c @@ -189,7 +189,7 @@ acpigen_write_if_lequal_op_int(LOCAL0_OP, 0); { - acpigen_emit_namestring("^CFLR"); + acpigen_emit_namestring("CFLR"); acpigen_write_store_int_to_namestr(1, "PRRS"); @@ -338,26 +338,26 @@ acpigen_write_method("_DSW", 3); acpigen_pop_len(); - acpigen_write_scope_end(); - /* * Method (CFLR, 0, NotSerialized) * { - * If (^CNVW.WFLR == One) + * If (WFLR == One) * { - * ^CNVW.WIFR = One + * WIFR = One * } * } */ acpigen_write_method("CFLR", 0); { - acpigen_write_if_lequal_namestr_int("^CNVW.WFLR", 1); + acpigen_write_if_lequal_namestr_int("WFLR", 1); { - acpigen_write_store_int_to_namestr(1, "^CNVW.WIFR"); + acpigen_write_store_int_to_namestr(1, "WIFR"); } acpigen_pop_len(); } acpigen_pop_len(); + + acpigen_write_scope_end(); } static struct device_operations cnvi_wifi_ops = { -- To view, visit https://review.coreboot.org/c/coreboot/+/86092?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7065e24626b2f763868909b8f85a8f18b4cc229b Gerrit-Change-Number: 86092 Gerrit-PatchSet: 1 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com>

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[S] Change in coreboot[main]: soc/intel/cmn/cnvi: Drop CNIP ACPI method
by Matt DeVillier (Code Review) 21 Jan '25

21 Jan '25

Matt DeVillier has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/86091?usp=email ) Change subject: soc/intel/cmn/cnvi: Drop CNIP ACPI method ...................................................................... soc/intel/cmn/cnvi: Drop CNIP ACPI method This method is used in the Intel/AMI reference code to verify that the device is present (vendor ID != 0xFFFFFFFF), but that's neither used nor needed here, as coreboot only generates SSDT code for devices which are actually present. TEST=build/boot Linux, verify no ACPI issues after dropping Change-Id: Ib60c48852923e965620f4eee6a886c8c0f5c1783 Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com> --- M src/soc/intel/common/block/cnvi/cnvi.c 1 file changed, 0 insertions(+), 25 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/86091/1 diff --git a/src/soc/intel/common/block/cnvi/cnvi.c b/src/soc/intel/common/block/cnvi/cnvi.c index 5e75f6d..301fb3a 100644 --- a/src/soc/intel/common/block/cnvi/cnvi.c +++ b/src/soc/intel/common/block/cnvi/cnvi.c @@ -358,31 +358,6 @@ acpigen_pop_len(); } acpigen_pop_len(); - -/* - * Method (CNIP, 0, NotSerialized) - * { - * If (^CNVW.VDID == 0xFFFFFFFF) - * { - * Return (Zero) - * } Else { - * Return (One) - * } - * } - */ - acpigen_write_method("CNIP", 0); - { - acpigen_write_if_lequal_namestr_int("^CNVW.VDID", 0xffffffff); - { - acpigen_write_return_integer(0); - } - acpigen_write_else(); - { - acpigen_write_return_integer(1); - } - acpigen_pop_len(); - } - acpigen_pop_len(); } static struct device_operations cnvi_wifi_ops = { -- To view, visit https://review.coreboot.org/c/coreboot/+/86091?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib60c48852923e965620f4eee6a886c8c0f5c1783 Gerrit-Change-Number: 86091 Gerrit-PatchSet: 1 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com>

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[S] Change in coreboot[main]: drivers/option: Add CBFS file based option backend
by Julius Werner (Code Review) 21 Jan '25

21 Jan '25

Attention is currently required from: Nicholas Chin, Swift Geek (Sebastian Grzywna). Julius Werner has posted comments on this change by Nicholas Chin. ( https://review.coreboot.org/c/coreboot/+/85905?usp=email ) Change subject: drivers/option: Add CBFS file based option backend ...................................................................... Patch Set 16: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85905?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ifc0439ee42f13f49ae54d4855d1d9333c39b01f5 Gerrit-Change-Number: 85905 Gerrit-PatchSet: 16 Gerrit-Owner: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Swift Geek (Sebastian Grzywna) <swiftgeek(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: Swift Geek (Sebastian Grzywna) <swiftgeek(a)gmail.com> Gerrit-Comment-Date: Tue, 21 Jan 2025 21:14:44 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: soc/intel/meteorlake: Move CNVi control out of chipset.cb
by Sean Rhodes (Code Review) 21 Jan '25

21 Jan '25

Attention is currently required from: Dinesh Gehlot, Eran Mitrani, Intel coreboot Reviewers, Jakub Czapiga, Jeremy Soller, Jérémy Compostella, Kapil Porwal, Matt DeVillier, Subrata Banik, Tarun, Tim Crawford. Sean Rhodes has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/86088?usp=email ) Change subject: soc/intel/meteorlake: Move CNVi control out of chipset.cb ...................................................................... Patch Set 4: (1 comment) File src/mainboard/intel/mtlrvp/variants/baseboard/mtlrvp_p/devicetree.cb: https://review.coreboot.org/c/coreboot/+/86088/comment/726378a9_aa0d698e?us… : PS3, Line 3: option NONE 0 > I'm guessing the editor auto deleted extraneous whitespace on save Done -- To view, visit https://review.coreboot.org/c/coreboot/+/86088?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie12e828b2f0a65e46a526746bc06af288270d0d1 Gerrit-Change-Number: 86088 Gerrit-PatchSet: 4 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Jeremy Soller <jeremy(a)system76.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Comment-Date: Tue, 21 Jan 2025 21:04:35 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Jérémy Compostella <jeremy.compostella(a)intel.com> Comment-In-Reply-To: Matt DeVillier <matt.devillier(a)gmail.com>

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[M] Change in coreboot[main]: drivers/intel/fsp2_0: Add option to control debug log level using CBFS
by Jérémy Compostella (Code Review) 21 Jan '25

21 Jan '25

Attention is currently required from: Andrey Petrov, Intel coreboot Reviewers, Julius Werner, Paul Menzel, Ronak Kanabar, Subrata Banik. Jérémy Compostella has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/86001?usp=email ) Change subject: drivers/intel/fsp2_0: Add option to control debug log level using CBFS ...................................................................... Patch Set 8: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/86001?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I2c14d26021dd0048fa24024119df857e216f18bd Gerrit-Change-Number: 86001 Gerrit-PatchSet: 8 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Comment-Date: Tue, 21 Jan 2025 20:50:54 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: soc/intel/pantherlake: Enable FSP debug log level control using CBFS
by Jérémy Compostella (Code Review) 21 Jan '25

21 Jan '25

Attention is currently required from: Intel coreboot Reviewers, Kapil Porwal, Pranava Y N, Subrata Banik. Jérémy Compostella has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/86002?usp=email ) Change subject: soc/intel/pantherlake: Enable FSP debug log level control using CBFS ...................................................................... Patch Set 8: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86002?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia2fc07188afde34d61ce8d50d3d722de48228e37 Gerrit-Change-Number: 86002 Gerrit-PatchSet: 8 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Comment-Date: Tue, 21 Jan 2025 20:48:19 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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coreboot-gerrit January 2025