coreboot-gerrit January 2025

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[S] Change in coreboot[main]: soc/intel/meteorlake: Move CNVi control out of chipset.cb
by Matt DeVillier (Code Review) 21 Jan '25

21 Jan '25

Attention is currently required from: Dinesh Gehlot, Eran Mitrani, Intel coreboot Reviewers, Jakub Czapiga, Jeremy Soller, Kapil Porwal, Sean Rhodes, Subrata Banik, Tarun, Tim Crawford. Matt DeVillier has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/86088?usp=email ) Change subject: soc/intel/meteorlake: Move CNVi control out of chipset.cb ...................................................................... Patch Set 2: (1 comment) File src/mainboard/system76/mtl/devicetree.cb: https://review.coreboot.org/c/coreboot/+/86088/comment/0486eb8b_cf3fb2a0?us… : PS2, Line 4: # Enable CNVi WiFi : register "cnvi_wifi_core" = "true" duplicate? -- To view, visit https://review.coreboot.org/c/coreboot/+/86088?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie12e828b2f0a65e46a526746bc06af288270d0d1 Gerrit-Change-Number: 86088 Gerrit-PatchSet: 2 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Jeremy Soller <jeremy(a)system76.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Comment-Date: Tue, 21 Jan 2025 16:09:13 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: soc/intel/meteorlake: Move CNVi control out of chipset.cb
by Sean Rhodes (Code Review) 21 Jan '25

21 Jan '25

Attention is currently required from: Dinesh Gehlot, Eran Mitrani, Intel coreboot Reviewers, Jakub Czapiga, Jeremy Soller, Kapil Porwal, Matt DeVillier, Subrata Banik, Tarun, Tim Crawford. Sean Rhodes has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/86088?usp=email ) Change subject: soc/intel/meteorlake: Move CNVi control out of chipset.cb ...................................................................... Patch Set 2: (1 comment) File src/mainboard/system76/mtl/devicetree.cb: https://review.coreboot.org/c/coreboot/+/86088/comment/d3693a46_30f2d65d?us… : PS1, Line 5: register "cnvi_wifi_core" = "true" > Move to `cnvi_wifi` device with other registers. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/86088?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie12e828b2f0a65e46a526746bc06af288270d0d1 Gerrit-Change-Number: 86088 Gerrit-PatchSet: 2 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Jeremy Soller <jeremy(a)system76.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Comment-Date: Tue, 21 Jan 2025 16:02:47 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Crawford <tcrawford(a)system76.com>

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[XS] Change in coreboot[main]: mb/starlabs/starbook/adl_n: Remove switch property from back USB port
by Sean Rhodes (Code Review) 21 Jan '25

21 Jan '25

Attention is currently required from: Paul Menzel. Sean Rhodes has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/86086?usp=email ) Change subject: mb/starlabs/starbook/adl_n: Remove switch property from back USB port ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/86086/comment/98abe07e_e03301f8?us… : PS1, Line 7: Correct USB Port Type > Maybe: Remove switch property from back USB port Done -- To view, visit https://review.coreboot.org/c/coreboot/+/86086?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic6b77f44a2d2607d201a2b097cea41aa361ebbee Gerrit-Change-Number: 86086 Gerrit-PatchSet: 2 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Tue, 21 Jan 2025 15:58:27 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org>

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[XS] Change in coreboot[main]: mb/starlabs/starbook/adl_n: Remove switch property from back USB port
by Sean Rhodes (Code Review) 21 Jan '25

21 Jan '25

Attention is currently required from: Sean Rhodes. Hello Matt DeVillier, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/86086?usp=email to look at the new patch set (#2). Change subject: mb/starlabs/starbook/adl_n: Remove switch property from back USB port ...................................................................... mb/starlabs/starbook/adl_n: Remove switch property from back USB port The back USB port is a data-only port without switching, so update the ACPI configuration accordingly. Change-Id: Ic6b77f44a2d2607d201a2b097cea41aa361ebbee Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> --- M src/mainboard/starlabs/starbook/variants/adl_n/devicetree.cb 1 file changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/86086/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86086?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic6b77f44a2d2607d201a2b097cea41aa361ebbee Gerrit-Change-Number: 86086 Gerrit-PatchSet: 2 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems>

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[S] Change in coreboot[main]: soc/intel/meteorlake: Move CNVi control out of chipset.cb
by Tim Crawford (Code Review) 21 Jan '25

21 Jan '25

Attention is currently required from: Dinesh Gehlot, Eran Mitrani, Intel coreboot Reviewers, Jakub Czapiga, Jeremy Soller, Kapil Porwal, Matt DeVillier, Sean Rhodes, Subrata Banik, Tarun. Tim Crawford has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/86088?usp=email ) Change subject: soc/intel/meteorlake: Move CNVi control out of chipset.cb ...................................................................... Patch Set 1: (1 comment) File src/mainboard/system76/mtl/devicetree.cb: https://review.coreboot.org/c/coreboot/+/86088/comment/6f87f6d8_03e5311e?us… : PS1, Line 5: register "cnvi_wifi_core" = "true" Move to `cnvi_wifi` device with other registers. -- To view, visit https://review.coreboot.org/c/coreboot/+/86088?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie12e828b2f0a65e46a526746bc06af288270d0d1 Gerrit-Change-Number: 86088 Gerrit-PatchSet: 1 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Jeremy Soller <jeremy(a)system76.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Comment-Date: Tue, 21 Jan 2025 15:54:01 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: mb/starlabs/starbook/adl_n: Remove SSD detect delay
by Paul Menzel (Code Review) 21 Jan '25

21 Jan '25

Attention is currently required from: Sean Rhodes. Paul Menzel has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/86074?usp=email ) Change subject: mb/starlabs/starbook/adl_n: Remove SSD detect delay ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/86074?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I9a234d8653c026b09411aa5b63ecba477aef325f Gerrit-Change-Number: 86074 Gerrit-PatchSet: 1 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Comment-Date: Tue, 21 Jan 2025 15:50:56 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: mb/starlabs/starbook/adl_n: Correct USB Port Type
by Paul Menzel (Code Review) 21 Jan '25

21 Jan '25

Attention is currently required from: Sean Rhodes. Paul Menzel has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/86086?usp=email ) The change is no longer submittable: All-Comments-Resolved is unsatisfied now. Change subject: mb/starlabs/starbook/adl_n: Correct USB Port Type ...................................................................... Patch Set 1: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/86086/comment/7bfb47f4_b9af4749?us… : PS1, Line 7: Correct USB Port Type Maybe: Remove switch property from back USB port -- To view, visit https://review.coreboot.org/c/coreboot/+/86086?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic6b77f44a2d2607d201a2b097cea41aa361ebbee Gerrit-Change-Number: 86086 Gerrit-PatchSet: 1 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Comment-Date: Tue, 21 Jan 2025 15:50:39 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[M] Change in coreboot[main]: mb/amd/birman_plus/ec: register bits
by Paul Menzel (Code Review) 21 Jan '25

21 Jan '25

Attention is currently required from: Ana Carolina Cabral. Paul Menzel has posted comments on this change by Ana Carolina Cabral. ( https://review.coreboot.org/c/coreboot/+/86084?usp=email ) Change subject: mb/amd/birman_plus/ec: register bits ...................................................................... Patch Set 6: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/86084/comment/08907aed_45218baf?us… : PS6, Line 7: register bits Please improve. -- To view, visit https://review.coreboot.org/c/coreboot/+/86084?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1a13d99a55a4aa02a5cb0e67ffa4ed555f91a471 Gerrit-Change-Number: 86084 Gerrit-PatchSet: 6 Gerrit-Owner: Ana Carolina Cabral Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Ana Carolina Cabral Gerrit-Comment-Date: Tue, 21 Jan 2025 15:49:53 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: soc/intel/meteorlake: Move CNVi control out of chipset.cb
by Sean Rhodes (Code Review) 21 Jan '25

21 Jan '25

Sean Rhodes has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/86088?usp=email ) Change subject: soc/intel/meteorlake: Move CNVi control out of chipset.cb ...................................................................... Set Ready For Review -- To view, visit https://review.coreboot.org/c/coreboot/+/86088?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie12e828b2f0a65e46a526746bc06af288270d0d1 Gerrit-Change-Number: 86088 Gerrit-PatchSet: 1 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Comment-Date: Tue, 21 Jan 2025 15:49:28 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No

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[XL] Change in coreboot[main]: mb/starlabs/starbook: Add Alder Lake-N (N200) variant
by Felix Held (Code Review) 21 Jan '25

21 Jan '25

Attention is currently required from: Sean Rhodes. Felix Held has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/85714?usp=email ) Change subject: mb/starlabs/starbook: Add Alder Lake-N (N200) variant ...................................................................... Patch Set 24: (1 comment) File src/mainboard/starlabs/starbook/variants/adl_n/devicetree.cb: PS24: > the PCH soft straps configure whether the TCSS is used for PCIe or XHCI, and on this board they're c […] that's the hsio lanes on the pch which can be used for pcie, sata or usb3 on type a; tcss is on the cpu for usb3 type c -- To view, visit https://review.coreboot.org/c/coreboot/+/85714?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Id45e31b61046748a57c8104081f689057621bb04 Gerrit-Change-Number: 85714 Gerrit-PatchSet: 24 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Comment-Date: Tue, 21 Jan 2025 15:48:07 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Matt DeVillier <matt.devillier(a)gmail.com> Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de>

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