coreboot-gerrit August 2024

coreboot-gerrit@coreboot.org

1 participants
3913 discussions

[XS] Change in coreboot[main]: mb/google/rauru: Reset USB hub in bootblock
by Jarried Lin (Code Review) 28 Aug '24

28 Aug '24

Attention is currently required from: Mingjin Ge, Yidi Lin, Yu-Ping Wu. Jarried Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/84024?usp=email ) Change subject: mb/google/rauru: Reset USB hub in bootblock ...................................................................... Patch Set 10: (3 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/84024/comment/aa307a85_119ee27b?us… : PS8, Line 7: usb > USB Done https://review.coreboot.org/c/coreboot/+/84024/comment/08e1c8bf_084046a7?us… : PS8, Line 7: reset > Reset Done https://review.coreboot.org/c/coreboot/+/84024/comment/cb94a400_ad54e709?us… : PS8, Line 8: > @jarried.lin@mediatek.com […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/84024?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iea793b4b04bd009d0354e2331604bccf30466a23 Gerrit-Change-Number: 84024 Gerrit-PatchSet: 10 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Mingjin Ge <mingjin.ge(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Mingjin Ge <mingjin.ge(a)mediatek.corp-partner.google.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Wed, 28 Aug 2024 11:56:17 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com> Comment-In-Reply-To: Yidi Lin <yidilin(a)google.com>

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[XS] Change in coreboot[main]: mb/google/rauru: Reset USB hub in bootblock
by Jarried Lin (Code Review) 28 Aug '24

28 Aug '24

Attention is currently required from: Jarried Lin, Mingjin Ge, Yu-Ping Wu. Hello Mingjin Ge, Yu-Ping Wu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/84024?usp=email to look at the new patch set (#10). Change subject: mb/google/rauru: Reset USB hub in bootblock ...................................................................... mb/google/rauru: Reset USB hub in bootblock We have to reset the USB hub as early as possible. Otherwise the USB3 hub may not be usable in the payload. This design has been introduced since Cherry. TEST=build pass. BUG=b:317009620 Change-Id: Iea793b4b04bd009d0354e2331604bccf30466a23 Signed-off-by: Jarried Lin <jarried.lin(a)mediatek.corp-partner.google.com> --- M src/mainboard/google/rauru/bootblock.c 1 file changed, 8 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/84024/10 -- To view, visit https://review.coreboot.org/c/coreboot/+/84024?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iea793b4b04bd009d0354e2331604bccf30466a23 Gerrit-Change-Number: 84024 Gerrit-PatchSet: 10 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Mingjin Ge <mingjin.ge(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Mingjin Ge <mingjin.ge(a)mediatek.corp-partner.google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com>

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[XL] Change in coreboot[main]: soc/intel/ptl: Do initial Panther Lake SoC commit till ramstage
by Saurabh Mishra (Code Review) 28 Aug '24

28 Aug '24

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[XL] Change in coreboot[main]: soc/intel/ptl: Do initial Panther Lake SoC commit till ramstage
by Saurabh Mishra (Code Review) 28 Aug '24

28 Aug '24

Attention is currently required from: Kapil Porwal, Pranava Y N, Subrata Banik. Saurabh Mishra has posted comments on this change by Saurabh Mishra. ( https://review.coreboot.org/c/coreboot/+/83798?usp=email ) Change subject: soc/intel/ptl: Do initial Panther Lake SoC commit till ramstage ...................................................................... Patch Set 57: (11 comments) This change is ready for review. File src/soc/intel/pantherlake/acpi.c: https://review.coreboot.org/c/coreboot/+/83798/comment/937aa9fe_38b97d3b?us… : PS56, Line 149: NULL > this is void function, can't return NULL Ack, updated. https://review.coreboot.org/c/coreboot/+/83798/comment/f6943705_4941f92f?us… : PS56, Line 163: NULL > same Ack, updated. https://review.coreboot.org/c/coreboot/+/83798/comment/33fc3ac9_97ec6127?us… : PS56, Line 239: DEBUG > BIOS_DEBUG will anyway add `[DEBUG]` , why we need again a msg called DEBUG Ack, removed. https://review.coreboot.org/c/coreboot/+/83798/comment/3aa2c7f8_c90eb8dd?us… : PS56, Line 240: MCHBAR32(GFXVTBAR), MCHBAR64(GFXVTBAR) > Why are printing the same `GFXVTBAR` with different macros like MCHBAR32 and MCHBAR64 ?? Hi Subrata, simplified to print only GFXVTBAR =0x%llx https://review.coreboot.org/c/coreboot/+/83798/comment/bce34044_2026b993?us… : PS56, Line 244: DEBUG > same Ack, removed. https://review.coreboot.org/c/coreboot/+/83798/comment/97706795_38949b09?us… : PS56, Line 258: DEBUG > same Ack, removed. https://review.coreboot.org/c/coreboot/+/83798/comment/4a143ace_4bcbcfc3?us… : PS56, Line 275: DEBUG > same Ack, removed. https://review.coreboot.org/c/coreboot/+/83798/comment/160ea218_3146d2a1?us… : PS56, Line 351: NULL > this is void function. […] Ack, updated. File src/soc/intel/pantherlake/chip.c: https://review.coreboot.org/c/coreboot/+/83798/comment/dc81a587_3bde6546?us… : PS56, Line 167: NULL > this is void fuction. […] Ack, updated. File src/soc/intel/pantherlake/cpu.c: https://review.coreboot.org/c/coreboot/+/83798/comment/bf0876db_8a7d60db?us… : PS56, Line 129: NULL > this is a `void` function. You can't return any data type here. […] Ack, updated. https://review.coreboot.org/c/coreboot/+/83798/comment/e4302026_45e4d320?us… : PS56, Line 172: return NULL; > same Ack, updated. -- To view, visit https://review.coreboot.org/c/coreboot/+/83798?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Idc6fb11e9e84c28c7567ae2b7abc1ab832a88362 Gerrit-Change-Number: 83798 Gerrit-PatchSet: 57 Gerrit-Owner: Saurabh Mishra <mishra.saurabh(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-CC: Ashish Kumar Mishra <ashish.k.mishra(a)intel.com> Gerrit-CC: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-CC: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-CC: Cliff Huang <cliff.huang(a)intel.com> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-CC: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-CC: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-CC: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-CC: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-CC: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-CC: Sanju Jose Thottan <sanjujose.thottan(a)intel.com> Gerrit-CC: Saurabh Mishra <mishra.saurabh(a)intel.corp-partner.google.com> Gerrit-CC: Vikrant L Jadeja <vikrant.l.jadeja(a)intel.com> Gerrit-CC: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Comment-Date: Wed, 28 Aug 2024 11:54:07 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com>

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[XS] Change in coreboot[main]: mb/google/rauru: Setup USB host in ramstage
by Jarried Lin (Code Review) 28 Aug '24

28 Aug '24

Attention is currently required from: Mingjin Ge, Yidi Lin. Jarried Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/84022?usp=email ) Change subject: mb/google/rauru: Setup USB host in ramstage ...................................................................... Patch Set 9: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/84022/comment/169122a3_4f85832e?us… : PS8, Line 7: add usb host support > Setup USB host in ramstage Done -- To view, visit https://review.coreboot.org/c/coreboot/+/84022?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I5d081ff3e7367b87fab5ebdcb148c9005ab583f5 Gerrit-Change-Number: 84022 Gerrit-PatchSet: 9 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Mingjin Ge <mingjin.ge(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Mingjin Ge <mingjin.ge(a)mediatek.corp-partner.google.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Comment-Date: Wed, 28 Aug 2024 11:53:43 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Yidi Lin <yidilin(a)google.com>

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[M] Change in coreboot[main]: soc/mediatek/mt8196: Add USB host support
by Jarried Lin (Code Review) 28 Aug '24

28 Aug '24

Attention is currently required from: Hung-Te Lin, Mingjin Ge. Jarried Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/84023?usp=email ) Change subject: soc/mediatek/mt8196: Add USB host support ...................................................................... Patch Set 9: (3 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/84023/comment/9645517a_d6156298?us… : PS8, Line 7: usb > USB Done https://review.coreboot.org/c/coreboot/+/84023/comment/3fc4fdd8_09b442a2?us… : PS8, Line 7: add > Add Done https://review.coreboot.org/c/coreboot/+/84023/comment/0aca0f45_a4fc765f?us… : PS8, Line 9: usb > USB Done -- To view, visit https://review.coreboot.org/c/coreboot/+/84023?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia4efcddac9bf5e04e688648a5c22384075a0b026 Gerrit-Change-Number: 84023 Gerrit-PatchSet: 9 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Mingjin Ge <mingjin.ge(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Mingjin Ge <mingjin.ge(a)mediatek.corp-partner.google.com> Gerrit-Comment-Date: Wed, 28 Aug 2024 11:53:24 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com>

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[M] Change in coreboot[main]: soc/mediatek/mt8196: Add USB host support
by Jarried Lin (Code Review) 28 Aug '24

28 Aug '24

Attention is currently required from: Hung-Te Lin, Jarried Lin, Mingjin Ge. Hello Hung-Te Lin, Mingjin Ge, Yidi Lin, Yu-Ping Wu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/84023?usp=email to look at the new patch set (#9). Change subject: soc/mediatek/mt8196: Add USB host support ...................................................................... soc/mediatek/mt8196: Add USB host support Add USB host function support. TEST=read usb data successfully. BUG=b:317009620 Signed-off-by: Mingjin Ge <mingjin.ge(a)mediatek.corp-partner.google.com> Change-Id: Ia4efcddac9bf5e04e688648a5c22384075a0b026 --- M src/soc/mediatek/mt8196/Makefile.mk A src/soc/mediatek/mt8196/include/soc/usb.h A src/soc/mediatek/mt8196/usb.c 3 files changed, 50 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/23/84023/9 -- To view, visit https://review.coreboot.org/c/coreboot/+/84023?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia4efcddac9bf5e04e688648a5c22384075a0b026 Gerrit-Change-Number: 84023 Gerrit-PatchSet: 9 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Mingjin Ge <mingjin.ge(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Mingjin Ge <mingjin.ge(a)mediatek.corp-partner.google.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com>

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[XS] Change in coreboot[main]: mb/google/rauru: Setup USB host in ramstage
by Jarried Lin (Code Review) 28 Aug '24

28 Aug '24

Attention is currently required from: Jarried Lin, Mingjin Ge. Hello Mingjin Ge, Yidi Lin, Yu-Ping Wu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/84022?usp=email to look at the new patch set (#9). Change subject: mb/google/rauru: Setup USB host in ramstage ...................................................................... mb/google/rauru: Setup USB host in ramstage Add usb host function support. TEST=read usb data successfully. BUG=b:317009620 Signed-off-by: Mingjin Ge <mingjin.ge(a)mediatek.corp-partner.google.com> Change-Id: I5d081ff3e7367b87fab5ebdcb148c9005ab583f5 --- M src/mainboard/google/rauru/mainboard.c 1 file changed, 2 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/84022/9 -- To view, visit https://review.coreboot.org/c/coreboot/+/84022?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I5d081ff3e7367b87fab5ebdcb148c9005ab583f5 Gerrit-Change-Number: 84022 Gerrit-PatchSet: 9 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Mingjin Ge <mingjin.ge(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Mingjin Ge <mingjin.ge(a)mediatek.corp-partner.google.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com>

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[XS] Change in coreboot[main]: mb/google/rauru: Reset USB hub in bootblock
by Jarried Lin (Code Review) 28 Aug '24

28 Aug '24

Attention is currently required from: Jarried Lin, Mingjin Ge, Yu-Ping Wu. Hello Mingjin Ge, Yu-Ping Wu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/84024?usp=email to look at the new patch set (#9). Change subject: mb/google/rauru: Reset USB hub in bootblock ...................................................................... mb/google/rauru: Reset USB hub in bootblock We have to reset the USB hub as early as possible. Otherwise the USB3 hub may not be usable in the payload. This design has been introduced since Cherry. TEST=build pass. BUG=b:317009620 Change-Id: Iea793b4b04bd009d0354e2331604bccf30466a23 Signed-off-by: Jarried Lin <jarried.lin(a)mediatek.corp-partner.google.com> --- M src/mainboard/google/rauru/bootblock.c 1 file changed, 8 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/84024/9 -- To view, visit https://review.coreboot.org/c/coreboot/+/84024?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iea793b4b04bd009d0354e2331604bccf30466a23 Gerrit-Change-Number: 84024 Gerrit-PatchSet: 9 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Mingjin Ge <mingjin.ge(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Mingjin Ge <mingjin.ge(a)mediatek.corp-partner.google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com>

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[XS] Change in coreboot[main]: soc/intel/adl: Prevent unconditional legacy COM ports initialization
by Subrata Banik (Code Review) 28 Aug '24

28 Aug '24

Subrata Banik has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/84080?usp=email ) Change subject: soc/intel/adl: Prevent unconditional legacy COM ports initialization ...................................................................... Patch Set 3: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/84080/comment/cfa9060f_f33aea30?us… : PS1, Line 14: These COM ports are being activated unconditionally, which is : undesirable for the Intel Alder Lake platform and causes traffic over : the IO bus. > > > > I don't understand this. What code is generating those writes? > > > > > > sorry if things are not cleared. As we are not using Legacy UART for ChromeOS device but looking at the Alder Lake code, we found that Legacy COMs are default enabled and we have observed some activity across those ports. Hence, pushed this CL to ensure legacy COMs are not getting enabled when the desired kconfig are not being selected > > > > After booting to Kernel, we are seeing some traffic. For sure that is not any FW code. > > marking the comment resolved and feel free opening if not statisfied. https://review.coreboot.org/c/coreboot/+/84080/comment/1d26dff9_d89dcc3e/ CL enabled (soc/alderlake: Enable all bits for IO decode / enable register) all LPC decode range looks like. I'm not sure if someone really wise to use parallel ports for printer even using Alder Lake chipset ? Adding @Sean Rhodes -- To view, visit https://review.coreboot.org/c/coreboot/+/84080?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7a6e38bd151f823d37c07ee89a800489122cc209 Gerrit-Change-Number: 84080 Gerrit-PatchSet: 3 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Rishika Raj <rishikaraj(a)google.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Wed, 28 Aug 2024 11:40:09 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz>

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coreboot-gerrit August 2024