coreboot-gerrit August 2024

coreboot-gerrit@coreboot.org

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[M] Change in coreboot[main]: mb/google/brox/jubilant: update dptf settings
by Karthik Ramasubramanian (Code Review) 28 Aug '24

28 Aug '24

Attention is currently required from: Bob Moragues, Kenneth Chan, Nick Vaccaro, Peter Ou, Ren Kuo. Karthik Ramasubramanian has posted comments on this change by Ren Kuo. ( https://review.coreboot.org/c/coreboot/+/84106?usp=email ) Change subject: mb/google/brox/jubilant: update dptf settings ...................................................................... Patch Set 3: (1 comment) Patchset: PS3: There are some build failures. Can you please check? Also does Jubilant not have a Fan? -- To view, visit https://review.coreboot.org/c/coreboot/+/84106?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I0043c728f1302e86c84849653f443dc560a51654 Gerrit-Change-Number: 84106 Gerrit-PatchSet: 3 Gerrit-Owner: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Bob Moragues <moragues(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Kenneth Chan <kenneth.chan(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Peter Ou <peter.ou(a)quanta.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Gerrit-Attention: Bob Moragues <moragues(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Kenneth Chan <kenneth.chan(a)quanta.corp-partner.google.com> Gerrit-Attention: Peter Ou <peter.ou(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Wed, 28 Aug 2024 16:56:30 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: soc/intel/common/block/cpu: Use the effective way size for NEM+
by Jérémy Compostella (Code Review) 28 Aug '24

28 Aug '24

Attention is currently required from: Ashish Kumar Mishra, Subrata Banik. Jérémy Compostella has posted comments on this change by Jérémy Compostella. ( https://review.coreboot.org/c/coreboot/+/83946?usp=email ) Change subject: soc/intel/common/block/cpu: Use the effective way size for NEM+ ...................................................................... Patch Set 10: (1 comment) File src/soc/intel/common/block/cpu/car/cache_as_ram.S: https://review.coreboot.org/c/coreboot/+/83946/comment/aef0fba1_904ecfbc?us… : PS4, Line 498: INTEL_CAR_ENEM_USE_EFFECTIVE_WAY_SIZE > I am limiting the Way Size to the Effective Way Size allowing me to compute the Max NEM Size. […] why would we consider the # of active cores ? This is just about complying with the ADL EDS or the MTL HAS when computing the way size / NEM size. -- To view, visit https://review.coreboot.org/c/coreboot/+/83946?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I5cb66da0aa977eecb64a0021268a6827747c521c Gerrit-Change-Number: 83946 Gerrit-PatchSet: 10 Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ashish Kumar Mishra <ashish.k.mishra(a)intel.com> Gerrit-Attention: Ashish Kumar Mishra <ashish.k.mishra(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Comment-Date: Wed, 28 Aug 2024 16:47:45 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Jérémy Compostella <jeremy.compostella(a)intel.com>

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[XS] Change in coreboot[main]: mb/google/brox/var/lotso: Remove STORAGE_UNKNOWN fw_config option
by Karthik Ramasubramanian (Code Review) 28 Aug '24

28 Aug '24

Karthik Ramasubramanian has submitted this change. ( https://review.coreboot.org/c/coreboot/+/84094?usp=email ) ( 1 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: mb/google/brox/var/lotso: Remove STORAGE_UNKNOWN fw_config option ...................................................................... mb/google/brox/var/lotso: Remove STORAGE_UNKNOWN fw_config option With `probe unprovisioned` fw_config rule, there is no need to define an explicit STORAGE_UNKNOWN option. Hence remove it. BUG=None TEST=Build Lotso FW image. Change-Id: Ia170a6e006cb51e95fbaf3efe1106ca907165eca Signed-off-by: Karthikeyan Ramasubramanian <kramasub(a)google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84094 Reviewed-by: Nick Vaccaro <nvaccaro(a)google.com> Reviewed-by: Bob Moragues <moragues(a)google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/google/brox/variants/lotso/overridetree.cb 1 file changed, 0 insertions(+), 4 deletions(-) Approvals: build bot (Jenkins): Verified Bob Moragues: Looks good to me, but someone else must approve Nick Vaccaro: Looks good to me, approved diff --git a/src/mainboard/google/brox/variants/lotso/overridetree.cb b/src/mainboard/google/brox/variants/lotso/overridetree.cb index 6876b64..e81848d 100644 --- a/src/mainboard/google/brox/variants/lotso/overridetree.cb +++ b/src/mainboard/google/brox/variants/lotso/overridetree.cb @@ -5,7 +5,6 @@ option RETIMER_JHL8040 2 end field STORAGE 2 3 - option STORAGE_UNKNOWN 0 option STORAGE_UFS 1 option STORAGE_NVME 2 end @@ -331,7 +330,6 @@ .clk_src = 0, .flags = PCIE_RP_LTR | PCIE_RP_AER, }" - probe STORAGE STORAGE_UNKNOWN probe STORAGE STORAGE_NVME probe unprovisioned end @@ -381,12 +379,10 @@ chip drivers/intel/ish device generic 0 alias ish_conf on end end - probe STORAGE STORAGE_UNKNOWN probe STORAGE STORAGE_UFS probe unprovisioned end device ref ufs on - probe STORAGE STORAGE_UNKNOWN probe STORAGE STORAGE_UFS probe unprovisioned end -- To view, visit https://review.coreboot.org/c/coreboot/+/84094?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia170a6e006cb51e95fbaf3efe1106ca907165eca Gerrit-Change-Number: 84094 Gerrit-PatchSet: 3 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Bob Moragues <moragues(a)chromium.org> Gerrit-Reviewer: Bob Moragues <moragues(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[S] Change in coreboot[main]: mb/google/brox: Disable Thunderbolt device
by Karthik Ramasubramanian (Code Review) 28 Aug '24

28 Aug '24

Karthik Ramasubramanian has submitted this change. ( https://review.coreboot.org/c/coreboot/+/84093?usp=email ) Change subject: mb/google/brox: Disable Thunderbolt device ...................................................................... mb/google/brox: Disable Thunderbolt device This feature is not required in Brox devices. Hence disable the concerned device. BUG=None TEST=Build Brox firmware and boot to OS. Ensure that the concerned device is disabled in the OS. Change-Id: I355852c780c552e6f9b2c28508f53580f392c1b9 Signed-off-by: Karthikeyan Ramasubramanian <kramasub(a)google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84093 Reviewed-by: Sowmya Aralguppe <sowmya.aralguppe(a)intel.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Reviewed-by: Abhishek Pandit-Subedi <abhishekpandit(a)chromium.org> --- M src/mainboard/google/brox/variants/baseboard/brox/devicetree.cb M src/mainboard/google/brox/variants/brox/overridetree.cb 2 files changed, 4 insertions(+), 18 deletions(-) Approvals: Abhishek Pandit-Subedi: Looks good to me, but someone else must approve Ren Kuo: Looks good to me, approved Sowmya Aralguppe: Looks good to me, but someone else must approve build bot (Jenkins): Verified diff --git a/src/mainboard/google/brox/variants/baseboard/brox/devicetree.cb b/src/mainboard/google/brox/variants/baseboard/brox/devicetree.cb index a82b4f0..22e15ac 100644 --- a/src/mainboard/google/brox/variants/baseboard/brox/devicetree.cb +++ b/src/mainboard/google/brox/variants/baseboard/brox/devicetree.cb @@ -160,11 +160,11 @@ }" end device ref dtt on end - device ref tbt_pcie_rp0 on end - device ref tbt_pcie_rp2 on end + device ref tbt_pcie_rp0 off end + device ref tbt_pcie_rp2 off end device ref tcss_xhci on end - device ref tcss_dma0 on end - device ref tcss_dma1 on end + device ref tcss_dma0 off end + device ref tcss_dma1 off end device ref xhci on end device ref shared_sram on end device ref i2c0 on diff --git a/src/mainboard/google/brox/variants/brox/overridetree.cb b/src/mainboard/google/brox/variants/brox/overridetree.cb index 18baa5d..37c4e01 100644 --- a/src/mainboard/google/brox/variants/brox/overridetree.cb +++ b/src/mainboard/google/brox/variants/brox/overridetree.cb @@ -268,20 +268,6 @@ end end end - device ref tcss_dma0 on - chip drivers/intel/usb4/retimer - register "dfp[0].power_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E4)" - use tcss_usb3_port1 as dfp[0].typec_port - device generic 0 on end - end - end - device ref tcss_dma1 on - chip drivers/intel/usb4/retimer - register "dfp[0].power_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E4)" - use tcss_usb3_port3 as dfp[0].typec_port - device generic 0 on end - end - end device ref pcie4_0 on # Enable CPU PCIE RP 1 using CLK 3 register "cpu_pcie_rp[CPU_RP(1)]" = "{ -- To view, visit https://review.coreboot.org/c/coreboot/+/84093?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I355852c780c552e6f9b2c28508f53580f392c1b9 Gerrit-Change-Number: 84093 Gerrit-PatchSet: 3 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Abhishek Pandit-Subedi <abhishekpandit(a)chromium.org> Gerrit-Reviewer: Bob Moragues <moragues(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Sowmya Aralguppe <sowmya.aralguppe(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[S] Change in coreboot[main]: payloads/depthcharge: Add default 64-bit libpayload config
by Cliff Huang (Code Review) 28 Aug '24

28 Aug '24

Attention is currently required from: Anil Kumar K, Bora Guvendik, Martin L Roth, Subrata Banik, Wonkyu Kim. Cliff Huang has posted comments on this change by Cliff Huang. ( https://review.coreboot.org/c/coreboot/+/84107?usp=email ) Change subject: payloads/depthcharge: Add default 64-bit libpayload config ...................................................................... Patch Set 4: (6 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/84107/comment/c206413e_570eed17?us… : PS1, Line 11: > please state the problem statement clearly here to make the code review easy? sure. will do. thx! https://review.coreboot.org/c/coreboot/+/84107/comment/c5d00dc9_d569e246?us… : PS1, Line 12: BUG= > BUG=none Acknowledged File payloads/external/depthcharge/Kconfig: https://review.coreboot.org/c/coreboot/+/84107/comment/3b3792fc_a9d429ea?us… : PS1, Line 65: LP_DEFCONFIG64_OVERRIDE > nit […] Acknowledged https://review.coreboot.org/c/coreboot/+/84107/comment/cec78ba7_78b210d8?us… : PS1, Line 69: The Depthcharge makefile looks for a file config.<boardname> in the : libpayload/configs directory. Say Y here to use the file defconfig : instead. This is can be a convenience for development purposes, or : if the defaults in defconfig are sufficient for your system. > this should somehow convey that one needs to select this config to boot a 64-bit payload […] Acknowledged File payloads/external/depthcharge/Makefile: https://review.coreboot.org/c/coreboot/+/84107/comment/59df6fdb_e105e363?us… : PS1, Line 34: defconfig64 > use a `_` between defconfig and 64? Acknowledged File payloads/libpayload/configs/defconfig64: https://review.coreboot.org/c/coreboot/+/84107/comment/c58cee3d_feaaad9a?us… : PS1, Line 3: CONFIG_LP_ARCH_X86_32=n > just comment out may be. we don't use `n` to assign to a Kconfig. […] Acknowledged -- To view, visit https://review.coreboot.org/c/coreboot/+/84107?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iac07cf9e3c11e49955c69553407be76ef4f8c060 Gerrit-Change-Number: 84107 Gerrit-PatchSet: 4 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Comment-Date: Wed, 28 Aug 2024 16:33:47 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com>

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[S] Change in coreboot[main]: payloads/depthcharge: Add default 64-bit libpayload config
by Cliff Huang (Code Review) 28 Aug '24

28 Aug '24

Attention is currently required from: Anil Kumar K, Bora Guvendik, Cliff Huang, Martin L Roth, Wonkyu Kim. Hello Anil Kumar K, Bora Guvendik, Martin L Roth, Subrata Banik, Wonkyu Kim, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/84107?usp=email to look at the new patch set (#4). Change subject: payloads/depthcharge: Add default 64-bit libpayload config ...................................................................... payloads/depthcharge: Add default 64-bit libpayload config Add CONFIG_LP_DEFCONFIG_OVERRIDE_X64 flag to select default 64-bit config file in payloads/libpayload/configs directory. This is used in standalone environment. The existing libpayload deconfig file is for boards with 32-bit format and deconfig_64 file is added for 64-bit without adding specific board.[board name] file in libpayload. BUG=none TEST=Build with this new flag and check that the libpayload and depthcharge.elf are built in 64-bit format. Signed-off-by: Cliff Huang <cliff.huang(a)intel.com> Change-Id: Iac07cf9e3c11e49955c69553407be76ef4f8c060 --- M payloads/external/Makefile.mk M payloads/external/depthcharge/Kconfig M payloads/external/depthcharge/Makefile A payloads/libpayload/configs/defconfig_64 4 files changed, 27 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/84107/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/84107?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iac07cf9e3c11e49955c69553407be76ef4f8c060 Gerrit-Change-Number: 84107 Gerrit-PatchSet: 4 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Wonkyu Kim <wonkyu.kim(a)intel.com>

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[S] Change in coreboot[main]: payloads/depthcharge: Add default 64-bit libpayload config
by Cliff Huang (Code Review) 28 Aug '24

28 Aug '24

Attention is currently required from: Anil Kumar K, Bora Guvendik, Cliff Huang, Martin L Roth, Wonkyu Kim. Hello Anil Kumar K, Bora Guvendik, Martin L Roth, Subrata Banik, Wonkyu Kim, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/84107?usp=email to look at the new patch set (#3). Change subject: payloads/depthcharge: Add default 64-bit libpayload config ...................................................................... payloads/depthcharge: Add default 64-bit libpayload config Add CONFIG_LP_DEFCONFIG_OVERRIDE_X64 flag to select default 64-bit config file in payloads/libpayload/configs directory. This is used in standalone environment. The existing libpayload deconfig file is for boards with 32-bit format and deconfig_64 file is added for 64-bit without adding specific board.[board name] file in libpayload. BUG=none TEST=Build with this new flag and check that the libpayload and depthcharge.elf are built in 64-bit format. Signed-off-by: Cliff Huang <cliff.huang(a)intel.com> Change-Id: Iac07cf9e3c11e49955c69553407be76ef4f8c060 --- M payloads/external/Makefile.mk M payloads/external/depthcharge/Kconfig M payloads/external/depthcharge/Makefile A payloads/libpayload/configs/defconfig_64 4 files changed, 27 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/84107/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/84107?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iac07cf9e3c11e49955c69553407be76ef4f8c060 Gerrit-Change-Number: 84107 Gerrit-PatchSet: 3 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Wonkyu Kim <wonkyu.kim(a)intel.com>

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[XS] Change in coreboot[main]: mb/qemu-i440fx/rom_media: Use MEM_REGION_DEV_INIT() for boot_dev
by Felix Held (Code Review) 28 Aug '24

28 Aug '24

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/84089?usp=email ) Change subject: mb/qemu-i440fx/rom_media: Use MEM_REGION_DEV_INIT() for boot_dev ...................................................................... mb/qemu-i440fx/rom_media: Use MEM_REGION_DEV_INIT() for boot_dev `boot_dev` can be const, and we can use MEM_REGION_DEV_INIT() as all the values are known at compile time. Change-Id: Icd3757ba4b5e8bfbee9e9c9d18bf0ee71520a8ac Signed-off-by: Nico Huber <nico.h(a)gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84089 Reviewed-by: Arthur Heymans <arthur(a)aheymans.xyz> Reviewed-by: Krystian Hebel <krystian.hebel(a)3mdeb.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/emulation/qemu-i440fx/rom_media.c 1 file changed, 2 insertions(+), 5 deletions(-) Approvals: Arthur Heymans: Looks good to me, approved Krystian Hebel: Looks good to me, approved build bot (Jenkins): Verified diff --git a/src/mainboard/emulation/qemu-i440fx/rom_media.c b/src/mainboard/emulation/qemu-i440fx/rom_media.c index d2469ba..f4fd3c3 100644 --- a/src/mainboard/emulation/qemu-i440fx/rom_media.c +++ b/src/mainboard/emulation/qemu-i440fx/rom_media.c @@ -97,7 +97,8 @@ } static struct region_device_ops flash_ops; -static struct mem_region_device boot_dev; +static const struct mem_region_device boot_dev = + MEM_REGION_DEV_INIT(0x100000000ULL - CONFIG_ROM_SIZE, CONFIG_ROM_SIZE, &flash_ops); /* * Depending on how firmware image was passed to QEMU, it may behave as: @@ -133,10 +134,6 @@ */ flash_ops = mem_rdev_rw_ops; - boot_dev.base = (void *)(uintptr_t)(0x100000000ULL - CONFIG_ROM_SIZE); - boot_dev.rdev.ops = &flash_ops; - boot_dev.rdev.region.size = CONFIG_ROM_SIZE; - /* * Find first byte different than any of the commands, simplified. * -- To view, visit https://review.coreboot.org/c/coreboot/+/84089?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Icd3757ba4b5e8bfbee9e9c9d18bf0ee71520a8ac Gerrit-Change-Number: 84089 Gerrit-PatchSet: 2 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[S] Change in coreboot[main]: mb/google/nissa/var/anraggar: Force audio mute to avoid screen flick
by Felix Held (Code Review) 28 Aug '24

28 Aug '24

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/84098?usp=email ) Change subject: mb/google/nissa/var/anraggar: Force audio mute to avoid screen flick ...................................................................... mb/google/nissa/var/anraggar: Force audio mute to avoid screen flick Panel CSOT MNB601LS1-3 will flicker once during enter Chrome login screen, it is because it inserts 12 blank frames if it receives the unmute in VB-ID. Always override the mute in VB-ID to avoid Tcon EC detected the audiomute_flag change. BUG:b=357764688 BRANCH=firmware-nissa-15217.B TEST:Verfied on Anraggar and cannot reproduce the issue Change-Id: I711dfd0803440e4b04f02849fed529c3872e023d Signed-off-by: Simon Yang <simon1.yang(a)intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84098 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Subrata Banik <subratabanik(a)google.com> --- M src/mainboard/google/brya/variants/anraggar/variant.c 1 file changed, 18 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Subrata Banik: Looks good to me, approved diff --git a/src/mainboard/google/brya/variants/anraggar/variant.c b/src/mainboard/google/brya/variants/anraggar/variant.c index 0615618..a9a5589 100644 --- a/src/mainboard/google/brya/variants/anraggar/variant.c +++ b/src/mainboard/google/brya/variants/anraggar/variant.c @@ -5,6 +5,11 @@ #include <fw_config.h> #include <sar.h> #include <soc/gpio_soc_defs.h> +#include <intelblocks/graphics.h> + +/* Per-pipe DDI Function Control 2 */ +#define TRANS_DDI_FUNC_CTL2_A 0x60404 +#define TRANS_DDI_AUDIO_MUTE_OVERRIDE_BITS_FIELDS (3 << 6) const char *get_wifi_sar_cbfs_filename(void) { @@ -37,3 +42,16 @@ config->typec_aux_bias_pads[1].pad_auxn_dc = GPP_E23; } } + +void variant_finalize(void) +{ + /* + * Panel CSOT MNB601LS1-3 will flicker once during enter Chrome login screen, + * it is because it inserts 12 blank frames if it receives the unmute in VB-ID. + * + * Always override the mute in VB-ID to avoid Tcon EC detected the + * audiomute_flag change. + */ + graphics_gtt_rmw(TRANS_DDI_FUNC_CTL2_A, ~TRANS_DDI_AUDIO_MUTE_OVERRIDE_BITS_FIELDS, + TRANS_DDI_AUDIO_MUTE_OVERRIDE_BITS_FIELDS); +} -- To view, visit https://review.coreboot.org/c/coreboot/+/84098?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I711dfd0803440e4b04f02849fed529c3872e023d Gerrit-Change-Number: 84098 Gerrit-PatchSet: 9 Gerrit-Owner: Simon Yang <simon1.yang(a)intel.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Jianeng Ceng <cengjianeng(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Rishika Raj <rishikaraj(a)google.com> Gerrit-Reviewer: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[S] Change in coreboot[main]: payloads/depthcharge: Add default 64-bit libpayload config
by Cliff Huang (Code Review) 28 Aug '24

28 Aug '24

Attention is currently required from: Anil Kumar K, Bora Guvendik, Cliff Huang, Martin L Roth, Wonkyu Kim. Hello Anil Kumar K, Bora Guvendik, Martin L Roth, Subrata Banik, Wonkyu Kim, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/84107?usp=email to look at the new patch set (#2). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: payloads/depthcharge: Add default 64-bit libpayload config ...................................................................... payloads/depthcharge: Add default 64-bit libpayload config Add CONFIG_LP_DEFCONFIG_OVERRIDE_X64 flag to select default 64-bit config file in payloads/libpayload/configs directory. This is used in standalone environment. The existing libpayload deconfig file is for boards with 32-bit format and deconfig64 file is added for 64-bit without adding specific board.[board name] file in libpayload. BUG=none TEST=Build with this new flag and check that the libpayload and depthcharge.elf are built in 64-bit format. Signed-off-by: Cliff Huang <cliff.huang(a)intel.com> Change-Id: Iac07cf9e3c11e49955c69553407be76ef4f8c060 --- M payloads/external/Makefile.mk M payloads/external/depthcharge/Kconfig M payloads/external/depthcharge/Makefile A payloads/libpayload/configs/defconfig64 4 files changed, 27 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/84107/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/84107?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iac07cf9e3c11e49955c69553407be76ef4f8c060 Gerrit-Change-Number: 84107 Gerrit-PatchSet: 2 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Wonkyu Kim <wonkyu.kim(a)intel.com>

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coreboot-gerrit August 2024