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Change subject: payloads/depthcharge: Add default 64-bit libpayload config
......................................................................
Patch Set 1:
(6 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/84107/comment/20fb1a42_de2e01a9?us… :
PS1, Line 11:
please state the problem statement clearly here to make the code review easy?
https://review.coreboot.org/c/coreboot/+/84107/comment/787ebdf6_27e84465?us… :
PS1, Line 12: BUG=
BUG=none
File payloads/external/depthcharge/Kconfig:
https://review.coreboot.org/c/coreboot/+/84107/comment/f60540ef_44331c02?us… :
PS1, Line 65: LP_DEFCONFIG64_OVERRIDE
nit
```
LP_DEFCONFIG_OVERRIDE_x64
```
https://review.coreboot.org/c/coreboot/+/84107/comment/00db8d1f_ea02c1ab?us… :
PS1, Line 69: The Depthcharge makefile looks for a file config.<boardname> in the
: libpayload/configs directory. Say Y here to use the file defconfig
: instead. This is can be a convenience for development purposes, or
: if the defaults in defconfig are sufficient for your system.
this should somehow convey that one needs to select this config to boot a 64-bit payload
Also have a depends on `!LP_DEFCONFIG_OVERRIDE`
File payloads/external/depthcharge/Makefile:
https://review.coreboot.org/c/coreboot/+/84107/comment/268cc413_2ce0d1ea?us… :
PS1, Line 34: defconfig64
use a `_` between defconfig and 64?
File payloads/libpayload/configs/defconfig64:
https://review.coreboot.org/c/coreboot/+/84107/comment/d398779c_972c9d2d?us… :
PS1, Line 3: CONFIG_LP_ARCH_X86_32=n
just comment out may be. we don't use `n` to assign to a Kconfig.
```
# CONFIG_LP_ARCH_X86_32 is not set
```
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Change subject: payloads/depthcharge: Add default 64-bit libpayload config
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
> I assume this is for standalone build of coreboot? you don't need anything specifically to build 64- […]
Correct. This is used in standalone environment. The existing paylloads/libpayload/configs/deconfig is for older boards with 32-bit and we need another one for 64-bit, but we want to avoid using specific paylloads/libpayload/configs/board.[board name] file such as board.ptlrvp64 in the environment.
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Change subject: mb/system76/mtl: Add Lemur Pro 13
......................................................................
Patch Set 5:
(3 comments)
File src/mainboard/system76/mtl/variants/lemp13/ramstage.c:
https://review.coreboot.org/c/coreboot/+/82788/comment/06b321c7_1784efdf?us… :
PS3, Line 14: params->EnableTcssCovTypeA[1] = 0x81;
: params->EnableTcssCovTypeA[3] = 0x85;
> Waiting on either Intel to release a Client FSP or Google to do whatever they do to update the heade […]
I give up. I just commented it out so downstream we will only have to uncomment it.
File src/mainboard/system76/mtl/variants/lemp13/tas5825m.c:
PS2:
> - Driver was added in CB:43614 […]
Done
https://review.coreboot.org/c/coreboot/+/82788/comment/e5267b54_1b8ad94d?us… :
PS2, Line 44: {
: const uint8_t values[] = {
: 0x00, 0xFE, 0x00, 0x40, 0x00, 0xFC, 0x00, 0x00,
: 0x00, 0xFC, 0x00, 0x00, 0x00, 0xFC, 0x00, 0x00,
: 0x00, 0xFC, 0x00, 0x00, 0x00, 0xFC, 0x00, 0x00,
: 0x00, 0xFC, 0x00, 0x00, 0x00, 0xFC, 0x00, 0x00,
: 0x00, 0xFC, 0x50, 0x00, 0x00, 0xFC, 0x00, 0x00,
: 0x00, 0xFC, 0x00, 0x00, 0x00, 0xFC, 0x00, 0x00,
: 0x00, 0xFC, 0x00, 0x00, 0x00, 0xFC, 0x00, 0x00,
: 0x00, 0xFC, 0x00, 0x00, 0x00, 0xFC, 0x00, 0x00,
: 0x00, 0xFC, 0x00, 0x00, 0x00, 0xFC, 0x00, 0x00,
: 0x00, 0xFC, 0x00, 0x00, 0x00, 0xFC, 0x00, 0x00,
: 0x00, 0xFC, 0x00, 0x00, 0x00, 0xFC, 0x00, 0x00,
: 0x00, 0xFC, 0x00, 0x00, 0x00, 0xFC, 0x00, 0x00,
: 0x00, 0x82, 0x00, 0x93, 0x00, 0xFC, 0x00, 0x00,
: 0x8F, 0x00, 0xFF, 0xEF, 0x84, 0x49, 0x03, 0x27,
: 0x84, 0x02, 0x04, 0x06, 0x02, 0x60, 0x00, 0x01,
: 0x00
: };
: res = tas5825m_write_block_at(dev, 0x08, values, ARRAY_SIZE(values));
: if (res < 0)
: return res;
: }
> When the driver was originally written these were all big blocks of 1 byte writes each. […]
Done
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Change subject: mb/system76/mtl: Add Lemur Pro 13
......................................................................
mb/system76/mtl: Add Lemur Pro 13
The Lemur Pro 13 (lemp13) is an Intel Meteor Lake-U based board.
There are 2 variants to differentiate which keyboard design the unit
uses, as they require different EC firmware.
Change-Id: Icac8c7dafd6371881622d797f399f8ddbe13cbce
Signed-off-by: Jeremy Soller <jeremy(a)system76.com>
Signed-off-by: Tim Crawford <tcrawford(a)system76.com>
---
M src/mainboard/system76/mtl/Kconfig
M src/mainboard/system76/mtl/Kconfig.name
M src/mainboard/system76/mtl/Makefile.mk
A src/mainboard/system76/mtl/spd/samsung-M425R1GB4BB0-CQKOD.spd.hex
A src/mainboard/system76/mtl/spd/samsung-M425R1GB4PB0-CWMOD.spd.hex
A src/mainboard/system76/mtl/variants/lemp13/board.fmd
A src/mainboard/system76/mtl/variants/lemp13/board_info.txt
A src/mainboard/system76/mtl/variants/lemp13/data.vbt
A src/mainboard/system76/mtl/variants/lemp13/gpio.c
A src/mainboard/system76/mtl/variants/lemp13/gpio_early.c
A src/mainboard/system76/mtl/variants/lemp13/hda_verb.c
A src/mainboard/system76/mtl/variants/lemp13/overridetree.cb
A src/mainboard/system76/mtl/variants/lemp13/ramstage.c
A src/mainboard/system76/mtl/variants/lemp13/romstage.c
A src/mainboard/system76/mtl/variants/lemp13/tas5825m.c
15 files changed, 1,672 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/88/82788/5
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Change subject: soc/intel/common/block/cpu: Use the effective way size for NEM+
......................................................................
Patch Set 10:
(1 comment)
File src/soc/intel/common/block/cpu/car/cache_as_ram.S:
https://review.coreboot.org/c/coreboot/+/83946/comment/3f7911c3_28ddb89a?us… :
PS4, Line 498: INTEL_CAR_ENEM_USE_EFFECTIVE_WAY_SIZE
> I am limiting the Way Size to the Effective Way Size allowing me to compute the Max NEM Size. […]
Does this consider if no. of active cores power of 2 and the total including reserved region.
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Change subject: soc/intel/meteorlake: Remove SOC_INTEL_GFX_MBUS_JOIN config
......................................................................
Patch Set 3:
(2 comments)
Patchset:
PS3:
> I think, older (non-ChromeOS) installations need to be supported.
The condition that we are removing is relevant only for ChromeOS (`MAINBOARD_HAS_CHROMEOS`)
```
select SOC_INTEL_GFX_MBUS_JOIN if MAINBOARD_HAS_CHROMEOS && BMP_LOGO
```
For non-ChromeOS platforms this CL is a no-op.
Commit Message:
https://review.coreboot.org/c/coreboot/+/81034/comment/c2f5b5e6_3c1de1b2?us… :
PS3, Line 11: kernel driver (https://patchwork.freedesktop.org/series/130480/),
> The patches are not in upstream Linux yet (no idea if they have been applied by the subsystem mainta […]
The patches are actually in upstream Linux for a very long time -- https://github.com/torvalds/linux/commit/8c5dbb5039fd7ed4eb0062eaed793f86ee…https://elixir.bootlin.com/linux/v6.10/source/drivers/gpu/drm/i915/display/…
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Change subject: mb/lattepanda: Add support for LattePanda Mu
......................................................................
Patch Set 13:
(1 comment)
File src/mainboard/lattepanda/mu/mainboard.c:
https://review.coreboot.org/c/coreboot/+/83719/comment/0539245e_a79c54ac?us… :
PS13, Line 46: co
> Is this necessary? It seems like the default.
verify again, if remove the function display still work
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Change subject: soc/intel/ptl: Do initial Panther Lake SoC commit till ramstage
......................................................................
Patch Set 60:
(1 comment)
File src/soc/intel/pantherlake/acpi.c:
https://review.coreboot.org/c/coreboot/+/83798/comment/53708b37_84e9de85?us… :
PS59, Line 125: map
> > Hi Subrata, will it also be requiring to make changes in other SOC platforms which are using gener […]
Sure, updated as suggested.
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Change subject: mb/lattepanda: Add support for LattePanda Mu
......................................................................
mb/lattepanda: Add support for LattePanda Mu
Add initial support for the LattePanda Mu board, which features:
- Intel Alder Lake-N N100 processor
- 8GB LPDDR5 memory
- 64GB eMMC storage
- SO-DIMM 260-pin connector for function expansion
This commit includes:
- Basic board configuration
- Memory initialization
- Essential I/O setup
- Used UEFITOOL to extract data.vbt file from original BIOS
Testing with Lite carrier board
- payload: mrchromebox/edk2
- edk2: uefipayload_202309
- Booting into installed Windows 11: Passed
- USB 3.0/2.0: Working
- HDMI output: Working
- Realtek Ethernet: Working
- S3 sleep mode: Failed
- Power on after shutdown: Failed (requires power removal)
- Installing Ubuntu 22.04: Failed
- UART of SuperIO in OS: Missing
- Environment Controller: Not supported
- M.2/M Key: Not working (booting failed with SSD 512GB installed)
Change-Id: I79696bdd837a221860b32f54629212c3346dca66
Signed-off-by: KunYi Chen <kunyi.chen(a)gmail.com>
---
A configs/config.lattepanda_mu
A src/mainboard/lattepanda/Kconfig
A src/mainboard/lattepanda/Kconfig.name
A src/mainboard/lattepanda/mu/Kconfig
A src/mainboard/lattepanda/mu/Kconfig.name
A src/mainboard/lattepanda/mu/Makefile.mk
A src/mainboard/lattepanda/mu/board_info.txt
A src/mainboard/lattepanda/mu/bootblock.c
A src/mainboard/lattepanda/mu/data.vbt
A src/mainboard/lattepanda/mu/devicetree.cb
A src/mainboard/lattepanda/mu/dsdt.asl
A src/mainboard/lattepanda/mu/gpio.c
A src/mainboard/lattepanda/mu/include/baseboard/gpio.h
A src/mainboard/lattepanda/mu/include/baseboard/variants.h
A src/mainboard/lattepanda/mu/mainboard.c
A src/mainboard/lattepanda/mu/memory.c
A src/mainboard/lattepanda/mu/ramstage.c
A src/mainboard/lattepanda/mu/romstage_fsp_params.c
A src/mainboard/lattepanda/mu/spd/Makefile.mk
A src/mainboard/lattepanda/mu/spd/mu_lp5_16gb.spd.hex
A src/mainboard/lattepanda/mu/spd/mu_lp5_8gb.spd.hex
21 files changed, 712 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/83719/14
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Subrata Banik has posted comments on this change by Saurabh Mishra. ( https://review.coreboot.org/c/coreboot/+/83798?usp=email )
Change subject: soc/intel/ptl: Do initial Panther Lake SoC commit till ramstage
......................................................................
Patch Set 59:
(1 comment)
File src/soc/intel/pantherlake/acpi.c:
https://review.coreboot.org/c/coreboot/+/83798/comment/4c568268_d587cf9f?us… :
PS59, Line 125: map
> Hi Subrata, will it also be requiring to make changes in other SOC platforms which are using generate_c_state_entries? Such as MTL, ADL, etc?
for now, you return NULL from here. I will take care of common code and other SOC.
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