coreboot-gerrit May 2024

coreboot-gerrit@coreboot.org

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[M] Change in coreboot[main]: Wifi: Support 320Mhz Bandwidth Enablement per MCC
by Poornima Tom (Code Review) 24 May '24

24 May '24

Attention is currently required from: Bob Moragues, Bora Guvendik, Cliff Huang, Hannah Williams, Ravishankar Sarawadi. Poornima Tom has posted comments on this change by Poornima Tom. ( https://review.coreboot.org/c/coreboot/+/81790?usp=email ) Change subject: Wifi: Support 320Mhz Bandwidth Enablement per MCC ...................................................................... Patch Set 2: (1 comment) File src/include/sar.h: https://review.coreboot.org/c/coreboot/+/81790/comment/d1e538c2_675892b0?us… : PS2, Line 58: enablement_11ax; > need to add enablement_11be ? This CL is with respect to 320MHZ wifi bandwidth. So, is this relevant in this CL. enablement_11be is related to DSM functionality 12 right? -- To view, visit https://review.coreboot.org/c/coreboot/+/81790?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie76794825f1a0104d199c078aa4ffc714aa95b17 Gerrit-Change-Number: 81790 Gerrit-PatchSet: 2 Gerrit-Owner: Poornima Tom <poornima.tom(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Bob Moragues <moragues(a)google.com> Gerrit-CC: Dinesh Sharma <dinesh.sharma(a)intel.corp-partner.google.com> Gerrit-CC: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Attention: Bob Moragues <moragues(a)google.com> Gerrit-Comment-Date: Fri, 24 May 2024 23:12:07 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Bob Moragues <moragues(a)google.com>

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[M] Change in coreboot[main]: sio/nuvoton: Implement a common ramstage ACPI LDN helper
by Keith Hui (Code Review) 24 May '24

24 May '24

Attention is currently required from: Nico Huber, Paul Menzel. Hello Nico Huber, Paul Menzel, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/82632?usp=email to look at the new patch set (#5). Change subject: sio/nuvoton: Implement a common ramstage ACPI LDN helper ...................................................................... sio/nuvoton: Implement a common ramstage ACPI LDN helper With few exceptions, Nuvoton super I/O chips have the same configuration registers. This patch provides a helper function for configuring the ACPI logical device on Nuvoton SIOs, covering system power state after power loss and switching PS/2 port roles between keyboard and mouse, both controllable using nvram options. This patch covers nct5572d, nct6776, nct6779d, nct6791d. Change all to use this common code, and add HAVE_POWER_STATE_AFTER_FAILURE Kconfig to all that don't have it already. It extends these features to Nuvoton SIOs that currently lack them, with additional improvements: 1. Enable waking up the system from PS/2 keyboard and/or mouse. 2. Establish an "off" state for "user-defined" power state after failure. This mode is not used by coreboot. The nvram options have to be added individually to mainboards. TEST=Both features boot tested on asus/p8z77-m which uses sio/nuvoton/nct6779d. Change-Id: Ibaddcaa2d77c5b06ddfbb6dbaac00df5e72dd4bd Signed-off-by: Keith Hui <buurin(a)gmail.com> --- M src/superio/nuvoton/Makefile.mk A src/superio/nuvoton/common/common.c A src/superio/nuvoton/common/common.h M src/superio/nuvoton/nct5572d/superio.c M src/superio/nuvoton/nct6776/Kconfig M src/superio/nuvoton/nct6776/superio.c M src/superio/nuvoton/nct6779d/Kconfig M src/superio/nuvoton/nct6779d/superio.c M src/superio/nuvoton/nct6791d/Kconfig M src/superio/nuvoton/nct6791d/superio.c 10 files changed, 116 insertions(+), 14 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/82632/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/82632?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ibaddcaa2d77c5b06ddfbb6dbaac00df5e72dd4bd Gerrit-Change-Number: 82632 Gerrit-PatchSet: 5 Gerrit-Owner: Keith Hui <buurin(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org>

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[M] Change in coreboot[main]: sio/nuvoton: Implement a common ramstage ACPI LDN helper
by Keith Hui (Code Review) 24 May '24

24 May '24

Attention is currently required from: Nico Huber, Paul Menzel. Hello Nico Huber, Paul Menzel, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/82632?usp=email to look at the new patch set (#4). Change subject: sio/nuvoton: Implement a common ramstage ACPI LDN helper ...................................................................... sio/nuvoton: Implement a common ramstage ACPI LDN helper With few exceptions, Nuvoton super I/O chips have the same configuration registers. This patch provides a helper function for configuring the ACPI logical device on Nuvoton SIOs, covering system power state after power loss and switching PS/2 port roles between keyboard and mouse, both controllable using nvram options. This patch covers nct5572d, nct6776, nct6779d, nct6791d. Change all to use this common code, and add HAVE_POWER_STATE_AFTER_FAILURE Kconfig to all that don't have it already. It extends these features to Nuvoton SIOs that currently lack them, with additional improvements: 1. Enable waking up the system from PS/2 keyboard and/or mouse. 2. Establish an "off" state for "user-defined" power state after failure. This mode is not used by coreboot. The nvram options have to be added individually to mainboards. TEST=Both features boot tested on asus/p8z77-m which uses sio/nuvoton/nct6779d. Change-Id: Ibaddcaa2d77c5b06ddfbb6dbaac00df5e72dd4bd Signed-off-by: Keith Hui <buurin(a)gmail.com> --- M src/superio/nuvoton/Makefile.mk A src/superio/nuvoton/common/common.c A src/superio/nuvoton/common/common.h M src/superio/nuvoton/nct5572d/superio.c M src/superio/nuvoton/nct6776/Kconfig M src/superio/nuvoton/nct6776/superio.c M src/superio/nuvoton/nct6779d/Kconfig M src/superio/nuvoton/nct6779d/superio.c M src/superio/nuvoton/nct6791d/Kconfig M src/superio/nuvoton/nct6791d/superio.c 10 files changed, 116 insertions(+), 14 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/82632/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/82632?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ibaddcaa2d77c5b06ddfbb6dbaac00df5e72dd4bd Gerrit-Change-Number: 82632 Gerrit-PatchSet: 4 Gerrit-Owner: Keith Hui <buurin(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org>

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[M] Change in coreboot[main]: sio/nuvoton: Implement a common ramstage ACPI LDN helper
by Keith Hui (Code Review) 24 May '24

24 May '24

Attention is currently required from: Nico Huber, Paul Menzel. Keith Hui has posted comments on this change by Keith Hui. ( https://review.coreboot.org/c/coreboot/+/82632?usp=email ) Change subject: sio/nuvoton: Implement a common ramstage ACPI LDN helper ...................................................................... Patch Set 3: (2 comments) File src/superio/nuvoton/common/common.c: https://review.coreboot.org/c/coreboot/+/82632/comment/d6792c30_f3b79f31?us… : PS1, Line 42: /* Set power state after power fail */ : /* Important: Make sure the definitions in mainboard/Kconfig around : * MAINBOARD_POWER_FAILURE_STATE and your board's cmos.layout match. : * And if MAINBOARD_POWER_FAILURE_STATE deviates from the chip's : * expectation (ie. 0=off, 1=on, 2=keep), this code must be adapted. : */ > Please use one of the recommended multi-line commenting styles. I’d use: […] Done https://review.coreboot.org/c/coreboot/+/82632/comment/5f5a1d27_e23ca321?us… : PS1, Line 55: } else : byte = 0; > if one branch has to use {} all branches need to. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/82632?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ibaddcaa2d77c5b06ddfbb6dbaac00df5e72dd4bd Gerrit-Change-Number: 82632 Gerrit-PatchSet: 3 Gerrit-Owner: Keith Hui <buurin(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Fri, 24 May 2024 21:25:58 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org>

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[S] Change in coreboot[main]: superio/nuvoton/nct6779d: Add power_on_after_fail support
by Keith Hui (Code Review) 24 May '24

24 May '24

Keith Hui has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/81883?usp=email ) Change subject: superio/nuvoton/nct6779d: Add power_on_after_fail support ...................................................................... Abandoned Got a better foundation in CB:82632 -- To view, visit https://review.coreboot.org/c/coreboot/+/81883?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: abandon Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia08cf8daac971397e832996ed364d41e9e7b1c5d Gerrit-Change-Number: 81883 Gerrit-PatchSet: 1 Gerrit-Owner: Keith Hui <buurin(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[M] Change in coreboot[main]: sio/nuvoton: Implement a common ramstage ACPI LDN helper
by Keith Hui (Code Review) 24 May '24

24 May '24

Attention is currently required from: Keith Hui, Paul Menzel. Hello Paul Menzel, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/82632?usp=email to look at the new patch set (#3). Change subject: sio/nuvoton: Implement a common ramstage ACPI LDN helper ...................................................................... sio/nuvoton: Implement a common ramstage ACPI LDN helper With few exceptions, Nuvoton super I/O chips have the same configuration registers. This patch provides a helper function for configuring the ACPI logical device on Nuvoton SIOs, covering system power state after power loss and switching PS/2 port roles between keyboard and mouse, both controllable using nvram options. This patch covers nct5572d, nct6776, nct6779d, nct6791d. Change all to use this common code, and add HAVE_POWER_STATE_AFTER_FAILURE Kconfig to all that don't have it already. It extends these features to Nuvoton SIOs that currently lack them, with additional improvements: 1. Enable waking up the system from PS/2 keyboard and/or mouse. 2. Establish an "off" state for "user-defined" power state after failure. This mode is not used by coreboot. The nvram options have to be added individually to mainboards. TEST=Both features boot tested on asus/p8z77-m which uses sio/nuvoton/nct6779d. Change-Id: Ibaddcaa2d77c5b06ddfbb6dbaac00df5e72dd4bd Signed-off-by: Keith Hui <buurin(a)gmail.com> --- M src/superio/nuvoton/Makefile.mk A src/superio/nuvoton/common/common.c A src/superio/nuvoton/common/common.h M src/superio/nuvoton/nct5572d/superio.c M src/superio/nuvoton/nct6776/Kconfig M src/superio/nuvoton/nct6776/superio.c M src/superio/nuvoton/nct6779d/Kconfig M src/superio/nuvoton/nct6779d/superio.c M src/superio/nuvoton/nct6791d/Kconfig M src/superio/nuvoton/nct6791d/superio.c 10 files changed, 116 insertions(+), 14 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/82632/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/82632?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ibaddcaa2d77c5b06ddfbb6dbaac00df5e72dd4bd Gerrit-Change-Number: 82632 Gerrit-PatchSet: 3 Gerrit-Owner: Keith Hui <buurin(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Keith Hui <buurin(a)gmail.com>

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[S] Change in coreboot[main]: sio/nuvoton: Add Kconfig for shared PS/2 port
by Keith Hui (Code Review) 24 May '24

24 May '24

Attention is currently required from: Felix Held, Paul Menzel. Keith Hui has posted comments on this change by Keith Hui. ( https://review.coreboot.org/c/coreboot/+/82631?usp=email ) Change subject: sio/nuvoton: Add Kconfig for shared PS/2 port ...................................................................... Patch Set 1: (1 comment) File src/superio/nuvoton/common/Kconfig: https://review.coreboot.org/c/coreboot/+/82631/comment/ff294aef_20f42a33?us… : PS1, Line 19: Select this option if your mainboard has a single PS/2 port for both keyboard and : mouse. Add an nvram option to cmos.layout for PS/2 mouse support. > Maybe elaborate and use the commit message? Done -- To view, visit https://review.coreboot.org/c/coreboot/+/82631?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I156b15c6ba233cbe8b9ba4d2cfbca6836ad7483a Gerrit-Change-Number: 82631 Gerrit-PatchSet: 1 Gerrit-Owner: Keith Hui <buurin(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 24 May 2024 21:09:53 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org>

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[S] Change in coreboot[main]: sio/nuvoton: Add Kconfig for shared PS/2 port
by Keith Hui (Code Review) 24 May '24

24 May '24

Attention is currently required from: Felix Held, Paul Menzel. Hello Felix Held, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/82631?usp=email to look at the new patch set (#2). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: sio/nuvoton: Add Kconfig for shared PS/2 port ...................................................................... sio/nuvoton: Add Kconfig for shared PS/2 port Introduce HAVE_SHARED_PS2_PORT Kconfig for this Super I/O to have mainboards indicate if they have one shared PS/2 port on the rear panel. On these boards (where a Y-cable cannot allow both keyboard and mouse to work off the same port), if a PS/2 keyboard is not present, SIO should be configured to swap its role to mouse, to allow the OS to find and initialize any mouse connected. Supporting code will come in a separate patch. Idea is to condition them on this Kconfig. Change-Id: I156b15c6ba233cbe8b9ba4d2cfbca6836ad7483a Signed-off-by: Keith Hui <buurin(a)gmail.com> --- M src/superio/nuvoton/common/Kconfig 1 file changed, 10 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/82631/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/82631?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I156b15c6ba233cbe8b9ba4d2cfbca6836ad7483a Gerrit-Change-Number: 82631 Gerrit-PatchSet: 2 Gerrit-Owner: Keith Hui <buurin(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de>

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[M] Change in coreboot[main]: sio/nuvoton: Implement a common ramstage ACPI LDN helper
by Keith Hui (Code Review) 24 May '24

24 May '24

Attention is currently required from: Keith Hui, Paul Menzel. Hello Paul Menzel, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/82632?usp=email to look at the new patch set (#2). The following approvals got outdated and were removed: Code-Review+1 by Paul Menzel Change subject: sio/nuvoton: Implement a common ramstage ACPI LDN helper ...................................................................... sio/nuvoton: Implement a common ramstage ACPI LDN helper With few exceptions, Nuvoton super I/O chips have the same configuration registers. This patch provides a helper function for configuring the ACPI logical device on Nuvoton SIOs, covering system power state after power loss and switching PS/2 port roles between keyboard and mouse, both controllable using nvram options. This patch covers nct5572d, nct6776, nct6779d, nct6791d. Change all to use this common code, and add HAVE_POWER_STATE_AFTER_FAILURE Kconfig to all that don't have it already. It extends these features to Nuvoton SIOs that currently lack them, with additional improvements: 1. Enable waking up the system from PS/2 keyboard and/or mouse. 2. Establish a known state for "user-defined" power state after power loss: off. This value is not used by coreboot. Inclusion of these helpers are controlled by existing Kconfigs: HAVE_SHARED_PS2_PORT for PS/2 port roles swap, to be set by mainboards. HAVE_POWER_STATE_AFTER_FAILURE for power state after failure. The nvram options have to be added individually to mainboards. TEST=Both features boot tested on asus/p8z77-m which uses sio/nuvoton/nct6779d. Change-Id: Ibaddcaa2d77c5b06ddfbb6dbaac00df5e72dd4bd Signed-off-by: Keith Hui <buurin(a)gmail.com> --- M src/superio/nuvoton/Makefile.mk A src/superio/nuvoton/common/common.c A src/superio/nuvoton/common/common.h M src/superio/nuvoton/nct5572d/superio.c M src/superio/nuvoton/nct6776/Kconfig M src/superio/nuvoton/nct6776/superio.c M src/superio/nuvoton/nct6779d/Kconfig M src/superio/nuvoton/nct6779d/superio.c M src/superio/nuvoton/nct6791d/Kconfig M src/superio/nuvoton/nct6791d/superio.c 10 files changed, 113 insertions(+), 14 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/82632/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/82632?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ibaddcaa2d77c5b06ddfbb6dbaac00df5e72dd4bd Gerrit-Change-Number: 82632 Gerrit-PatchSet: 2 Gerrit-Owner: Keith Hui <buurin(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Keith Hui <buurin(a)gmail.com>

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[S] Change in coreboot[main]: mb/asus/p8x7x-series: Enable keyboard/mouse swap option
by Keith Hui (Code Review) 24 May '24

24 May '24

Attention is currently required from: Keith Hui, Nico Huber. Hello Nico Huber, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/81885?usp=email to look at the new patch set (#3). Change subject: mb/asus/p8x7x-series: Enable keyboard/mouse swap option ...................................................................... mb/asus/p8x7x-series: Enable keyboard/mouse swap option Add HAVE_SHARED_PS2_PORT Kconfig and associated cmos.layout and cmos.default entries to p8z77-m[_pro], p8z77-v_lx2, p8h77-v, where their owners manual indicated a single shared PS/2 port, to enable switching said port between keyboard and mouse duties. At this time the switch has to be done manually via nvramtool. Made possible by commit xxxxxxxxxxxx ("sio/nuvoton: Implement a common ramstage ACPI LDN helper"). TEST=On p8z77-m, PS/2 mouse (Logitech M-S48) works with option turned on. PS/2 keyboard (IBM Model M #1391401 and Microsoft Natural gen 1) still works with option off. Change-Id: I21b73da99168e751b1a23485d4b1695963f9eef5 Signed-off-by: Keith Hui <buurin(a)gmail.com> --- M src/mainboard/asus/p8x7x-series/Kconfig M src/mainboard/asus/p8x7x-series/variants/p8h77-v/cmos.default M src/mainboard/asus/p8x7x-series/variants/p8h77-v/cmos.layout M src/mainboard/asus/p8x7x-series/variants/p8z77-m/cmos.default M src/mainboard/asus/p8x7x-series/variants/p8z77-m/cmos.layout M src/mainboard/asus/p8x7x-series/variants/p8z77-m_pro/cmos.default M src/mainboard/asus/p8x7x-series/variants/p8z77-m_pro/cmos.layout M src/mainboard/asus/p8x7x-series/variants/p8z77-v_lx2/cmos.default M src/mainboard/asus/p8x7x-series/variants/p8z77-v_lx2/cmos.layout 9 files changed, 15 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/85/81885/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/81885?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I21b73da99168e751b1a23485d4b1695963f9eef5 Gerrit-Change-Number: 81885 Gerrit-PatchSet: 3 Gerrit-Owner: Keith Hui <buurin(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Keith Hui <buurin(a)gmail.com>

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coreboot-gerrit May 2024