coreboot-gerrit April 2024

coreboot-gerrit@coreboot.org

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[M] Change in coreboot[main]: mb/google/rex: Add Intel Touch for controller 1 for Rex
by Cliff Huang (Code Review) 27 Apr '24

27 Apr '24

Attention is currently required from: Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Jingyuan Liang, Kapil Porwal, Kyoung Il Kim, Paul Menzel, Subrata Banik, Tarun. Hello Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Jingyuan Liang, Kapil Porwal, Kyoung Il Kim, Subrata Banik, Tarun, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/81333?usp=email to look at the new patch set (#4). The following approvals got outdated and were removed: Code-Review+1 by Kyoung Il Kim, Verified+1 by build bot (Jenkins) Change subject: mb/google/rex: Add Intel Touch for controller 1 for Rex ...................................................................... mb/google/rex: Add Intel Touch for controller 1 for Rex GPIO pad configuration for THC1 according to CBI fw_config. ACPI entries in SSDT for ELAN according to CBI fw_config. THC0 must be enabled when THC1 is enabled. Major rework is required for Rex P1 and P2. minor Rework is needed for EVT. Rex with THC rework won't be able to support UWB and FPCMU. The touch device must be converted to SPI interface. When THC is enabled and the THC rework is in place, the UWB and FPMCU are not supported and need to be disable from the CBI. THC0 will also be provided with ACPI entries when THC1 is enabled. THC1 GPIO pins will be configured for THC according to the CBI TOUCHSCREEN fw_config field. The resistor on the THC-SPI MISO pin should be 100 Ohm. BUG=b:307775082 TEST=set CBI TOUCHSREEN fw_config to TOUCHSCREEN_THC, FP fw_config to FP_ABSENT, and UWB fw_config to UWB_ABSENT. boot Rex to OS and run lspci to check THC device and check that THC device driver initialization successfully. /sys/class/hidraw/hidraw0/device/input/ should have several inputs enumerated. Signed-off-by: Cliff Huang <cliff.huang(a)intel.com> Change-Id: Id89b5b46d67b90491410d3d08c1a3ae9549b4da5 --- M src/mainboard/google/rex/Kconfig M src/mainboard/google/rex/variants/rex0/fw_config.c M src/mainboard/google/rex/variants/rex0/overridetree.cb 3 files changed, 163 insertions(+), 9 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/81333/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/81333?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Id89b5b46d67b90491410d3d08c1a3ae9549b4da5 Gerrit-Change-Number: 81333 Gerrit-PatchSet: 4 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Jingyuan Liang <jingyliang(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Kyoung Il Kim <kyoung.il.kim(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-CC: Henry Barnor <hbarnor(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Attention: Jingyuan Liang <jingyliang(a)google.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Kyoung Il Kim <kyoung.il.kim(a)intel.com> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-MessageType: newpatchset

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[XS] Change in coreboot[main]: src/drivers/intel/mipi_camera: Add CSI2 Data Stream Interface GUID
by Felix Singer (Code Review) 27 Apr '24

27 Apr '24

Attention is currently required from: CoolStar, Matt Delco, Paul Menzel, Sugnan Prabhu S. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/82068?usp=email ) The change is no longer submittable: All-Comments-Resolved is unsatisfied now. Change subject: src/drivers/intel/mipi_camera: Add CSI2 Data Stream Interface GUID ...................................................................... Patch Set 1: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/82068/comment/31e428de_24d446d2 : PS1, Line 7: src/ We don't add src when we do changes there. Please remove. -- To view, visit https://review.coreboot.org/c/coreboot/+/82068?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Id6089f6bd841333882e28de9307fe5e48e368d02 Gerrit-Change-Number: 82068 Gerrit-PatchSet: 1 Gerrit-Owner: CoolStar <coolstarorganization(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Matt Delco <delco(a)chromium.org> Gerrit-Reviewer: Sugnan Prabhu S <sugnan.prabhu.s(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Matt Delco <delco(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Sugnan Prabhu S <sugnan.prabhu.s(a)intel.com> Gerrit-Attention: CoolStar <coolstarorganization(a)gmail.com> Gerrit-Comment-Date: Fri, 26 Apr 2024 22:04:56 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[main]: mb/framework: Push initial port of azalea (Framework 13 AMD 7040)
by Felix Singer (Code Review) 27 Apr '24

27 Apr '24

Felix Singer has submitted this change. ( https://review.coreboot.org/c/coreboot/+/81978?usp=email ) Change subject: mb/framework: Push initial port of azalea (Framework 13 AMD 7040) ...................................................................... mb/framework: Push initial port of azalea (Framework 13 AMD 7040) This is a minimal framework that allows the build to compile. Signed-off-by: Martin Roth <gaumless(a)gmail.com> Change-Id: Ief4b5c75471a2ef5bedaaee9b4737510c2826b6e Reviewed-on: https://review.coreboot.org/c/coreboot/+/81978 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> --- A src/mainboard/framework/Kconfig A src/mainboard/framework/Kconfig.name A src/mainboard/framework/azalea/Kconfig A src/mainboard/framework/azalea/Kconfig.name A src/mainboard/framework/azalea/Makefile.mk A src/mainboard/framework/azalea/board_info.txt A src/mainboard/framework/azalea/bootblock.c A src/mainboard/framework/azalea/coreboot.fmd A src/mainboard/framework/azalea/devicetree.cb A src/mainboard/framework/azalea/dsdt.asl A src/mainboard/framework/azalea/mainboard.c A src/mainboard/framework/azalea/port_descriptors.c A src/mainboard/framework/azalea/romstage.c A src/mainboard/framework/azalea/smihandler.c 14 files changed, 140 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Felix Singer: Looks good to me, approved diff --git a/src/mainboard/framework/Kconfig b/src/mainboard/framework/Kconfig new file mode 100644 index 0000000..980aa6d --- /dev/null +++ b/src/mainboard/framework/Kconfig @@ -0,0 +1,17 @@ +## SPDX-License-Identifier: GPL-2.0-or-later + +if VENDOR_FRAMEWORK + +choice + prompt "Mainboard model" + +source "src/mainboard/framework/*/Kconfig.name" + +endchoice + +source "src/mainboard/framework/*/Kconfig" + +config MAINBOARD_VENDOR + default "Framework" + +endif # VENDOR_FRAMEWORK diff --git a/src/mainboard/framework/Kconfig.name b/src/mainboard/framework/Kconfig.name new file mode 100644 index 0000000..e3bef34 --- /dev/null +++ b/src/mainboard/framework/Kconfig.name @@ -0,0 +1,4 @@ +## SPDX-License-Identifier: GPL-2.0-or-later + +config VENDOR_FRAMEWORK + bool "Framework" diff --git a/src/mainboard/framework/azalea/Kconfig b/src/mainboard/framework/azalea/Kconfig new file mode 100644 index 0000000..6badb07 --- /dev/null +++ b/src/mainboard/framework/azalea/Kconfig @@ -0,0 +1,18 @@ +# SPDX-License-Identifier: GPL-2.0-only + +config BOARD_FRAMEWORK_AZALEA + select BOARD_ROMSIZE_KB_32768 + select SOC_AMD_PHOENIX_FSP + +if BOARD_FRAMEWORK_AZALEA + +config MAINBOARD_DIR + default "framework/azalea" + +config MAINBOARD_PART_NUMBER + default "Azalea" + +config FMDFILE + default "src/mainboard/\$(CONFIG_MAINBOARD_DIR)/coreboot.fmd" + +endif diff --git a/src/mainboard/framework/azalea/Kconfig.name b/src/mainboard/framework/azalea/Kconfig.name new file mode 100644 index 0000000..35ff54d --- /dev/null +++ b/src/mainboard/framework/azalea/Kconfig.name @@ -0,0 +1,4 @@ +# SPDX-License-Identifier: GPL-2.0-only + +config BOARD_FRAMEWORK_AZALEA + bool "Azalea (Framework 13 AMD 7040)" diff --git a/src/mainboard/framework/azalea/Makefile.mk b/src/mainboard/framework/azalea/Makefile.mk new file mode 100644 index 0000000..248f9df --- /dev/null +++ b/src/mainboard/framework/azalea/Makefile.mk @@ -0,0 +1,8 @@ +# SPDX-License-Identifier: GPL-2.0-only + +bootblock-y += bootblock.c + +romstage-y += port_descriptors.c + +ramstage-y += mainboard.c +ramstage-y += port_descriptors.c diff --git a/src/mainboard/framework/azalea/board_info.txt b/src/mainboard/framework/azalea/board_info.txt new file mode 100644 index 0000000..7915911 --- /dev/null +++ b/src/mainboard/framework/azalea/board_info.txt @@ -0,0 +1,6 @@ +Vendor name: Framework +Board name: Azalea (13" AMD Ryzen 7040) +Category: laptop +ROM protocol: SPI +ROM socketed: n +Flashrom support: n diff --git a/src/mainboard/framework/azalea/bootblock.c b/src/mainboard/framework/azalea/bootblock.c new file mode 100644 index 0000000..ccd8ec1 --- /dev/null +++ b/src/mainboard/framework/azalea/bootblock.c @@ -0,0 +1,7 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <bootblock_common.h> + +void bootblock_mainboard_early_init(void) +{ +} diff --git a/src/mainboard/framework/azalea/coreboot.fmd b/src/mainboard/framework/azalea/coreboot.fmd new file mode 100644 index 0000000..8f47443 --- /dev/null +++ b/src/mainboard/framework/azalea/coreboot.fmd @@ -0,0 +1,12 @@ +FLASH@0xFF000000 32M { + BIOS_PAGE_1 16M { + FMAP 4K + COREBOOT(CBFS) + SMMSTORE(PRESERVE) 64K + RW_MRC_CACHE 256K + RECOVERY_MRC_CACHE(PRESERVE) 256K + } + BIOS_PAGE_2 16M { + UNUSED + } +} diff --git a/src/mainboard/framework/azalea/devicetree.cb b/src/mainboard/framework/azalea/devicetree.cb new file mode 100644 index 0000000..3c39d04 --- /dev/null +++ b/src/mainboard/framework/azalea/devicetree.cb @@ -0,0 +1,8 @@ +# SPDX-License-Identifier: GPL-2.0-only + +chip soc/amd/phoenix + + device domain 0 on + end # domain + +end # chip soc/amd/phoenix diff --git a/src/mainboard/framework/azalea/dsdt.asl b/src/mainboard/framework/azalea/dsdt.asl new file mode 100644 index 0000000..e6cfd62 --- /dev/null +++ b/src/mainboard/framework/azalea/dsdt.asl @@ -0,0 +1,15 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <acpi/acpi.h> + +DefinitionBlock ( + "dsdt.aml", + "DSDT", + ACPI_DSDT_REV_2, + OEM_ID, + ACPI_TABLE_CREATOR, + 0x00010001 /* OEM Revision */ +) +{ + #include <acpi/dsdt_top.asl> +} diff --git a/src/mainboard/framework/azalea/mainboard.c b/src/mainboard/framework/azalea/mainboard.c new file mode 100644 index 0000000..77df1af --- /dev/null +++ b/src/mainboard/framework/azalea/mainboard.c @@ -0,0 +1,30 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <amdblocks/amd_pci_util.h> +#include <device/device.h> + +/* + * This controls the device -> IRQ routing. + * + */ +static const struct fch_irq_routing fch_irq_map[] = { +}; + +const struct fch_irq_routing *mb_get_fch_irq_mapping(size_t *length) +{ + *length = ARRAY_SIZE(fch_irq_map); + return fch_irq_map; +} + +static void mainboard_init(void *chip_info) +{ +} + +static void mainboard_enable(struct device *dev) +{ +} + +struct chip_operations mainboard_ops = { + .init = mainboard_init, + .enable_dev = mainboard_enable, +}; diff --git a/src/mainboard/framework/azalea/port_descriptors.c b/src/mainboard/framework/azalea/port_descriptors.c new file mode 100644 index 0000000..fe92ee3 --- /dev/null +++ b/src/mainboard/framework/azalea/port_descriptors.c @@ -0,0 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <soc/platform_descriptors.h> + +void mainboard_get_dxio_ddi_descriptors( + const fsp_dxio_descriptor **dxio_descs, size_t *dxio_num, + const fsp_ddi_descriptor **ddi_descs, size_t *ddi_num) +{ +} diff --git a/src/mainboard/framework/azalea/romstage.c b/src/mainboard/framework/azalea/romstage.c new file mode 100644 index 0000000..73fa78e --- /dev/null +++ b/src/mainboard/framework/azalea/romstage.c @@ -0,0 +1 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ diff --git a/src/mainboard/framework/azalea/smihandler.c b/src/mainboard/framework/azalea/smihandler.c new file mode 100644 index 0000000..73fa78e --- /dev/null +++ b/src/mainboard/framework/azalea/smihandler.c @@ -0,0 +1 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ -- To view, visit https://review.coreboot.org/c/coreboot/+/81978?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ief4b5c75471a2ef5bedaaee9b4737510c2826b6e Gerrit-Change-Number: 81978 Gerrit-PatchSet: 7 Gerrit-Owner: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Daniel Schaefer <dhs(a)frame.work> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Kieran Levin <ktl(a)frame.work> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jean Lucas Gerrit-CC: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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[M] Change in coreboot[main]: mb/framework: Push initial port of azalea (Framework 13 AMD 7040)
by Felix Singer (Code Review) 27 Apr '24

27 Apr '24

Attention is currently required from: Daniel Schaefer, Jean Lucas, Kieran Levin, Martin L Roth, Nicholas Chin, Paul Menzel. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81978?usp=email ) Change subject: mb/framework: Push initial port of azalea (Framework 13 AMD 7040) ...................................................................... Patch Set 6: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/81978?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ief4b5c75471a2ef5bedaaee9b4737510c2826b6e Gerrit-Change-Number: 81978 Gerrit-PatchSet: 6 Gerrit-Owner: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Daniel Schaefer <dhs(a)frame.work> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Kieran Levin <ktl(a)frame.work> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jean Lucas Gerrit-CC: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jean Lucas Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: Daniel Schaefer <dhs(a)frame.work> Gerrit-Attention: Kieran Levin <ktl(a)frame.work> Gerrit-Comment-Date: Fri, 26 Apr 2024 22:01:01 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[L] Change in coreboot[main]: drivers/intel/touch: Add driver for Intel Touch Controller and Devices
by Cliff Huang (Code Review) 26 Apr '24

26 Apr '24

Attention is currently required from: Eran Mitrani, Eric Lai, Jingyuan Liang, Kyoung Il Kim, Paul Menzel. Cliff Huang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81331?usp=email ) Change subject: drivers/intel/touch: Add driver for Intel Touch Controller and Devices ...................................................................... Patch Set 4: (18 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/81331/comment/4a93609b_8c73e5e2 : PS4, Line 9: controller(THC) > Please add space before the (. Done https://review.coreboot.org/c/coreboot/+/81331/comment/b4a6f160_18643962 : PS4, Line 14: Meteorlake > Meteor Lake Done File src/drivers/intel/touch/chip.h: https://review.coreboot.org/c/coreboot/+/81331/comment/28c1ad27_fb836536 : PS4, Line 11: MAX_TOUCH_PORTS > MAX_TOUCH_PORTS_PER_CONTROLLER? The more precise comment should be: maximum number of ports that can be assigned to a THC controller Actually, I am removing this define since it is not used. https://review.coreboot.org/c/coreboot/+/81331/comment/7a9ebf19_785bbbd4 : PS4, Line 23: Meteorlake > Meteor Lake Done https://review.coreboot.org/c/coreboot/+/81331/comment/793dbae7_011e3297 : PS4, Line 30: /* Touch Host Controller's (THC) 3 protocol modes: : * Switch among IPTS, HID-SPI and HID-I2C. : * 0x0: THC IPTS (not supported at this time) : * 0x1: THC HID SPI : * 0x2: THC HID I2C (for future support) : */ > Blank line at the top. […] Done https://review.coreboot.org/c/coreboot/+/81331/comment/37219483_4e5edca7 : PS4, Line 45: unsigned int enable_delay_ms; > Is there a better name? `delay_after_enabling_device_ms`? I'd keep the same naming convention as the GPIO pad and delay naming in rtd3 chip.h:) https://review.coreboot.org/c/coreboot/+/81331/comment/78852d3d_9d61337d : PS4, Line 57: rpt > I’d use report. change rpt_ to report_ globally to this driver. https://review.coreboot.org/c/coreboot/+/81331/comment/a8e29e7b_6ffe759d : PS4, Line 63: /* Touch Host Controller Wake On Touch : Based on this setting vGPIO for given THC will be in native mode, and additional : _CRS for wake will be exposed in ACPI : */ > Please use the recommended commenting styles. Done https://review.coreboot.org/c/coreboot/+/81331/comment/4d7dc163_762744e1 : PS4, Line 70: Spi > SPI Those comments are copied from FPS headers. I can make changes globally in this driver. https://review.coreboot.org/c/coreboot/+/81331/comment/1a95d577_a7d21484 : PS4, Line 71: this > This Done https://review.coreboot.org/c/coreboot/+/81331/comment/97e38b24_377cb605 : PS4, Line 90: /* Touch Host Controller Hid Over Spi Connection Speed : Hid Over Spi Connection Speed - SPI Frequency : */ > Ditto. (Also below. […] Done File src/drivers/intel/touch/elan.h: https://review.coreboot.org/c/coreboot/+/81331/comment/d5c01195_ec3caab4 : PS4, Line 16: // #define ELAN_CONNECTION_SPEED 17000000 > Why commented out? changed to comment. File src/drivers/intel/touch/touch.c: https://review.coreboot.org/c/coreboot/+/81331/comment/9a6d1b56_f88a169c : PS4, Line 30: in rpt hdr addr > Spell it out? Done https://review.coreboot.org/c/coreboot/+/81331/comment/37da391a_209a116f : PS4, Line 65: "Use TH_SENSOR_GENERIC for parameters from the devicetree!\n"); > Indent more? Done https://review.coreboot.org/c/coreboot/+/81331/comment/6a3db611_e9115db3 : PS4, Line 106: printk(BIOS_INFO, "use WACOM Write Opcode\n"); > Why only the info message for the first case? What should the user do with this information? also removed the other debug prints for WACOM. https://review.coreboot.org/c/coreboot/+/81331/comment/abd0499e_001b7993 : PS4, Line 526: static void : touch_generate_acpi_method_on( > Why not one line? Done https://review.coreboot.org/c/coreboot/+/81331/comment/23f983ee_6315c612 : PS4, Line 719: .read_resources = pci_dev_read_resources, : .set_resources = pci_dev_set_resources, : .enable_resources = pci_dev_enable_resources, : .init = pci_dev_init, : .scan_bus = &scan_generic_bus, /* Non-default */ : .ops_pci = &pci_dev_ops_pci, > Use tabs for aligning = like below? Done https://review.coreboot.org/c/coreboot/+/81331/comment/e84f8d17_ac91357a : PS4, Line 743: > Tab? Done -- To view, visit https://review.coreboot.org/c/coreboot/+/81331?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I52dfcd187c92141cb8fc47f4143b90d243439d4e Gerrit-Change-Number: 81331 Gerrit-PatchSet: 4 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jingyuan Liang <jingyliang(a)google.com> Gerrit-Reviewer: Kyoung Il Kim <kyoung.il.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-CC: Henry Barnor <hbarnor(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Jingyuan Liang <jingyliang(a)google.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Kyoung Il Kim <kyoung.il.kim(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Fri, 26 Apr 2024 21:48:27 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: mb/google/brox: Add 20K pulldown to GPP_D14
by Shelley Chen (Code Review) 26 Apr '24

26 Apr '24

Shelley Chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/82096?usp=email ) Change subject: mb/google/brox: Add 20K pulldown to GPP_D14 ...................................................................... mb/google/brox: Add 20K pulldown to GPP_D14 GPP_D14 is floating when ISH is not being used and wasting power. Add pulldown to prevent this from happening. BUG=b:336654954 BRANCH=None TEST=emerge-brox coreboot chromeos-bootimage make sure OS boots up HW validates that power usage is lower Change-Id: I4e19e98fa31022ece66a47402a2a4461b430ef70 Signed-off-by: Shelley Chen <shchen(a)google.com> --- M src/mainboard/google/brox/variants/baseboard/brox/gpio.c M src/mainboard/google/brox/variants/brox/fw_config.c 2 files changed, 3 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/82096/1 diff --git a/src/mainboard/google/brox/variants/baseboard/brox/gpio.c b/src/mainboard/google/brox/variants/baseboard/brox/gpio.c index 3d87bf25..4f44c08 100644 --- a/src/mainboard/google/brox/variants/baseboard/brox/gpio.c +++ b/src/mainboard/google/brox/variants/baseboard/brox/gpio.c @@ -168,7 +168,7 @@ /* GPP_D13 : [NF1: ISH_UART0_RXD NF3: I2C6_SDA NF6: USB_C_GPP_D13] ==> UART0_ISH_RX_DBG_TX */ PAD_NC(GPP_D13, NONE), /* GPP_D14 : [NF1: ISH_UART0_TXD NF3: I2C6_SCL NF6: USB_C_GPP_D14] ==> UART0_ISH_TX_DBG_RX */ - PAD_NC(GPP_D14, NONE), + PAD_NC(GPP_D14, DN_20K), /* GPP_D15 : ISH_UART0_RTS_L/I2C7B_SDA ==> SOC_ISH_UART0_RTS_L (NC) */ PAD_NC(GPP_D15, NONE), /* GPP_D16 : ISH_UART0_CTS_L/I2C7B_SCL ==> SOC_GPP_D16 (NC) */ diff --git a/src/mainboard/google/brox/variants/brox/fw_config.c b/src/mainboard/google/brox/variants/brox/fw_config.c index 512d27e..3962991 100644 --- a/src/mainboard/google/brox/variants/brox/fw_config.c +++ b/src/mainboard/google/brox/variants/brox/fw_config.c @@ -24,8 +24,8 @@ /* GPP_D13 : [NF1: ISH_UART0_RXD ==> UART0_ISH_RX_DBG_TX */ PAD_CFG_NF(GPP_D13, NONE, DEEP, NF1), /* GPP_D14 : [NF1: ISH_UART0_TXD ==> UART0_ISH_TX_DBG_RX */ - PAD_CFG_NF(GPP_D14, NONE, DEEP, NF1), - /* GPP_E9 : [NF1: USB_OC0# NF2: ISH_GP4 NF6: USB_C_GPP_E9] ==> NOTE_BOOK_MODE */ + PAD_CFG_NF(GPP_D14, DN_20K, DEEP, NF1), + /* GPP_E9 : [NF1: USB_OC0# NF2: ISH_GP4 NF6: USB_C_GPP_E9] ==> NOTE_BOOK_MODE */ PAD_CFG_NF(GPP_E9, NONE, PLTRST, NF2), }; -- To view, visit https://review.coreboot.org/c/coreboot/+/82096?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I4e19e98fa31022ece66a47402a2a4461b430ef70 Gerrit-Change-Number: 82096 Gerrit-PatchSet: 1 Gerrit-Owner: Shelley Chen <shchen(a)google.com> Gerrit-MessageType: newchange

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[L] Change in coreboot[main]: drivers/intel/touch: Add driver for Intel Touch Controller and Devices
by Cliff Huang (Code Review) 26 Apr '24

26 Apr '24

Attention is currently required from: Cliff Huang, Eran Mitrani, Eric Lai, Jingyuan Liang, Kyoung Il Kim. Hello Eran Mitrani, Eric Lai, Jingyuan Liang, Kyoung Il Kim, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/81331?usp=email to look at the new patch set (#5). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: drivers/intel/touch: Add driver for Intel Touch Controller and Devices ...................................................................... drivers/intel/touch: Add driver for Intel Touch Controller and Devices This driver is for Intel Touch Host controller (THC). THC supports a host controller interface to the touch IC for high bandwidth touch data transfer from SPI based touch ICs. This driver supports WACOM, ELAN, and generic touch sensor devices. ref: Meteor Lake UH type4 EDS vol1 640228 This driver generates the following ACPI objects: - _DSM - _CRS - Power resource with _STA, _ON, and _OFF - _RST BUG=b:307775082 Signed-off-by: Cliff Huang <cliff.huang(a)intel.com> Change-Id: I52dfcd187c92141cb8fc47f4143b90d243439d4e --- A src/drivers/intel/touch/Kconfig A src/drivers/intel/touch/Makefile.mk A src/drivers/intel/touch/chip.h A src/drivers/intel/touch/elan.h A src/drivers/intel/touch/touch.c A src/drivers/intel/touch/wacom.h 6 files changed, 976 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/81331/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/81331?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I52dfcd187c92141cb8fc47f4143b90d243439d4e Gerrit-Change-Number: 81331 Gerrit-PatchSet: 5 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jingyuan Liang <jingyliang(a)google.com> Gerrit-Reviewer: Kyoung Il Kim <kyoung.il.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-CC: Henry Barnor <hbarnor(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Jingyuan Liang <jingyliang(a)google.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Kyoung Il Kim <kyoung.il.kim(a)intel.com> Gerrit-MessageType: newpatchset

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[XS] Change in coreboot[main]: soc/amd/genoa_poc/chip.h: remove empty newline before '}'
by Felix Held (Code Review) 26 Apr '24

26 Apr '24

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/82091?usp=email ) Change subject: soc/amd/genoa_poc/chip.h: remove empty newline before '}' ...................................................................... soc/amd/genoa_poc/chip.h: remove empty newline before '}' Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: I7f18f2d754f24bfcc9cbf95a98fa6fe40aaf3b02 Reviewed-on: https://review.coreboot.org/c/coreboot/+/82091 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Varshit Pandya <pandyavarshit(a)gmail.com> --- M src/soc/amd/genoa_poc/chip.h 1 file changed, 0 insertions(+), 1 deletion(-) Approvals: Varshit Pandya: Looks good to me, approved build bot (Jenkins): Verified diff --git a/src/soc/amd/genoa_poc/chip.h b/src/soc/amd/genoa_poc/chip.h index 39a5743..42a781b 100644 --- a/src/soc/amd/genoa_poc/chip.h +++ b/src/soc/amd/genoa_poc/chip.h @@ -57,7 +57,6 @@ struct usb31_phy_settings usb31_phy[8]; bool s1_usb31_phy_enable; struct usb31_phy_settings s1_usb31_phy[8]; - }; struct soc_amd_genoa_poc_config { -- To view, visit https://review.coreboot.org/c/coreboot/+/82091?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7f18f2d754f24bfcc9cbf95a98fa6fe40aaf3b02 Gerrit-Change-Number: 82091 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[main]: [TEST] mtlrvp: Configure I2C pads by default
by Anil Kumar K (Code Review) 26 Apr '24

26 Apr '24

Anil Kumar K has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/82095?usp=email ) Change subject: [TEST] mtlrvp: Configure I2C pads by default ...................................................................... [TEST] mtlrvp: Configure I2C pads by default Change-Id: Ie52a706f807f4e6345757ff90b0c8a945347b037 --- M src/mainboard/intel/mtlrvp/fw_config.c M src/mainboard/intel/mtlrvp/variants/baseboard/mtlrvp_p/gpio.c 2 files changed, 31 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/95/82095/1 diff --git a/src/mainboard/intel/mtlrvp/fw_config.c b/src/mainboard/intel/mtlrvp/fw_config.c index eac854c..4b612c4 100644 --- a/src/mainboard/intel/mtlrvp/fw_config.c +++ b/src/mainboard/intel/mtlrvp/fw_config.c @@ -76,6 +76,7 @@ static void fw_config_handle(void *unused) { printk(BIOS_INFO, "FW config 0x%" PRIx64 "\n", fw_config_get()); + return; if (fw_config_probe(FW_CONFIG(AUDIO, NONE))) { printk(BIOS_INFO, "Configure GPIOs for no audio.\n"); gpio_configure_pads(audio_disable_pads, ARRAY_SIZE(audio_disable_pads)); diff --git a/src/mainboard/intel/mtlrvp/variants/baseboard/mtlrvp_p/gpio.c b/src/mainboard/intel/mtlrvp/variants/baseboard/mtlrvp_p/gpio.c index 2c48a0e..1f5486c 100644 --- a/src/mainboard/intel/mtlrvp/variants/baseboard/mtlrvp_p/gpio.c +++ b/src/mainboard/intel/mtlrvp/variants/baseboard/mtlrvp_p/gpio.c @@ -315,6 +315,21 @@ PAD_CFG_GPO(GPP_V22, 1, DEEP), /* Camera: GPP_V23: CRD1_CAM1_RST_N */ PAD_CFG_GPO(GPP_V23, 1, DEEP), + + /* Audio: I2S */ + PAD_CFG_NF(GPP_D09, NONE, DEEP, NF2), /* I2S_MCLK1_OUT */ + PAD_CFG_NF(GPP_D10, NONE, DEEP, NF2), /* I2S0_SCLK_HDR */ + PAD_CFG_NF(GPP_D11, NONE, DEEP, NF2), /* I2S0_SFRM_HDR */ + PAD_CFG_NF(GPP_D12, NONE, DEEP, NF2), /* I2S0_TXD_HDR */ + PAD_CFG_NF(GPP_D13, NONE, DEEP, NF2), /* I2S0_RXD_HDR */ + + PAD_CFG_NF(GPP_S00, NONE, DEEP, NF6), /* I2S1_SCLK_HDR */ + PAD_CFG_NF(GPP_S01, NONE, DEEP, NF6), /* I2S1_SFRM_HDR */ + PAD_CFG_NF(GPP_S02, NONE, DEEP, NF6), /* I2S1_TXD_HDR */ + PAD_CFG_NF(GPP_S03, NONE, DEEP, NF6), /* I2S1_RXD_HDR */ + PAD_CFG_NF(GPP_S06, NONE, DEEP, NF3), /* DMIC_CLK_A1 */ + PAD_CFG_NF(GPP_S07, NONE, DEEP, NF3), /* DMIC_DATA1 */ + }; /* Early pad configuration in bootblock */ @@ -332,6 +347,21 @@ /* SSD */ PAD_CFG_GPO(GPP_B15, 0, DEEP), /* M.2_CPU_SSD3_PWREN */ PAD_CFG_GPO(GPP_D06, 0, DEEP), /* M.2_CPU_SSD4_PWREN */ + + /* Audio: I2S */ + PAD_CFG_NF(GPP_D09, NONE, DEEP, NF2), /* I2S_MCLK1_OUT */ + PAD_CFG_NF(GPP_D10, NONE, DEEP, NF2), /* I2S0_SCLK_HDR */ + PAD_CFG_NF(GPP_D11, NONE, DEEP, NF2), /* I2S0_SFRM_HDR */ + PAD_CFG_NF(GPP_D12, NONE, DEEP, NF2), /* I2S0_TXD_HDR */ + PAD_CFG_NF(GPP_D13, NONE, DEEP, NF2), /* I2S0_RXD_HDR */ + + PAD_CFG_NF(GPP_S00, NONE, DEEP, NF6), /* I2S1_SCLK_HDR */ + PAD_CFG_NF(GPP_S01, NONE, DEEP, NF6), /* I2S1_SFRM_HDR */ + PAD_CFG_NF(GPP_S02, NONE, DEEP, NF6), /* I2S1_TXD_HDR */ + PAD_CFG_NF(GPP_S03, NONE, DEEP, NF6), /* I2S1_RXD_HDR */ + PAD_CFG_NF(GPP_S06, NONE, DEEP, NF3), /* DMIC_CLK_A1 */ + PAD_CFG_NF(GPP_S07, NONE, DEEP, NF3), /* DMIC_DATA1 */ + }; static const struct pad_config early_uart_gpio_table[] = { -- To view, visit https://review.coreboot.org/c/coreboot/+/82095?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie52a706f807f4e6345757ff90b0c8a945347b037 Gerrit-Change-Number: 82095 Gerrit-PatchSet: 1 Gerrit-Owner: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-CC: Anil Kumar K <anil.kumar.k(a)intel.corp-partner.google.com> Gerrit-MessageType: newchange

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[M] Change in coreboot[main]: mb/google/rex: Add Intel Touch for controller 1 for Rex
by Cliff Huang (Code Review) 26 Apr '24

26 Apr '24

Attention is currently required from: Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Jingyuan Liang, Kapil Porwal, Paul Menzel, Subrata Banik, Tarun. Cliff Huang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81333?usp=email ) Change subject: mb/google/rex: Add Intel Touch for controller 1 for Rex ...................................................................... Patch Set 2: (1 comment) File src/mainboard/google/rex/variants/rex0/overridetree.cb: https://review.coreboot.org/c/coreboot/+/81333/comment/de1a41b3_5f987b8a : PS2, Line 84: register "thc_configuration" = "THC_CONFIG_DOUBLE_CONTROLLER" > This reads not very nice. […] First, the name 'thc_configuration' is chosen instead of thc_config since 'config' has been used for chip.h instances in many places and we want to avoid the confusion. THC has two controllers and two ports/interfaces. However, not all combinations are supported. In addition, there is limitation such that 1st controller must be enabled if 2nd one needs to be used, regardless of whether 1st one is used or not. For that, we have the following usage cases: THC_CONFIG_NONE: Both controllers are not enabled and direct SPI or I2C interface can be used for touch devices. THC_CONFIG_SINGLE_PORT0: First controller is enabled with port 0. THC_CONFIG_SINGLE_PORT1: Currently, not available. First controller is enabled with port 1. THC_CONFIG_SINGLE_BOTH_PORTS: ( reserved for the future support) First controller is enabled with both port 0 and port 1. THC_CONFIG_DOUBLE_CONTROLLER: Both controllers are enabled. We only has two interface ports, therefore each one is with port 0 and port 1 respectively. It is not possible to have THC0 use port1 and THC1 use port 0. These above usage defines should help on how the enum value names come from. In Rex case, we only want to use 2nd THC with port 1. But, due to the configuration constraint, THC0 needs also be enabled. Therefore, THC_CONFIG_DOUBLE_CONTROLLER is used. -- To view, visit https://review.coreboot.org/c/coreboot/+/81333?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Id89b5b46d67b90491410d3d08c1a3ae9549b4da5 Gerrit-Change-Number: 81333 Gerrit-PatchSet: 2 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Jingyuan Liang <jingyliang(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Kyoung Il Kim <kyoung.il.kim(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com> Gerrit-CC: Henry Barnor <hbarnor(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Attention: Jingyuan Liang <jingyliang(a)google.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Comment-Date: Fri, 26 Apr 2024 17:23:51 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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