coreboot-gerrit April 2024

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[XS] Change in coreboot[main]: mb/google/rex: remove duplicate config for karis
by Felix Held (Code Review) 26 Apr '24

26 Apr '24

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/81226?usp=email ) ( 2 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: mb/google/rex: remove duplicate config for karis ...................................................................... mb/google/rex: remove duplicate config for karis Remove duplicate config entry CHROMEOS_WIFI_SAR as it is used at the baseboard. BUG=None TEST=emerge-rex coreboot Change-Id: Iabf0e490103c2097f3f033036839b77b5a0bb1b3 Signed-off-by: YH Lin <yueherngl(a)google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/81226 Reviewed-by: Subrata Banik <subratabanik(a)google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/google/rex/Kconfig 1 file changed, 0 insertions(+), 1 deletion(-) Approvals: Subrata Banik: Looks good to me, approved build bot (Jenkins): Verified diff --git a/src/mainboard/google/rex/Kconfig b/src/mainboard/google/rex/Kconfig index 880680a..5e019ee 100644 --- a/src/mainboard/google/rex/Kconfig +++ b/src/mainboard/google/rex/Kconfig @@ -71,7 +71,6 @@ config BOARD_GOOGLE_MODEL_KARIS def_bool n select BOARD_GOOGLE_BASEBOARD_REX - select CHROMEOS_WIFI_SAR if CHROMEOS config BOARD_GOOGLE_MODEL_OVIS def_bool n -- To view, visit https://review.coreboot.org/c/coreboot/+/81226?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iabf0e490103c2097f3f033036839b77b5a0bb1b3 Gerrit-Change-Number: 81226 Gerrit-PatchSet: 5 Gerrit-Owner: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[main]: arch/arm/armv7/exception.c: fix warnings of macros and functions
by Felix Held (Code Review) 26 Apr '24

26 Apr '24

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/82050?usp=email ) Change subject: arch/arm/armv7/exception.c: fix warnings of macros and functions ...................................................................... arch/arm/armv7/exception.c: fix warnings of macros and functions Use better alignment attribute macro and add missing identifier names for function definition arguments. Change-Id: I1c5c33fc9210f068ff88c8d981f1a1c739890c9c Signed-off-by: Integral <integral(a)member.fsf.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/82050 Reviewed-by: Julius Werner <jwerner(a)chromium.org> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/arch/arm/armv7/exception.c 1 file changed, 8 insertions(+), 8 deletions(-) Approvals: build bot (Jenkins): Verified Julius Werner: Looks good to me, approved diff --git a/src/arch/arm/armv7/exception.c b/src/arch/arm/armv7/exception.c index 799ae02..3f53d15 100644 --- a/src/arch/arm/armv7/exception.c +++ b/src/arch/arm/armv7/exception.c @@ -5,16 +5,16 @@ #include <arch/exception.h> #include <console/console.h> -uint8_t exception_stack[0x100] __attribute__((aligned(8))); +uint8_t exception_stack[0x100] __aligned(8); extern void *exception_stack_end; -void exception_undefined_instruction(uint32_t *); -void exception_software_interrupt(uint32_t *); -void exception_prefetch_abort(uint32_t *); -void exception_data_abort(uint32_t *); -void exception_not_used(uint32_t *); -void exception_irq(uint32_t *); -void exception_fiq(uint32_t *); +void exception_undefined_instruction(uint32_t *regs); +void exception_software_interrupt(uint32_t *regs); +void exception_prefetch_abort(uint32_t *regs); +void exception_data_abort(uint32_t *regs); +void exception_not_used(uint32_t *regs); +void exception_irq(uint32_t *regs); +void exception_fiq(uint32_t *regs); static void dump_stack(uintptr_t addr, size_t bytes) { -- To view, visit https://review.coreboot.org/c/coreboot/+/82050?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1c5c33fc9210f068ff88c8d981f1a1c739890c9c Gerrit-Change-Number: 82050 Gerrit-PatchSet: 5 Gerrit-Owner: Integral <integral(a)member.fsf.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[M] Change in coreboot[main]: soc/intel/xeon_sp: Move VPD based settings to mainboard codes
by Angel Pons (Code Review) 26 Apr '24

26 Apr '24

Attention is currently required from: Arthur Heymans, Chen, Gang C, Christian Walter, Jincheng Li, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, Shuo Liu, Tim Chu. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/82090?usp=email ) Change subject: soc/intel/xeon_sp: Move VPD based settings to mainboard codes ...................................................................... Patch Set 7: Code-Review+2 (1 comment) File src/soc/intel/xeon_sp/spr/romstage.c: https://review.coreboot.org/c/coreboot/+/82090/comment/66d7ea67_001edb3b : PS4, Line 100: cxl_mode = get_cxl_mode_from_vpd(); > Updated Acknowledged -- To view, visit https://review.coreboot.org/c/coreboot/+/82090?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iefea72eec6e52f8d1ae2d10e1edbabdebf4dff91 Gerrit-Change-Number: 82090 Gerrit-PatchSet: 7 Gerrit-Owner: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Fri, 26 Apr 2024 11:26:49 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Jincheng Li <jincheng.li(a)intel.com> Gerrit-MessageType: comment

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[M] Change in coreboot[main]: soc/intel/xeon_sp: Add get_cxl_mode
by Angel Pons (Code Review) 26 Apr '24

26 Apr '24

Attention is currently required from: Arthur Heymans, Christian Walter, Jincheng Li, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, Shuo Liu, Tim Chu. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/82092?usp=email ) Change subject: soc/intel/xeon_sp: Add get_cxl_mode ...................................................................... Patch Set 6: Code-Review+2 (1 comment) Patchset: PS3: > Updated Acknowledged -- To view, visit https://review.coreboot.org/c/coreboot/+/82092?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1e08e92ad769112d7e570ee12cf973451a3befc0 Gerrit-Change-Number: 82092 Gerrit-PatchSet: 6 Gerrit-Owner: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Fri, 26 Apr 2024 11:26:44 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Jincheng Li <jincheng.li(a)intel.com> Gerrit-MessageType: comment

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[M] Change in coreboot[main]: soc/intel/xeon_sp: Move VPD based settings to mainboard codes
by Jincheng Li (Code Review) 26 Apr '24

26 Apr '24

Attention is currently required from: Angel Pons, Arthur Heymans, Chen, Gang C, Christian Walter, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, Shuo Liu, Tim Chu. Jincheng Li has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/82090?usp=email ) Change subject: soc/intel/xeon_sp: Move VPD based settings to mainboard codes ...................................................................... Patch Set 6: (1 comment) File src/soc/intel/xeon_sp/spr/romstage.c: https://review.coreboot.org/c/coreboot/+/82090/comment/732c354d_894f7baf : PS4, Line 100: cxl_mode = get_cxl_mode_from_vpd(); > This bit belongs to CB:82092 Updated -- To view, visit https://review.coreboot.org/c/coreboot/+/82090?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iefea72eec6e52f8d1ae2d10e1edbabdebf4dff91 Gerrit-Change-Number: 82090 Gerrit-PatchSet: 6 Gerrit-Owner: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Fri, 26 Apr 2024 10:25:52 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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[M] Change in coreboot[main]: soc/intel/xeon_sp: Add get_cxl_mode
by Jincheng Li (Code Review) 26 Apr '24

26 Apr '24

Attention is currently required from: Angel Pons, Arthur Heymans, Christian Walter, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, Shuo Liu, Tim Chu. Jincheng Li has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/82092?usp=email ) Change subject: soc/intel/xeon_sp: Add get_cxl_mode ...................................................................... Patch Set 5: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/82092/comment/c0c9d9ea_2ad0db21 : PS4, Line 14: > `Possible unwrapped commit description (prefer a maximum 72 chars per line)` Please fix. Patchset: PS3: > There's a part from CB:82090 that should be in this commit: setting the FSP UPD in `src/soc/intel/xe […] Updated -- To view, visit https://review.coreboot.org/c/coreboot/+/82092?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1e08e92ad769112d7e570ee12cf973451a3befc0 Gerrit-Change-Number: 82092 Gerrit-PatchSet: 5 Gerrit-Owner: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Fri, 26 Apr 2024 10:25:11 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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[M] Change in coreboot[main]: soc/intel/xeon_sp: Move VPD based settings to mainboard codes
by Jincheng Li (Code Review) 26 Apr '24

26 Apr '24

Attention is currently required from: Arthur Heymans, Chen, Gang C, Christian Walter, Jincheng Li, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, Tim Chu. Jincheng Li has uploaded a new patch set (#6) to the change originally created by Shuo Liu. ( https://review.coreboot.org/c/coreboot/+/82090?usp=email ) Change subject: soc/intel/xeon_sp: Move VPD based settings to mainboard codes ...................................................................... soc/intel/xeon_sp: Move VPD based settings to mainboard codes Configuration variable implementation (VPD, et al) is regarded to be mainboard specific and should not be bounded to SoC codes. This patch moves the VPD based settings (FSP log level, et al) from SoC codes to mainboard codes. TEST=Build and boot on intel/archercity CRB with few log differences Change-Id: Iefea72eec6e52f8d1ae2d10e1edbabdebf4dff91 Signed-off-by: Shuo Liu <shuo.liu(a)intel.com> Signed-off-by: Jincheng Li <jincheng.li(a)intel.com> --- M src/mainboard/intel/archercity_crb/romstage.c M src/mainboard/inventec/transformers/romstage.c M src/soc/intel/xeon_sp/spr/romstage.c 3 files changed, 33 insertions(+), 85 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/82090/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/82090?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iefea72eec6e52f8d1ae2d10e1edbabdebf4dff91 Gerrit-Change-Number: 82090 Gerrit-PatchSet: 6 Gerrit-Owner: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[main]: soc/intel/xeon_sp: Add get_cxl_mode
by Jincheng Li (Code Review) 26 Apr '24

26 Apr '24

Attention is currently required from: Angel Pons, Arthur Heymans, Christian Walter, Jincheng Li, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, Tim Chu. Jincheng Li has uploaded a new patch set (#5) to the change originally created by Shuo Liu. ( https://review.coreboot.org/c/coreboot/+/82092?usp=email ) Change subject: soc/intel/xeon_sp: Add get_cxl_mode ...................................................................... soc/intel/xeon_sp: Add get_cxl_mode Configuration variable implementation (VPD, et al) is regarded to be mainboard specific and should not be bounded to SoC codes. Add get_cxl_mode so that SoC codes do not need to get this configuration from VPD any more. TEST=Build and boot on intel/archercity CRB with few log differences Change-Id: I1e08e92ad769112d7e570ee12cf973451a3befc0 Signed-off-by: Shuo Liu <shuo.liu(a)intel.com> Signed-off-by: Jincheng Li <jincheng.li(a)intel.com> --- M src/drivers/ocp/include/vpd.h M src/mainboard/intel/archercity_crb/Makefile.mk A src/mainboard/intel/archercity_crb/util.c M src/mainboard/inventec/transformers/Makefile.mk A src/mainboard/inventec/transformers/util.c M src/soc/intel/xeon_sp/include/soc/chip_common.h M src/soc/intel/xeon_sp/include/soc/util.h M src/soc/intel/xeon_sp/spr/romstage.c M src/soc/intel/xeon_sp/uncore.c M src/soc/intel/xeon_sp/util.c 10 files changed, 78 insertions(+), 19 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/82092/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/82092?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1e08e92ad769112d7e570ee12cf973451a3befc0 Gerrit-Change-Number: 82092 Gerrit-PatchSet: 5 Gerrit-Owner: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[main]: soc/intel/xeon_sp: Move VPD based settings to mainboard codes
by Jincheng Li (Code Review) 26 Apr '24

26 Apr '24

Attention is currently required from: Arthur Heymans, Chen, Gang C, Christian Walter, Jincheng Li, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, Tim Chu. Jincheng Li has uploaded a new patch set (#5) to the change originally created by Shuo Liu. ( https://review.coreboot.org/c/coreboot/+/82090?usp=email ) The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: soc/intel/xeon_sp: Move VPD based settings to mainboard codes ...................................................................... soc/intel/xeon_sp: Move VPD based settings to mainboard codes Configuration variable implementation (VPD, et al) is regarded to be mainboard specific and should not be bounded to SoC codes. This patch moves the VPD based settings (FSP log level, et al) from SoC codes to mainboard codes. TEST=Build and boot on intel/archercity CRB with no major log differences Change-Id: Iefea72eec6e52f8d1ae2d10e1edbabdebf4dff91 Signed-off-by: Shuo Liu <shuo.liu(a)intel.com> Signed-off-by: Jincheng Li <jincheng.li(a)intel.com> --- M src/mainboard/intel/archercity_crb/romstage.c M src/mainboard/inventec/transformers/romstage.c M src/soc/intel/xeon_sp/spr/romstage.c 3 files changed, 35 insertions(+), 85 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/82090/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/82090?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iefea72eec6e52f8d1ae2d10e1edbabdebf4dff91 Gerrit-Change-Number: 82090 Gerrit-PatchSet: 5 Gerrit-Owner: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[main]: soc/intel/xeon_sp: Add get_cxl_mode
by Jincheng Li (Code Review) 26 Apr '24

26 Apr '24

Attention is currently required from: Angel Pons, Arthur Heymans, Christian Walter, Jincheng Li, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, Shuo Liu, Tim Chu. Jincheng Li has uploaded a new patch set (#4) to the change originally created by Shuo Liu. ( https://review.coreboot.org/c/coreboot/+/82092?usp=email ) The following approvals got outdated and were removed: Code-Review+1 by Angel Pons, Verified+1 by build bot (Jenkins) Change subject: soc/intel/xeon_sp: Add get_cxl_mode ...................................................................... soc/intel/xeon_sp: Add get_cxl_mode Configuration variable implementation (VPD, et al) is regarded to be mainboard specific and should not be bounded to SoC codes. Add get_cxl_mode so that SoC codes do not need to get this configuration from VPD any more. TEST=Build and boot on intel/archercity CRB with no major log differences Change-Id: I1e08e92ad769112d7e570ee12cf973451a3befc0 Signed-off-by: Shuo Liu <shuo.liu(a)intel.com> Signed-off-by: Jincheng Li <jincheng.li(a)intel.com> --- M src/mainboard/intel/archercity_crb/Makefile.mk A src/mainboard/intel/archercity_crb/util.c M src/mainboard/inventec/transformers/Makefile.mk A src/mainboard/inventec/transformers/util.c M src/soc/intel/xeon_sp/include/soc/chip_common.h M src/soc/intel/xeon_sp/include/soc/util.h M src/soc/intel/xeon_sp/spr/romstage.c M src/soc/intel/xeon_sp/uncore.c M src/soc/intel/xeon_sp/util.c 9 files changed, 73 insertions(+), 18 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/82092/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/82092?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1e08e92ad769112d7e570ee12cf973451a3befc0 Gerrit-Change-Number: 82092 Gerrit-PatchSet: 4 Gerrit-Owner: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-MessageType: newpatchset

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