coreboot-gerrit April 2024

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[main]: mb/google/corsola/wugtrio: Add initialization of USB port0
by Yidi Lin (Code Review) 29 Apr '24

29 Apr '24

Attention is currently required from: Hung-Te Lin, Paul Menzel, Wentao Qin, Xuxin Xiong, Yang Wu, Yu-Ping Wu. Yidi Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/82089?usp=email ) Change subject: mb/google/corsola/wugtrio: Add initialization of USB port0 ...................................................................... Patch Set 9: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/82089?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I725b80593f5fc498a204bf47f943c36ccbd78134 Gerrit-Change-Number: 82089 Gerrit-PatchSet: 9 Gerrit-Owner: Wentao Qin <qinwentao(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Mingjin Ge <mingjin.ge(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Xuxin Xiong <xuxinxiong(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Yang Wu <wuyang5(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Xuxin Xiong <xuxinxiong(a)huaqin.corp-partner.google.com> Gerrit-Attention: Yang Wu <wuyang5(a)huaqin.corp-partner.google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Wentao Qin <qinwentao(a)huaqin.corp-partner.google.com> Gerrit-Comment-Date: Mon, 29 Apr 2024 07:47:20 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[main]: mb/google/corsola/wugtrio: Add initialization of USB port0
by Wentao Qin (Code Review) 29 Apr '24

29 Apr '24

Attention is currently required from: Hung-Te Lin, Paul Menzel, Xuxin Xiong, Yang Wu, Yidi Lin, Yu-Ping Wu. Wentao Qin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/82089?usp=email ) Change subject: mb/google/corsola/wugtrio: Add initialization of USB port0 ...................................................................... Patch Set 9: (1 comment) File src/soc/mediatek/common/usb_secondary.c: https://review.coreboot.org/c/coreboot/+/82089/comment/01c28657_4f543a66 : PS7, Line 8: /* We always consider USB2 port as the secondary UBS host regardless of the register naming */ > ``` […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/82089?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I725b80593f5fc498a204bf47f943c36ccbd78134 Gerrit-Change-Number: 82089 Gerrit-PatchSet: 9 Gerrit-Owner: Wentao Qin <qinwentao(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Mingjin Ge <mingjin.ge(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Xuxin Xiong <xuxinxiong(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Yang Wu <wuyang5(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Xuxin Xiong <xuxinxiong(a)huaqin.corp-partner.google.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Yang Wu <wuyang5(a)huaqin.corp-partner.google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Mon, 29 Apr 2024 07:44:50 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Yidi Lin <yidilin(a)google.com> Gerrit-MessageType: comment

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[S] Change in coreboot[main]: mb/google/corsola/wugtrio: Add initialization of USB port0
by Wentao Qin (Code Review) 29 Apr '24

29 Apr '24

Attention is currently required from: Hung-Te Lin, Paul Menzel, Wentao Qin, Xuxin Xiong, Yang Wu, Yu-Ping Wu. Hello Hung-Te Lin, Mingjin Ge, Xuxin Xiong, Yang Wu, Yidi Lin, Yu-Ping Wu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/82089?usp=email to look at the new patch set (#9). The following approvals got outdated and were removed: Verified-1 by build bot (Jenkins) Change subject: mb/google/corsola/wugtrio: Add initialization of USB port0 ...................................................................... mb/google/corsola/wugtrio: Add initialization of USB port0 Initialize USB2 port0 to support the SD card and detachable keyboard functions mounted on port0 during the coreboot stage. BUG=b:335124437 TEST=boot to OS from USB-A boot to OS from SD Card BRANCH=corsola Change-Id: I725b80593f5fc498a204bf47f943c36ccbd78134 Signed-off-by: Wentao Qin <qinwentao(a)huaqin.corp-partner.google.com> --- M src/mainboard/google/corsola/devicetree.cb M src/mainboard/google/corsola/mainboard.c M src/soc/mediatek/common/include/soc/usb_common.h M src/soc/mediatek/common/usb.c A src/soc/mediatek/common/usb_secondary.c M src/soc/mediatek/mt8186/Makefile.mk M src/soc/mediatek/mt8186/include/soc/addressmap.h 7 files changed, 35 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/82089/9 -- To view, visit https://review.coreboot.org/c/coreboot/+/82089?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I725b80593f5fc498a204bf47f943c36ccbd78134 Gerrit-Change-Number: 82089 Gerrit-PatchSet: 9 Gerrit-Owner: Wentao Qin <qinwentao(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Mingjin Ge <mingjin.ge(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Xuxin Xiong <xuxinxiong(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Yang Wu <wuyang5(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Xuxin Xiong <xuxinxiong(a)huaqin.corp-partner.google.com> Gerrit-Attention: Yang Wu <wuyang5(a)huaqin.corp-partner.google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Wentao Qin <qinwentao(a)huaqin.corp-partner.google.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[main]: mb/google/corsola/wugtrio: Add initialization of USB port0
by Wentao Qin (Code Review) 29 Apr '24

29 Apr '24

Attention is currently required from: Hung-Te Lin, Paul Menzel, Wentao Qin, Xuxin Xiong, Yang Wu, Yu-Ping Wu. Hello Hung-Te Lin, Mingjin Ge, Xuxin Xiong, Yang Wu, Yidi Lin, Yu-Ping Wu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/82089?usp=email to look at the new patch set (#8). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: mb/google/corsola/wugtrio: Add initialization of USB port0 ...................................................................... mb/google/corsola/wugtrio: Add initialization of USB port0 Initialize USB2 port0 to support the SD card and detachable keyboard functions mounted on port0 during the coreboot stage. BUG=b:335124437 TEST=boot to OS from USB-A boot to OS from SD Card BRANCH=corsola Change-Id: I725b80593f5fc498a204bf47f943c36ccbd78134 Signed-off-by: Wentao Qin <qinwentao(a)huaqin.corp-partner.google.com> --- M src/mainboard/google/corsola/devicetree.cb M src/mainboard/google/corsola/mainboard.c M src/soc/mediatek/common/include/soc/usb_common.h M src/soc/mediatek/common/usb.c A src/soc/mediatek/common/usb_secondary.c M src/soc/mediatek/mt8186/Makefile.mk M src/soc/mediatek/mt8186/include/soc/addressmap.h 7 files changed, 35 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/82089/8 -- To view, visit https://review.coreboot.org/c/coreboot/+/82089?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I725b80593f5fc498a204bf47f943c36ccbd78134 Gerrit-Change-Number: 82089 Gerrit-PatchSet: 8 Gerrit-Owner: Wentao Qin <qinwentao(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Mingjin Ge <mingjin.ge(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Xuxin Xiong <xuxinxiong(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Yang Wu <wuyang5(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Xuxin Xiong <xuxinxiong(a)huaqin.corp-partner.google.com> Gerrit-Attention: Yang Wu <wuyang5(a)huaqin.corp-partner.google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Wentao Qin <qinwentao(a)huaqin.corp-partner.google.com> Gerrit-MessageType: newpatchset

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[XS] Change in coreboot[main]: drivers/intel/fsp2_0: Make coreboot FSP stack 16-bytes aligned
by Arthur Heymans (Code Review) 29 Apr '24

29 Apr '24

Attention is currently required from: Appukuttan V K, Felix Held, Krishna P Bhat D, Subrata Banik, Wonkyu Kim. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81661?usp=email ) Change subject: drivers/intel/fsp2_0: Make coreboot FSP stack 16-bytes aligned ...................................................................... Patch Set 15: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/81661?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I86048c5d3623a29f17a5e492cd67568e4844589c Gerrit-Change-Number: 81661 Gerrit-PatchSet: 15 Gerrit-Owner: Appukuttan V K <appukuttan.vk(a)intel.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Appukuttan V K <appukuttan.vk(a)intel.com> Gerrit-Attention: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Mon, 29 Apr 2024 07:12:47 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: mb/google/brya/var/xol: Update I2C5 timing parameter
by Paul Menzel (Code Review) 29 Apr '24

29 Apr '24

Attention is currently required from: Dinesh Gehlot, Kapil Porwal, Nick Vaccaro, SH Kim, Subrata Banik. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/82100?usp=email ) Change subject: mb/google/brya/var/xol: Update I2C5 timing parameter ...................................................................... Patch Set 1: (4 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/82100/comment/ff161505_a44ce64e : PS1, Line 7: Update I2C5 timing parameter Maybe more specific: Tune I2C5 timings for touchpad spec https://review.coreboot.org/c/coreboot/+/82100/comment/6eaba92e_c8eeab06 : PS1, Line 9: touchpad spec Please add the name and revision. https://review.coreboot.org/c/coreboot/+/82100/comment/f7885cc9_a3766b52 : PS1, Line 10: What were the values before, and what does the spec require? File src/mainboard/google/brya/variants/xol/overridetree.cb: https://review.coreboot.org/c/coreboot/+/82100/comment/14ab5e64_3e5bf875 : PS1, Line 136: .data_hold_time_ns = 50, What is the default? -- To view, visit https://review.coreboot.org/c/coreboot/+/82100?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I386b2765410fd10b8cd711f54478fb52428de5a3 Gerrit-Change-Number: 82100 Gerrit-PatchSet: 1 Gerrit-Owner: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Mon, 29 Apr 2024 07:10:29 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: mb/google/brya/var/xol: Update I2C5 timing parameter
by Eric Lai (Code Review) 29 Apr '24

29 Apr '24

Attention is currently required from: Dinesh Gehlot, Kapil Porwal, Nick Vaccaro, SH Kim, Subrata Banik. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/82100?usp=email ) Change subject: mb/google/brya/var/xol: Update I2C5 timing parameter ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/82100?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I386b2765410fd10b8cd711f54478fb52428de5a3 Gerrit-Change-Number: 82100 Gerrit-PatchSet: 1 Gerrit-Owner: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Mon, 29 Apr 2024 07:06:58 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: mb/google/brya/var/xol: Update I2C5 timing parameter
by SH Kim (Code Review) 29 Apr '24

29 Apr '24

SH Kim has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/82100?usp=email ) Change subject: mb/google/brya/var/xol: Update I2C5 timing parameter ...................................................................... mb/google/brya/var/xol: Update I2C5 timing parameter Update I2C5 timing parameter values to meet touchpad spec. BUG=None BRANCH=brya TEST=built and measure I2C5 timing parameters tLOW : 2.06 us tHIGH: 1.05 us tHD : 0.42 us FSCL : 304 KHz Change-Id: I386b2765410fd10b8cd711f54478fb52428de5a3 Signed-off-by: Seunghwan Kim <sh_.kim(a)samsung.corp-partner.google.com> --- M src/mainboard/google/brya/variants/xol/overridetree.cb 1 file changed, 2 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/82100/1 diff --git a/src/mainboard/google/brya/variants/xol/overridetree.cb b/src/mainboard/google/brya/variants/xol/overridetree.cb index 80d15fe..e60d535 100644 --- a/src/mainboard/google/brya/variants/xol/overridetree.cb +++ b/src/mainboard/google/brya/variants/xol/overridetree.cb @@ -131,9 +131,8 @@ }, .i2c[5] = { .speed = I2C_SPEED_FAST, - .rise_time_ns = 650, - .fall_time_ns = 400, - .data_hold_time_ns = 50, + .rise_time_ns = 112, + .fall_time_ns = 2, }, }" -- To view, visit https://review.coreboot.org/c/coreboot/+/82100?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I386b2765410fd10b8cd711f54478fb52428de5a3 Gerrit-Change-Number: 82100 Gerrit-PatchSet: 1 Gerrit-Owner: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[main]: mb/google/corsola/wugtrio: Add initialization of USB port0
by Yidi Lin (Code Review) 29 Apr '24

29 Apr '24

Attention is currently required from: Hung-Te Lin, Paul Menzel, Wentao Qin, Xuxin Xiong, Yang Wu, Yu-Ping Wu. Yidi Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/82089?usp=email ) Change subject: mb/google/corsola/wugtrio: Add initialization of USB port0 ...................................................................... Patch Set 7: (1 comment) File src/soc/mediatek/common/usb_secondary.c: https://review.coreboot.org/c/coreboot/+/82089/comment/3d4927ed_e92fda8f : PS7, Line 8: /* We always consider USB2 port as the secondary UBS host regardless of the register naming */ ``` /* We always consider USB2 port as the secondary UBS host regardless of the register naming */ ``` -- To view, visit https://review.coreboot.org/c/coreboot/+/82089?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I725b80593f5fc498a204bf47f943c36ccbd78134 Gerrit-Change-Number: 82089 Gerrit-PatchSet: 7 Gerrit-Owner: Wentao Qin <qinwentao(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Mingjin Ge <mingjin.ge(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Xuxin Xiong <xuxinxiong(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Yang Wu <wuyang5(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Xuxin Xiong <xuxinxiong(a)huaqin.corp-partner.google.com> Gerrit-Attention: Yang Wu <wuyang5(a)huaqin.corp-partner.google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Wentao Qin <qinwentao(a)huaqin.corp-partner.google.com> Gerrit-Comment-Date: Mon, 29 Apr 2024 06:35:33 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[main]: mb/google/corsola/wugtrio: Add initialization of USB port0
by Mingjin Ge (Code Review) 29 Apr '24

29 Apr '24

Attention is currently required from: Hung-Te Lin, Paul Menzel, Wentao Qin, Xuxin Xiong, Yang Wu, Yidi Lin, Yu-Ping Wu. Mingjin Ge has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/82089?usp=email ) Change subject: mb/google/corsola/wugtrio: Add initialization of USB port0 ...................................................................... Patch Set 7: (1 comment) Patchset: PS4: > @Mingjin, is it expected to run through USB3 settings for USB2 configuration ? In the addressmap.h file, SSUSL_SIF_BASE and SSUSL_SIF_BASE_P0 are both U2PHY Bae Addresses -- To view, visit https://review.coreboot.org/c/coreboot/+/82089?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I725b80593f5fc498a204bf47f943c36ccbd78134 Gerrit-Change-Number: 82089 Gerrit-PatchSet: 7 Gerrit-Owner: Wentao Qin <qinwentao(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Mingjin Ge <mingjin.ge(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Xuxin Xiong <xuxinxiong(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Yang Wu <wuyang5(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Xuxin Xiong <xuxinxiong(a)huaqin.corp-partner.google.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Yang Wu <wuyang5(a)huaqin.corp-partner.google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Wentao Qin <qinwentao(a)huaqin.corp-partner.google.com> Gerrit-Comment-Date: Mon, 29 Apr 2024 06:19:33 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Yidi Lin <yidilin(a)google.com> Gerrit-MessageType: comment

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coreboot-gerrit April 2024