coreboot-gerrit April 2024

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[main]: soc/intel/xeon_sp: Use fixed BDF for IBL
by Shuo Liu (Code Review) 29 Apr '24

29 Apr '24

Attention is currently required from: Angel Pons, Arthur Heymans, Christian Walter, David Hendricks, Johnny Lin, Jonathan Zhang, Jérémy Compostella, Lean Sheng Tan, Patrick Rudolph, Shuo Liu, TangYiwei, Tim Chu. Hello Angel Pons, Arthur Heymans, Christian Walter, David Hendricks, Johnny Lin, Jonathan Zhang, Jérémy Compostella, Lean Sheng Tan, Patrick Rudolph, TangYiwei, Tim Chu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/81321?usp=email to look at the new patch set (#21). The following approvals got outdated and were removed: Code-Review+1 by Angel Pons, Code-Review+1 by Jérémy Compostella, Verified+1 by build bot (Jenkins) Change subject: soc/intel/xeon_sp: Use fixed BDF for IBL ...................................................................... soc/intel/xeon_sp: Use fixed BDF for IBL Integrated Boot Logic (IBL) codes doesn't support bootloader controlled Primary-to-Sideband Bridge (P2SB) hidden and unhidden. Hence, dynamically read IBL HPET/IOAPIC Bus:Device.Function (BDF) by bootloader is not supported, because when P2SB is hidden the register access is denied. TEST=Build and boot on intel/archercity CRB TEST=Build on intel/avenuecity CRB TEST=Build on intel/beechnutcity CRB Change-Id: I3975cb00e215c4984c63bb8510e8aef7d4cc85a4 Signed-off-by: Shuo Liu <shuo.liu(a)intel.com> --- M src/soc/intel/xeon_sp/include/soc/util.h M src/soc/intel/xeon_sp/uncore_acpi.c M src/soc/intel/xeon_sp/util.c 3 files changed, 33 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/81321/21 -- To view, visit https://review.coreboot.org/c/coreboot/+/81321?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I3975cb00e215c4984c63bb8510e8aef7d4cc85a4 Gerrit-Change-Number: 81321 Gerrit-PatchSet: 21 Gerrit-Owner: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: TangYiwei Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: TangYiwei Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[main]: soc/intel/xeon_sp: Move VPD based settings to mainboard codes
by Shuo Liu (Code Review) 29 Apr '24

29 Apr '24

Attention is currently required from: Angel Pons, Arthur Heymans, Chen, Gang C, Christian Walter, Jincheng Li, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, Shuo Liu, Tim Chu. Hello Angel Pons, Arthur Heymans, Chen, Gang C, Christian Walter, Jincheng Li, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, Tim Chu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/82090?usp=email to look at the new patch set (#8). The following approvals got outdated and were removed: Code-Review+2 by Angel Pons, Verified+1 by build bot (Jenkins) The change is no longer submittable: Code-Review and Verified are unsatisfied now. Change subject: soc/intel/xeon_sp: Move VPD based settings to mainboard codes ...................................................................... soc/intel/xeon_sp: Move VPD based settings to mainboard codes Configuration variable implementation (VPD, et al) is regarded to be mainboard specific and should not be bounded to SoC codes. This patch moves the VPD based settings (FSP log level, et al) from SoC codes to mainboard codes. TEST=Build and boot on intel/archercity CRB with no significant log differences Change-Id: Iefea72eec6e52f8d1ae2d10e1edbabdebf4dff91 Signed-off-by: Shuo Liu <shuo.liu(a)intel.com> Signed-off-by: Jincheng Li <jincheng.li(a)intel.com> --- M src/mainboard/intel/archercity_crb/romstage.c M src/mainboard/inventec/transformers/romstage.c M src/soc/intel/xeon_sp/spr/romstage.c 3 files changed, 33 insertions(+), 85 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/82090/8 -- To view, visit https://review.coreboot.org/c/coreboot/+/82090?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iefea72eec6e52f8d1ae2d10e1edbabdebf4dff91 Gerrit-Change-Number: 82090 Gerrit-PatchSet: 8 Gerrit-Owner: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[main]: soc/intel/xeon_sp: Add get_cxl_mode
by Shuo Liu (Code Review) 29 Apr '24

29 Apr '24

Attention is currently required from: Angel Pons, Arthur Heymans, Christian Walter, Jincheng Li, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, Shuo Liu, Tim Chu. Hello Angel Pons, Arthur Heymans, Christian Walter, Jincheng Li, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, Tim Chu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/82092?usp=email to look at the new patch set (#7). The following approvals got outdated and were removed: Code-Review+2 by Angel Pons, Verified+1 by build bot (Jenkins) The change is no longer submittable: Code-Review and Verified are unsatisfied now. Change subject: soc/intel/xeon_sp: Add get_cxl_mode ...................................................................... soc/intel/xeon_sp: Add get_cxl_mode Configuration variable implementation (VPD, et al) is regarded to be mainboard specific and should not be bounded to SoC codes. Add get_cxl_mode so that SoC codes do not need to get this configuration from VPD any more. TEST=Build and boot on intel/archercity CRB with no significant log differences Change-Id: I1e08e92ad769112d7e570ee12cf973451a3befc0 Signed-off-by: Shuo Liu <shuo.liu(a)intel.com> Signed-off-by: Jincheng Li <jincheng.li(a)intel.com> --- M src/mainboard/intel/archercity_crb/Makefile.mk A src/mainboard/intel/archercity_crb/util.c M src/mainboard/inventec/transformers/Makefile.mk A src/mainboard/inventec/transformers/util.c M src/soc/intel/xeon_sp/include/soc/chip_common.h M src/soc/intel/xeon_sp/include/soc/util.h M src/soc/intel/xeon_sp/spr/romstage.c M src/soc/intel/xeon_sp/uncore.c M src/soc/intel/xeon_sp/util.c 9 files changed, 76 insertions(+), 19 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/82092/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/82092?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1e08e92ad769112d7e570ee12cf973451a3befc0 Gerrit-Change-Number: 82092 Gerrit-PatchSet: 7 Gerrit-Owner: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-MessageType: newpatchset

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[L] Change in coreboot[main]: mb/intel/beechnutcity_crb: Add GNR/SRF-SP 2S server board Beechnut City
by Shuo Liu (Code Review) 29 Apr '24

29 Apr '24

Attention is currently required from: Arthur Heymans, Chen, Gang C, David Hendricks, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, Paul Menzel, Shuo Liu, TangYiwei. Hello Arthur Heymans, Chen, Gang C, David Hendricks, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, TangYiwei, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/81322?usp=email to look at the new patch set (#29). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: mb/intel/beechnutcity_crb: Add GNR/SRF-SP 2S server board Beechnut City ...................................................................... mb/intel/beechnutcity_crb: Add GNR/SRF-SP 2S server board Beechnut City Beechnut City CRB is the 2 socket reference board for 6th Gen Xeon-SP SP SoCs (Granite Rapids SP and Sierra Forest SP). This patch initially sets the code set up as a compilation target with GNR N-1 FSP, and with basic feature supports (Integrated IO Controller (IIO) configuration, BMC, UART, HPET). TEST=Build on intel/beechnutcity CRB Change-Id: I3f6a0fb97b62baadb438fb9f11fdd78fccb3f89a Signed-off-by: Shuo Liu <shuo.liu(a)intel.com> Co-authored-by: Gang Chen <gang.c.chen(a)intel.com> --- A configs/builder/config.intel.crb.bnc A src/mainboard/intel/beechnutcity_crb/Kconfig A src/mainboard/intel/beechnutcity_crb/Kconfig.name A src/mainboard/intel/beechnutcity_crb/Makefile.mk A src/mainboard/intel/beechnutcity_crb/board.fmd A src/mainboard/intel/beechnutcity_crb/board_info.txt A src/mainboard/intel/beechnutcity_crb/bootblock.c A src/mainboard/intel/beechnutcity_crb/config/iio.c A src/mainboard/intel/beechnutcity_crb/devicetree.cb A src/mainboard/intel/beechnutcity_crb/dsdt.asl A src/mainboard/intel/beechnutcity_crb/ramstage.c A src/mainboard/intel/beechnutcity_crb/romstage.c 12 files changed, 283 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/81322/29 -- To view, visit https://review.coreboot.org/c/coreboot/+/81322?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I3f6a0fb97b62baadb438fb9f11fdd78fccb3f89a Gerrit-Change-Number: 81322 Gerrit-PatchSet: 29 Gerrit-Owner: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: TangYiwei Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: TangYiwei Gerrit-MessageType: newpatchset

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[L] Change in coreboot[main]: mb/intel/avenuecity_crb: Add GNR/SRF-AP 2S server board Avenue City
by Shuo Liu (Code Review) 29 Apr '24

29 Apr '24

Attention is currently required from: Arthur Heymans, Chen, Gang C, David Hendricks, Jincheng Li, Jonathan Zhang, Lean Sheng Tan, Nicholas Chin, Patrick Rudolph, Paul Menzel, Shuo Liu, TangYiwei, Varshit Pandya. Hello Angel Pons, Arthur Heymans, Chen, Gang C, David Hendricks, Jincheng Li, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, TangYiwei, Varshit Pandya, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/81319?usp=email to look at the new patch set (#51). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: mb/intel/avenuecity_crb: Add GNR/SRF-AP 2S server board Avenue City ...................................................................... mb/intel/avenuecity_crb: Add GNR/SRF-AP 2S server board Avenue City Avenue City CRB is the 2 socket reference board for 6th Gen Xeon-SP AP SoCs (Granite Rapids AP and Sierra Forest AP). This patch initially sets the code set up as a compilation target with GNR N-1 FSP, and with basic feature supports (Integrated IO Controller (IIO) configuration, BMC, UART, HPET). TEST=Build on intel/avenuecity CRB Change-Id: I64fdd5388aadf7732f6d3daa600c1455d3672a46 Signed-off-by: Gang Chen <gang.c.chen(a)intel.com> Co-authored-by: Shuo Liu <shuo.liu(a)intel.com> Co-authored-by: Jincheng Li <jincheng.li(a)intel.com> --- A configs/builder/config.intel.crb.avc M src/drivers/ocp/include/vpd.h A src/mainboard/intel/avenuecity_crb/Kconfig A src/mainboard/intel/avenuecity_crb/Kconfig.name A src/mainboard/intel/avenuecity_crb/Makefile.mk A src/mainboard/intel/avenuecity_crb/board.fmd A src/mainboard/intel/avenuecity_crb/board_info.txt A src/mainboard/intel/avenuecity_crb/bootblock.c A src/mainboard/intel/avenuecity_crb/config/iio.c A src/mainboard/intel/avenuecity_crb/devicetree.cb A src/mainboard/intel/avenuecity_crb/dsdt.asl A src/mainboard/intel/avenuecity_crb/ramstage.c A src/mainboard/intel/avenuecity_crb/romstage.c 13 files changed, 285 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/81319/51 -- To view, visit https://review.coreboot.org/c/coreboot/+/81319?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I64fdd5388aadf7732f6d3daa600c1455d3672a46 Gerrit-Change-Number: 81319 Gerrit-PatchSet: 51 Gerrit-Owner: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: TangYiwei Gerrit-Reviewer: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: TangYiwei Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[main]: soc/intel/xeon_sp/gnr: Add IIO config utils
by Shuo Liu (Code Review) 29 Apr '24

29 Apr '24

Attention is currently required from: Angel Pons, Arthur Heymans, Christian Walter, David Hendricks, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Martin L Roth, Patrick Rudolph, Shuo Liu, TangYiwei, Tim Chu. Hello Angel Pons, Arthur Heymans, Chen, Gang C, Christian Walter, David Hendricks, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, TangYiwei, Tim Chu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/81318?usp=email to look at the new patch set (#48). The following approvals got outdated and were removed: Code-Review+1 by Angel Pons, Verified+1 by build bot (Jenkins) Change subject: soc/intel/xeon_sp/gnr: Add IIO config utils ...................................................................... soc/intel/xeon_sp/gnr: Add IIO config utils Add IIO configuration utils shared in GNR boards to handle the complex IIO configuration settings. Change-Id: If7146761db6f73a0c4b0d31b010c0d30a42bf690 Signed-off-by: Gang Chen <gang.c.chen(a)intel.com> Co-authored-by: Shuo Liu <shuo.liu(a)intel.com> --- M src/soc/intel/xeon_sp/gnr/Makefile.mk A src/soc/intel/xeon_sp/gnr/include/soc/iio.h A src/soc/intel/xeon_sp/gnr/soc_iio.c 3 files changed, 229 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/81318/48 -- To view, visit https://review.coreboot.org/c/coreboot/+/81318?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If7146761db6f73a0c4b0d31b010c0d30a42bf690 Gerrit-Change-Number: 81318 Gerrit-PatchSet: 48 Gerrit-Owner: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: TangYiwei Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-CC: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: TangYiwei Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-MessageType: newpatchset

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[XL] Change in coreboot[main]: soc/intel/xeon_sp: Add Granite Rapids initial codes
by Shuo Liu (Code Review) 29 Apr '24

29 Apr '24

Attention is currently required from: Angel Pons, Arthur Heymans, Chen, Gang C, Christian Walter, David Hendricks, Felix Held, Jincheng Li, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Nico Huber, Paul Menzel, Shuo Liu, TangYiwei, Tim Chu. Hello Angel Pons, Arthur Heymans, Chen, Gang C, Christian Walter, David Hendricks, Jincheng Li, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, TangYiwei, Tim Chu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/81316?usp=email to look at the new patch set (#57). The following approvals got outdated and were removed: Code-Review+2 by Lean Sheng Tan, Verified+1 by build bot (Jenkins) Change subject: soc/intel/xeon_sp: Add Granite Rapids initial codes ...................................................................... soc/intel/xeon_sp: Add Granite Rapids initial codes coreboot GNR (Granite Rapids) is a FSP 2.4 based, no-PCH, single IO-APIC Xeon-SP platform. The same set of codes is also used for SRF (Sierra Forest) SoC. This patch initially sets the code set up as a build target with Granite Rapids N-1 FSP (src/vc/intel/fsp/fsp2_0/graniterapids). 1. All register definitions are forked from SPR (Sapphire Rapids) and EBG (Emmitsburg PCH)'s codes are reused. 2. src/soc/intel/xeon_sp/chip_gen6.c is newly added as chip common codes for 6th Gen Xeon-SP SoC (Granite Rapids) and later. Change-Id: I3084e1b5abf25d8d9504bebeaed2a15b916ed56b Signed-off-by: Shuo Liu <shuo.liu(a)intel.com> Co-authored-by: Gang Chen <gang.c.chen(a)intel.com> Co-authored-by: Jincheng Li <jincheng.li(a)intel.com> --- M src/soc/intel/xeon_sp/Makefile.mk M src/soc/intel/xeon_sp/chip_gen1.c A src/soc/intel/xeon_sp/chip_gen6.c A src/soc/intel/xeon_sp/gnr/Kconfig A src/soc/intel/xeon_sp/gnr/Makefile.mk A src/soc/intel/xeon_sp/gnr/acpi/gpe.asl A src/soc/intel/xeon_sp/gnr/chip.c A src/soc/intel/xeon_sp/gnr/chip.h A src/soc/intel/xeon_sp/gnr/chipset.cb A src/soc/intel/xeon_sp/gnr/cpu.c A src/soc/intel/xeon_sp/gnr/include/soc/cpu.h A src/soc/intel/xeon_sp/gnr/include/soc/pci_devs.h A src/soc/intel/xeon_sp/gnr/include/soc/soc_msr.h A src/soc/intel/xeon_sp/gnr/include/soc/soc_util.h A src/soc/intel/xeon_sp/gnr/ramstage.c A src/soc/intel/xeon_sp/gnr/romstage.c A src/soc/intel/xeon_sp/gnr/soc_acpi.c A src/soc/intel/xeon_sp/gnr/soc_util.c 18 files changed, 1,075 insertions(+), 8 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/81316/57 -- To view, visit https://review.coreboot.org/c/coreboot/+/81316?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I3084e1b5abf25d8d9504bebeaed2a15b916ed56b Gerrit-Change-Number: 81316 Gerrit-PatchSet: 57 Gerrit-Owner: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: TangYiwei Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: TangYiwei Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-MessageType: newpatchset

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[XS] Change in coreboot[main]: [WIP] mb/hp/280_g2: Make VGA port work
by Angel Pons (Code Review) 28 Apr '24

28 Apr '24

Attention is currently required from: Nico Huber. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/82114?usp=email ) Change subject: [WIP] mb/hp/280_g2: Make VGA port work ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: > I don't think libgfxinit is prepared for this. Saying it's `Analog` probably […] Yeah, I remember some libgfxinit stuff is needed to make it work. Will test this once I find the board. But setting the bifurcation should at least make the OS happy. -- To view, visit https://review.coreboot.org/c/coreboot/+/82114?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I747e770707748496ba1aa58062947b28573ca781 Gerrit-Change-Number: 82114 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Comment-Date: Sun, 28 Apr 2024 21:02:06 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: [WIP] mb/hp/280_g2: Make VGA port work
by Nico Huber (Code Review) 28 Apr '24

28 Apr '24

Attention is currently required from: Angel Pons. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/82114?usp=email ) Change subject: [WIP] mb/hp/280_g2: Make VGA port work ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: I don't think libgfxinit is prepared for this. Saying it's `Analog` probably won't make it look at the DP aux channel (which I guess Haswell didn't have for DDI E). -- To view, visit https://review.coreboot.org/c/coreboot/+/82114?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I747e770707748496ba1aa58062947b28573ca781 Gerrit-Change-Number: 82114 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Sun, 28 Apr 2024 20:56:53 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[main]: soc/intel/cmn/graphics: Make DDI-A 4 lanes configurable
by Nico Huber (Code Review) 28 Apr '24

28 Apr '24

Attention is currently required from: Angel Pons. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/82113?usp=email ) Change subject: soc/intel/cmn/graphics: Make DDI-A 4 lanes configurable ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/82113?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I516538db77509209d371f3f49c920476e06b052f Gerrit-Change-Number: 82113 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Sun, 28 Apr 2024 20:51:44 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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