coreboot-gerrit December 2024

coreboot-gerrit@coreboot.org

1 participants
3018 discussions

[S] Change in coreboot[main]: soc/amd/phoenix/chip.c: Add PHX OpenSIL POC TP2/TP3 calls
by Matt DeVillier (Code Review) 04 Dec '24

04 Dec '24

Attention is currently required from: Ana Carolina Cabral, Fred Reitberger, Jason Glenesk, Matt DeVillier, Nick Kochlowski, Paul Menzel. Matt DeVillier has posted comments on this change by Nick Kochlowski. ( https://review.coreboot.org/c/coreboot/+/84915?usp=email ) Change subject: soc/amd/phoenix/chip.c: Add PHX OpenSIL POC TP2/TP3 calls ...................................................................... Patch Set 7: (1 comment) File src/soc/amd/phoenix/chip.c: https://review.coreboot.org/c/coreboot/+/84915/comment/63081c9a_81a9b613?us… : PS6, Line 41: default: : break; > Is an empty default block good practice? I wouldn't think so, but maybe there's some reason I don't […] the latest patchset prints an error in the default case -- To view, visit https://review.coreboot.org/c/coreboot/+/84915?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I8c335211bf36118fe1d6b7dacbf4064c1d7d3a38 Gerrit-Change-Number: 84915 Gerrit-PatchSet: 7 Gerrit-Owner: Nick Kochlowski <nickkochlowski(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ana Carolina Cabral Gerrit-CC: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nick Kochlowski <nickkochlowski(a)gmail.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Ana Carolina Cabral Gerrit-Comment-Date: Wed, 04 Dec 2024 17:35:22 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nick Kochlowski <nickkochlowski(a)gmail.com> Comment-In-Reply-To: Martin Roth <martin.roth(a)amd.corp-partner.google.com>

1 0

[S] Change in coreboot[main]: soc/amd/phoenix/chip.c: Add PHX OpenSIL POC TP2/TP3 calls
by Martin Roth (Code Review) 04 Dec '24

04 Dec '24

Attention is currently required from: Ana Carolina Cabral, Fred Reitberger, Jason Glenesk, Matt DeVillier, Nick Kochlowski, Paul Menzel. Martin Roth has posted comments on this change by Nick Kochlowski. ( https://review.coreboot.org/c/coreboot/+/84915?usp=email ) Change subject: soc/amd/phoenix/chip.c: Add PHX OpenSIL POC TP2/TP3 calls ...................................................................... Patch Set 7: (2 comments) File src/soc/amd/phoenix/chip.c: PS6: > i'd say that having a comment in this file would be helpful to understand whwre/how the other timepo […] I mentioned this in a private chat, but I agree that chip.c isn't really the place for this code. https://review.coreboot.org/c/coreboot/+/84915/comment/26da3a98_0a67d2d6?us… : PS6, Line 41: default: : break; > Out of good practice, I left the default case and added an error log although we shouldn't expect to […] Is an empty default block good practice? I wouldn't think so, but maybe there's some reason I don't understand. As I said, I could see using it to print an error or something, but as far as I can see, having an empty default block is the same as not having a default block at all, just with more lines of code. -- To view, visit https://review.coreboot.org/c/coreboot/+/84915?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I8c335211bf36118fe1d6b7dacbf4064c1d7d3a38 Gerrit-Change-Number: 84915 Gerrit-PatchSet: 7 Gerrit-Owner: Nick Kochlowski <nickkochlowski(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ana Carolina Cabral Gerrit-CC: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nick Kochlowski <nickkochlowski(a)gmail.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Ana Carolina Cabral Gerrit-Comment-Date: Wed, 04 Dec 2024 17:30:05 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nick Kochlowski <nickkochlowski(a)gmail.com> Comment-In-Reply-To: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de>

1 0

[S] Change in coreboot[main]: drivers/soundwire/alc711: Add common Kconfig for ALC7xx soundwire codecs
by Subrata Banik (Code Review) 04 Dec '24

04 Dec '24

Attention is currently required from: Naveen M, Paul Menzel, Pranava Y N, Varun Upadhyay. Subrata Banik has posted comments on this change by Varun Upadhyay. ( https://review.coreboot.org/c/coreboot/+/85282?usp=email ) Change subject: drivers/soundwire/alc711: Add common Kconfig for ALC7xx soundwire codecs ...................................................................... Patch Set 11: (1 comment) Patchset: PS9: > wondering if there is any consumer for `MIPI_DEV_ID_REALTEK_ALC711` macro ? Acknowledged -- To view, visit https://review.coreboot.org/c/coreboot/+/85282?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I5953d0fcb7b15368888901f88c5616757ac42877 Gerrit-Change-Number: 85282 Gerrit-PatchSet: 11 Gerrit-Owner: Varun Upadhyay <varun.upadhyay(a)intel.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Naveen M <naveen.m(a)intel.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Naveen M <naveen.m(a)intel.com> Gerrit-Attention: Varun Upadhyay <varun.upadhyay(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Comment-Date: Wed, 04 Dec 2024 17:21:21 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com>

1 0

[S] Change in coreboot[main]: mb/google/fatcat: Update Soundwire codec address based on devicetree
by Karthik Ramasubramanian (Code Review) 04 Dec '24

04 Dec '24

Attention is currently required from: Naveen M, Pranava Y N, Subrata Banik, Varun Upadhyay. Karthik Ramasubramanian has posted comments on this change by Varun Upadhyay. ( https://review.coreboot.org/c/coreboot/+/85440?usp=email ) Change subject: mb/google/fatcat: Update Soundwire codec address based on devicetree ...................................................................... Patch Set 6: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85440?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I3322ae2d106d3628dbf627aacf999056d82ee7a9 Gerrit-Change-Number: 85440 Gerrit-PatchSet: 6 Gerrit-Owner: Varun Upadhyay <varun.upadhyay(a)intel.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Naveen M <naveen.m(a)intel.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Naveen M <naveen.m(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Varun Upadhyay <varun.upadhyay(a)intel.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Comment-Date: Wed, 04 Dec 2024 17:01:16 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

1 0

[S] Change in coreboot[main]: drivers/soundwire/alc711: Add common Kconfig for ALC7xx soundwire codecs
by Karthik Ramasubramanian (Code Review) 04 Dec '24

04 Dec '24

Attention is currently required from: Naveen M, Paul Menzel, Pranava Y N, Varun Upadhyay. Karthik Ramasubramanian has posted comments on this change by Varun Upadhyay. ( https://review.coreboot.org/c/coreboot/+/85282?usp=email ) Change subject: drivers/soundwire/alc711: Add common Kconfig for ALC7xx soundwire codecs ...................................................................... Patch Set 11: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85282?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I5953d0fcb7b15368888901f88c5616757ac42877 Gerrit-Change-Number: 85282 Gerrit-PatchSet: 11 Gerrit-Owner: Varun Upadhyay <varun.upadhyay(a)intel.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Naveen M <naveen.m(a)intel.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Naveen M <naveen.m(a)intel.com> Gerrit-Attention: Varun Upadhyay <varun.upadhyay(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Comment-Date: Wed, 04 Dec 2024 17:00:35 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

1 0

[XS] Change in coreboot[main]: soc/intel/pantherlake: Remove unnecessary cep_enable SoC chip field
by Jérémy Compostella (Code Review) 04 Dec '24

04 Dec '24

Attention is currently required from: Kapil Porwal, Pranava Y N. Jérémy Compostella has posted comments on this change by Jérémy Compostella. ( https://review.coreboot.org/c/coreboot/+/85452?usp=email ) The change is no longer submittable: All-Comments-Resolved and Code-Review are unsatisfied now. Change subject: soc/intel/pantherlake: Remove unnecessary cep_enable SoC chip field ...................................................................... Patch Set 1: Code-Review-2 (1 comment) Patchset: PS1: I noticed some contradictory changes in the last version of FSP. Holding up on that till I get some explanation from the FSP owner. -- To view, visit https://review.coreboot.org/c/coreboot/+/85452?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I42d8c793ac3f33eca212320605b16f3b92c60b9c Gerrit-Change-Number: 85452 Gerrit-PatchSet: 1 Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Comment-Date: Wed, 04 Dec 2024 16:52:45 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes

1 0

[M] Change in coreboot[main]: soc/intel/xeon_sp/lbg: Add support to hide HDA
by Paul Menzel (Code Review) 04 Dec '24

04 Dec '24

Attention is currently required from: Angel Pons, Christian Walter, Johnny Lin, Jonathan Zhang, Patrick Rudolph, Shuo Liu, Tim Chu, yuchi.chen(a)intel.com. Paul Menzel has posted comments on this change by Patrick Rudolph. ( https://review.coreboot.org/c/coreboot/+/85496?usp=email ) Change subject: soc/intel/xeon_sp/lbg: Add support to hide HDA ...................................................................... Patch Set 2: Code-Review+1 (2 comments) File src/soc/intel/xeon_sp/lbg/include/soc/pcr_ids.h: https://review.coreboot.org/c/coreboot/+/85496/comment/adf0293e_e2dc20b1?us… : PS2, Line 9: #define PID_PSF3 0xBC Sort it? File src/soc/intel/xeon_sp/skx/romstage.c: https://review.coreboot.org/c/coreboot/+/85496/comment/1749352d_e5800c59?us… : PS2, Line 8: Unrelated. -- To view, visit https://review.coreboot.org/c/coreboot/+/85496?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I84ac53621b2dcf7baa68f2efb30d0b7e77595c8d Gerrit-Change-Number: 85496 Gerrit-PatchSet: 2 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: yuchi.chen(a)intel.com Gerrit-Attention: yuchi.chen(a)intel.com Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Wed, 04 Dec 2024 16:40:37 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes

1 0

[S] Change in coreboot[main]: mb/google/fatcat: Limit Power Limit when battery is missing
by Jérémy Compostella (Code Review) 04 Dec '24

04 Dec '24

Hello Jamie Ryu, Pranava Y N, Subrata Banik, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85146?usp=email to look at the new patch set (#11). Change subject: mb/google/fatcat: Limit Power Limit when battery is missing ...................................................................... mb/google/fatcat: Limit Power Limit when battery is missing Ensure the board can boot by limiting the power limits if the battery is missing. This addresses the factory use case. BUG=b:377798581 TEST=See power limit override log message when the battery is missing on fatcat board Change-Id: I5d71e9edde0ecbd7aaf316cd754a6ebcff9da77e Signed-off-by: Jeremy Compostella <jeremy.compostella(a)intel.com> --- M src/mainboard/google/fatcat/Kconfig M src/mainboard/google/fatcat/variants/baseboard/fatcat/Makefile.mk A src/mainboard/google/fatcat/variants/baseboard/fatcat/ramstage.c 3 files changed, 30 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/85146/11 -- To view, visit https://review.coreboot.org/c/coreboot/+/85146?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I5d71e9edde0ecbd7aaf316cd754a6ebcff9da77e Gerrit-Change-Number: 85146 Gerrit-PatchSet: 11 Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

1 0

[M] Change in coreboot[main]: mb/google/fatcat: Enable Intel DPTF support and configure policies
by Jérémy Compostella (Code Review) 04 Dec '24

04 Dec '24

Attention is currently required from: Pranava Y N, Subrata Banik, Sukumar Ghorai. Hello Pranava Y N, Subrata Banik, Sukumar Ghorai, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85457?usp=email to look at the new patch set (#3). Change subject: mb/google/fatcat: Enable Intel DPTF support and configure policies ...................................................................... mb/google/fatcat: Enable Intel DPTF support and configure policies This commit enables the Dynamic Platform and Thermal Framework (DPTF) for the fatcat board. DPTF is a system management framework that allows the board to dynamically adjust its power and thermal settings based on the system load and thermal conditions. This can help to improve the board's performance and battery life. The following changes were made to enable DPTF: - Added the Intel DPTF driver to the board's Kconfig file. - Overrode the default DPTF settings in the fatcat overridetree.cb file. - Enabled the DPTF policy on the board. Change-Id: I2b5042795acee3e261765ca4c392d15ef7f5ca97 Signed-off-by: Jeremy Compostella <jeremy.compostella(a)intel.com> --- M src/mainboard/google/fatcat/Kconfig M src/mainboard/google/fatcat/variants/fatcat/overridetree.cb 2 files changed, 130 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/85457/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/85457?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I2b5042795acee3e261765ca4c392d15ef7f5ca97 Gerrit-Change-Number: 85457 Gerrit-PatchSet: 3 Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Sukumar Ghorai <sukumar.ghorai(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Sukumar Ghorai <sukumar.ghorai(a)intel.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com>

1 0

[M] Change in coreboot[main]: soc/intel/xeon_sp/lbg: Add support to hide HDA
by Patrick Rudolph (Code Review) 04 Dec '24

04 Dec '24

Attention is currently required from: Christian Walter, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, Shuo Liu, Tim Chu. Hello Christian Walter, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Shuo Liu, Tim Chu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85496?usp=email to look at the new patch set (#2). The following approvals got outdated and were removed: Verified-1 by build bot (Jenkins) Change subject: soc/intel/xeon_sp/lbg: Add support to hide HDA ...................................................................... soc/intel/xeon_sp/lbg: Add support to hide HDA The azalia audio device is usually unused on server platforms. Add code to hide it since FSP lacks this option and there's no official bit in the IFD to disable it. TEST: No HDA PCI device visible on ocp/tiogapass. Change-Id: I84ac53621b2dcf7baa68f2efb30d0b7e77595c8d Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M src/soc/intel/xeon_sp/cpx/romstage.c M src/soc/intel/xeon_sp/lbg/Makefile.mk A src/soc/intel/xeon_sp/lbg/include/soc/azalia_device.h M src/soc/intel/xeon_sp/lbg/include/soc/pcr_ids.h M src/soc/intel/xeon_sp/lbg/include/soc/pmc.h M src/soc/intel/xeon_sp/lbg/include/soc/soc_pch.h M src/soc/intel/xeon_sp/lbg/soc_pch.c M src/soc/intel/xeon_sp/skx/romstage.c 8 files changed, 56 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/85496/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85496?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I84ac53621b2dcf7baa68f2efb30d0b7e77595c8d Gerrit-Change-Number: 85496 Gerrit-PatchSet: 2 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com>

1 0

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit December 2024