coreboot-gerrit December 2024

coreboot-gerrit@coreboot.org

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3018 discussions

[XS] Change in coreboot[main]: soc/intel/xeon_sp/cpx: Fix register lock
by Patrick Rudolph (Code Review) 04 Dec '24

04 Dec '24

Attention is currently required from: Angel Pons, Christian Walter, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, Shuo Liu, Tim Chu. Hello Angel Pons, Christian Walter, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Shuo Liu, Tim Chu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85439?usp=email to look at the new patch set (#3). The following approvals got outdated and were removed: Code-Review+1 by Angel Pons, Verified+1 by build bot (Jenkins) Change subject: soc/intel/xeon_sp/cpx: Fix register lock ...................................................................... soc/intel/xeon_sp/cpx: Fix register lock Do not use a define for a PCI register to lock a MSR. The defines will be moved in the following commit to it's own header, preventing the use in CPX CPU init. Change-Id: I76a8ae13dbd942291aacbb4bd84140be156bc563 Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M src/soc/intel/xeon_sp/cpx/cpu.c 1 file changed, 1 insertion(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/85439/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/85439?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I76a8ae13dbd942291aacbb4bd84140be156bc563 Gerrit-Change-Number: 85439 Gerrit-PatchSet: 3 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com>

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[M] Change in coreboot[main]: drivers/soundwire/alc711: Add common Kconfig for ALC7xx soundwire codecs
by Subrata Banik (Code Review) 04 Dec '24

04 Dec '24

Attention is currently required from: Karthik Ramasubramanian, Naveen M, Paul Menzel, Pranava Y N, Varun Upadhyay. Subrata Banik has posted comments on this change by Varun Upadhyay. ( https://review.coreboot.org/c/coreboot/+/85282?usp=email ) Change subject: drivers/soundwire/alc711: Add common Kconfig for ALC7xx soundwire codecs ...................................................................... Patch Set 10: (1 comment) File src/drivers/soundwire/alc711/alc711.c: https://review.coreboot.org/c/coreboot/+/85282/comment/6a1b5c70_5bb139ba?us… : PS9, Line 111: acpigen_write_ADR_soundwire_device(&config->alc711_address); > Sure, updated patch to combine all Cls in one. […] This CL should only include adlrvp and mtlrvp changes to ensure the existing platform behavior isn't impacted. Fatcat is a new change that can be pushed separately. -- To view, visit https://review.coreboot.org/c/coreboot/+/85282?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I5953d0fcb7b15368888901f88c5616757ac42877 Gerrit-Change-Number: 85282 Gerrit-PatchSet: 10 Gerrit-Owner: Varun Upadhyay <varun.upadhyay(a)intel.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Naveen M <naveen.m(a)intel.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Naveen M <naveen.m(a)intel.com> Gerrit-Attention: Varun Upadhyay <varun.upadhyay(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Comment-Date: Wed, 04 Dec 2024 13:46:35 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Varun Upadhyay <varun.upadhyay(a)intel.com>

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[S] Change in coreboot[main]: mb/ocp/tiogapass: Implement mainboard_dimm_slot_exists
by Patrick Rudolph (Code Review) 04 Dec '24

04 Dec '24

Attention is currently required from: Angel Pons, Johnny Lin, Morgan Jang. Patrick Rudolph has posted comments on this change by Patrick Rudolph. ( https://review.coreboot.org/c/coreboot/+/85318?usp=email ) Change subject: mb/ocp/tiogapass: Implement mainboard_dimm_slot_exists ...................................................................... Patch Set 6: (1 comment) File src/mainboard/ocp/tiogapass/romstage.c: https://review.coreboot.org/c/coreboot/+/85318/comment/8d64c0d7_3439f207?us… : PS6, Line 75: if (dimm >= 2) > Does this board have 1 or 2 DIMMs per channel? 2 sockets, each with 6 channels, each with 2 dimms per channel. -- To view, visit https://review.coreboot.org/c/coreboot/+/85318?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I31cb4a89aa11258ac04eb69a0e9c86f258280484 Gerrit-Change-Number: 85318 Gerrit-PatchSet: 6 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Morgan Jang <Morgan_Jang(a)wiwynn.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Morgan Jang <Morgan_Jang(a)wiwynn.com> Gerrit-Comment-Date: Wed, 04 Dec 2024 13:44:40 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com>

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[S] Change in coreboot[main]: security: Allow vboot when INTEL_TXT enabled
by Filip Lewiński (Code Review) 04 Dec '24

04 Dec '24

Attention is currently required from: Christian Walter, Julius Werner, Michał Żygowski, Yu-Ping Wu. Filip Lewiński has posted comments on this change by Filip Lewiński. ( https://review.coreboot.org/c/coreboot/+/82695?usp=email ) Change subject: security: Allow vboot when INTEL_TXT enabled ...................................................................... Patch Set 8: (1 comment) File src/lib/bootblock.c: https://review.coreboot.org/c/coreboot/+/82695/comment/2ef36273_c0bc790e?us… : PS5, Line 62: if (CONFIG(TPM_MEASURED_BOOT_INIT_BOOTBLOCK) && !CONFIG(VBOOT_STARTS_IN_BOOTBLOCK)) { > Right, I kind of mixed the redundancy of TPM startup in bootblock when vboot runs in bootblock with […] @jwerner@chromium.org I would very much appreciate it if you could find the time to look at this thread again and elaborate on your requirements -- To view, visit https://review.coreboot.org/c/coreboot/+/82695?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I19dc3d910c23fcfd8732465c488f47dd86a96781 Gerrit-Change-Number: 82695 Gerrit-PatchSet: 8 Gerrit-Owner: Filip Lewiński <filip.lewinski(a)3mdeb.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Wed, 04 Dec 2024 13:02:24 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Michał Żygowski <michal.zygowski(a)3mdeb.com> Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org>

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[M] Change in coreboot[main]: drivers/soundwire/alc711: Add common Kconfig for ALC7xx soundwire codecs
by Varun Upadhyay (Code Review) 04 Dec '24

04 Dec '24

Attention is currently required from: Karthik Ramasubramanian, Naveen M, Paul Menzel, Pranava Y N, Subrata Banik. Varun Upadhyay has posted comments on this change by Varun Upadhyay. ( https://review.coreboot.org/c/coreboot/+/85282?usp=email ) Change subject: drivers/soundwire/alc711: Add common Kconfig for ALC7xx soundwire codecs ...................................................................... Patch Set 10: (1 comment) File src/drivers/soundwire/alc711/alc711.c: https://review.coreboot.org/c/coreboot/+/85282/comment/fdb91251_9c14002c?us… : PS9, Line 111: acpigen_write_ADR_soundwire_device(&config->alc711_address); > > Currently there is only adlrvp and mtlrvp using ALC711. […] Sure, updated patch to combine all Cls in one. will remove other Cls -- To view, visit https://review.coreboot.org/c/coreboot/+/85282?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I5953d0fcb7b15368888901f88c5616757ac42877 Gerrit-Change-Number: 85282 Gerrit-PatchSet: 10 Gerrit-Owner: Varun Upadhyay <varun.upadhyay(a)intel.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Naveen M <naveen.m(a)intel.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Naveen M <naveen.m(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Comment-Date: Wed, 04 Dec 2024 12:52:58 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Varun Upadhyay <varun.upadhyay(a)intel.com>

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[M] Change in coreboot[main]: drivers/soundwire/alc711: Add common Kconfig for ALC7xx soundwire codecs
by Varun Upadhyay (Code Review) 04 Dec '24

04 Dec '24

Attention is currently required from: Karthik Ramasubramanian, Naveen M, Paul Menzel, Pranava Y N, Varun Upadhyay. Hello Karthik Ramasubramanian, Naveen M, Pranava Y N, Subrata Banik, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85282?usp=email to look at the new patch set (#10). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: drivers/soundwire/alc711: Add common Kconfig for ALC7xx soundwire codecs ...................................................................... drivers/soundwire/alc711: Add common Kconfig for ALC7xx soundwire codecs - Use common config DRIVERS_SOUNDWIRE_ALC_BASE_7XX for ALC7xx variants - Introduce soundwire codec address in soundwire chip.h to calculate device address for acpi table based on overridetree. - Update devicetree and Kconfig to use common config. BUG=b:368495490 TEST=build coreboot image and boot on Intel RVP board. Disassemble SSDT and confirm ACPI entries are correct for alc7xx device. Change-Id: I5953d0fcb7b15368888901f88c5616757ac42877 Signed-off-by: Varun Upadhyay <varun.upadhyay(a)intel.com> Signed-off-by: Naveen M <naveen.m(a)intel.com> --- M src/drivers/soundwire/alc711/alc711.c M src/drivers/soundwire/alc711/chip.h M src/mainboard/google/fatcat/Kconfig M src/mainboard/google/fatcat/variants/fatcat/overridetree.cb M src/mainboard/intel/adlrvp/Kconfig M src/mainboard/intel/adlrvp/devicetree.cb M src/mainboard/intel/adlrvp/devicetree_m.cb M src/mainboard/intel/adlrvp/devicetree_n.cb M src/mainboard/intel/mtlrvp/Kconfig M src/mainboard/intel/mtlrvp/variants/baseboard/mtlrvp_p/devicetree.cb 10 files changed, 33 insertions(+), 26 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/85282/10 -- To view, visit https://review.coreboot.org/c/coreboot/+/85282?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I5953d0fcb7b15368888901f88c5616757ac42877 Gerrit-Change-Number: 85282 Gerrit-PatchSet: 10 Gerrit-Owner: Varun Upadhyay <varun.upadhyay(a)intel.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Naveen M <naveen.m(a)intel.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Naveen M <naveen.m(a)intel.com> Gerrit-Attention: Varun Upadhyay <varun.upadhyay(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com>

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[M] Change in coreboot[main]: cpu/x86/mp_init: Add code to restart APs
by Michał Żygowski (Code Review) 04 Dec '24

04 Dec '24

Attention is currently required from: Filip Lewiński, Jérémy Compostella, Krystian Hebel, Michał Kopeć, Michał Żygowski, Paul Menzel. Michał Żygowski has posted comments on this change by Filip Lewiński. ( https://review.coreboot.org/c/coreboot/+/82696?usp=email ) Change subject: cpu/x86/mp_init: Add code to restart APs ...................................................................... Patch Set 8: (1 comment) File src/cpu/x86/mp_init.c: https://review.coreboot.org/c/coreboot/+/82696/comment/f919b6f5_9f692480?us… : PS7, Line 1215: printk(BIOS_DEBUG, "%d/%d eventually checked in?\n", > Did it actually check in? We just got a delay then printed this, right? […] It is just the same as in mp_init function. -- To view, visit https://review.coreboot.org/c/coreboot/+/82696?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ief2a7629d3075de29b363d05330e3a76cef48971 Gerrit-Change-Number: 82696 Gerrit-PatchSet: 8 Gerrit-Owner: Filip Lewiński <filip.lewinski(a)3mdeb.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Reviewer: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: Michał Żygowski <miczyg94(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: coreboot org <coreboot.org(a)gmail.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Filip Lewiński <filip.lewinski(a)3mdeb.com> Gerrit-Attention: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Michał Żygowski <miczyg94(a)gmail.com> Gerrit-Attention: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Comment-Date: Wed, 04 Dec 2024 12:34:19 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: coreboot org <coreboot.org(a)gmail.com>

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[S] Change in coreboot[main]: drivers/soundwire/alc711: Add common Kconfig for ALC7xx soundwire codecs
by Subrata Banik (Code Review) 04 Dec '24

04 Dec '24

Attention is currently required from: Karthik Ramasubramanian, Naveen M, Paul Menzel, Pranava Y N, Varun Upadhyay. Subrata Banik has posted comments on this change by Varun Upadhyay. ( https://review.coreboot.org/c/coreboot/+/85282?usp=email ) Change subject: drivers/soundwire/alc711: Add common Kconfig for ALC7xx soundwire codecs ...................................................................... Patch Set 9: (1 comment) File src/drivers/soundwire/alc711/alc711.c: https://review.coreboot.org/c/coreboot/+/85282/comment/11685872_d0796753?us… : PS9, Line 111: acpigen_write_ADR_soundwire_device(&config->alc711_address); > Currently there is only adlrvp and mtlrvp using ALC711. i have created separate CL for devicetree for both cases. unless u combine all Cls into this one, it will break the existing behavior is my concern. Atleast you need to combine ADLRVP and MTLRVP changes as part of this CL. -- To view, visit https://review.coreboot.org/c/coreboot/+/85282?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I5953d0fcb7b15368888901f88c5616757ac42877 Gerrit-Change-Number: 85282 Gerrit-PatchSet: 9 Gerrit-Owner: Varun Upadhyay <varun.upadhyay(a)intel.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Naveen M <naveen.m(a)intel.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Naveen M <naveen.m(a)intel.com> Gerrit-Attention: Varun Upadhyay <varun.upadhyay(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Comment-Date: Wed, 04 Dec 2024 12:26:41 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Varun Upadhyay <varun.upadhyay(a)intel.com>

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[S] Change in coreboot[main]: drivers/soundwire/alc711: Add common Kconfig for ALC7xx soundwire codecs
by Varun Upadhyay (Code Review) 04 Dec '24

04 Dec '24

Attention is currently required from: Karthik Ramasubramanian, Naveen M, Paul Menzel, Pranava Y N, Subrata Banik. Varun Upadhyay has posted comments on this change by Varun Upadhyay. ( https://review.coreboot.org/c/coreboot/+/85282?usp=email ) Change subject: drivers/soundwire/alc711: Add common Kconfig for ALC7xx soundwire codecs ...................................................................... Patch Set 9: (1 comment) File src/drivers/soundwire/alc711/alc711.c: https://review.coreboot.org/c/coreboot/+/85282/comment/1a0e53e8_7074e196?us… : PS9, Line 111: acpigen_write_ADR_soundwire_device(&config->alc711_address); > we are changing the behavior of the existing platform by not overriding the `version`. […] Currently there is only adlrvp and mtlrvp using ALC711. i have created separate CL for devicetree for both cases. -- To view, visit https://review.coreboot.org/c/coreboot/+/85282?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I5953d0fcb7b15368888901f88c5616757ac42877 Gerrit-Change-Number: 85282 Gerrit-PatchSet: 9 Gerrit-Owner: Varun Upadhyay <varun.upadhyay(a)intel.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Naveen M <naveen.m(a)intel.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Naveen M <naveen.m(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Comment-Date: Wed, 04 Dec 2024 12:12:36 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com>

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[XL] Change in coreboot[main]: soc/mediatek/mt8196: Add PMIF and PMIC driver support
by Yidi Lin (Code Review) 04 Dec '24

04 Dec '24

Attention is currently required from: Hung-Te Lin, Jarried Lin, Paul Menzel, Yu-Ping Wu. Yidi Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/85126?usp=email ) Change subject: soc/mediatek/mt8196: Add PMIF and PMIC driver support ...................................................................... Patch Set 14: (1 comment) File src/soc/mediatek/mt8196/pmif_spmi.c: https://review.coreboot.org/c/coreboot/+/85126/comment/87207f0f_9e793842?us… : PS14, Line 164: write32p(SPMI_SCL_OFFSET4_ADDR, 0x100); : write32p(SPMI_SCL_OFFSET8_ADDR, 0xC0); : write32p(SPMI_SCL_OFFSET4_ADDR, 0x800); : write32p(SPMI_SCL_OFFSET8_ADDR, 0x600); : /* SPMI_P 14mA */ : write32p(SPMI_SCL_OFFSET4_ADDR, 0x6000); : write32p(SPMI_SCL_OFFSET8_ADDR, 0x1000); : write32p(SPMI_SCL_OFFSET4_ADDR, 0x30000); : write32p(SPMI_SCL_OFFSET8_ADDR, 0x8000); What about ``` gpio_set_driving(GPIO(SPMI_M_SCL), GPIO_DRV_10_MA); gpio_set_driving(GPIO(SPMI_M_SDA), GPIO_DRV_10_MA); gpio_set_driving(GPIO(SPMI_P_SCL), GPIO_DRV_14_MA); gpio_set_driving(GPIO(SPMI_P_SDA), GPIO_DRV_14_MA); ``` I think they should be identical. You can update the address `IOCFG_LM2_BASE` to verify the change. (0x4 is the set register and 0x8 is the clear register according to GPIO register definition) -- To view, visit https://review.coreboot.org/c/coreboot/+/85126?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I232015f45735ee5278b09d0352410617a1565177 Gerrit-Change-Number: 85126 Gerrit-PatchSet: 14 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hope Wang <hope.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Wed, 04 Dec 2024 12:07:37 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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coreboot-gerrit December 2024