coreboot-gerrit December 2024

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[L] Change in coreboot[main]: soc/mediatek/mt8196: Add mtcmos init support
by Guangjie Song (Code Review) 05 Dec '24

05 Dec '24

Attention is currently required from: Elyes Haouas, Hung-Te Lin, Jarried Lin, Paul Menzel, Yidi Lin, Yu-Ping Wu. Guangjie Song has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/84497?usp=email ) Change subject: soc/mediatek/mt8196: Add mtcmos init support ...................................................................... Patch Set 36: (10 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/84497/comment/3609e958_3d18268c?us… : PS34, Line 9: Add mtcmos init code and APIs for controlling power domain. > Can you please elaborate. What is mtcmos? There is nothing in `Documentation/`. […] MTCMOS stands for Multi-Threshold CMOS. It is a power switch within the SoC that can control whether to supply power to the hardware module. https://review.coreboot.org/c/coreboot/+/84497/comment/6c4d904c_955187c6?us… : PS34, Line 11: driver init ok > How exactly? Some log message? mtcmos is basic function and system cannot bootup normally if driver init with error, so we can check the driver init ok or not by cheking system can bootup. File src/soc/mediatek/mt8196/mtcmos.c: https://review.coreboot.org/c/coreboot/+/84497/comment/b766f14c_c6061f3d?us… : PS26, Line 886: mtcmos_cb_register > @jarried.lin@mediatek.com @guangjie.song@mediatek.corp-partner.google. […] mminfra is another module with its owner driver and it is not suitable to be submitted together with mtcmos. File src/soc/mediatek/mt8196/mtcmos.c: https://review.coreboot.org/c/coreboot/+/84497/comment/984a5324_ae3efc0a?us… : PS34, Line 98: /* Already exist */ : #define ENODEV 19 /* No such device */ : #define EINVAL 22 /* Invalid argument */ : #define ETIMEDOUT 25 /* Connection timed out */ > No idea about the comments. They seem redundant from the macro names themselves. removed https://review.coreboot.org/c/coreboot/+/84497/comment/4c4aa440_c61c25d7?us… : PS34, Line 150: CB_TYPE_PRE_OFF_SRAM, : CB_TYPE_POST_ON_SRAM, > we don't need them in our case. Done https://review.coreboot.org/c/coreboot/+/84497/comment/544baffe_db7434e6?us… : PS34, Line 390: if (!strcmp(item->name, cb->name)) { > Using a string as the unique identifier is inefficient. […] add a cb filed in mtcmos_data or mtcmos_vote_data to save the callback function, and remove the logic https://review.coreboot.org/c/coreboot/+/84497/comment/04091e25_c8b91eb1?us… : PS34, Line 368: int mtcmos_cb_register(struct mtcmos_cb *cb) : { : struct mtcmos_cb *item = NULL; : bool exist = false; : : if (!cb) { : printk(BIOS_ERR, "node is NULL\n"); : return -EINVAL; : } : : if (!cb->name) { : printk(BIOS_ERR, "callback name NULL\n"); : return -EINVAL; : } : : if (!cb->pre_off && !cb->pre_on && !cb->post_on && !cb->post_off) { : printk(BIOS_ERR, "callback api NULL\n"); : return -EINVAL; : } : : /* add node to link list */ : list_for_each(item, mtcmos_cb_head, node) { : if (!strcmp(item->name, cb->name)) { : exist = true; : break; : } : } : if (exist) { : printk(BIOS_ERR, "ERR: %s exist\n", cb->name); : return -EEXIST; : } : : list_insert_after(&cb->node, &mtcmos_cb_head); : return 0; : } : : static int mtcmos_callback(u32 id, enum mtcmos_cb_type type) : { : struct mtcmos_cb *cb; : int ret = 0; : : list_for_each(cb, mtcmos_cb_head, node) { : if (cb->id == id) { : switch (type) { : case CB_TYPE_PRE_ON: : if (cb->pre_on) : ret = cb->pre_on(); : break; : case CB_TYPE_POST_ON: : if (cb->post_on) : ret = cb->post_on(); : break; : case CB_TYPE_PRE_OFF: : if (cb->pre_off) : ret = cb->pre_off(); : break; : case CB_TYPE_POST_OFF: : if (cb->post_off) : ret = cb->post_off(); : break; : case CB_TYPE_POST_ON_SRAM: : if (cb->post_on_sram) : ret = cb->post_on_sram(); : break; : case CB_TYPE_PRE_OFF_SRAM: : if (cb->pre_off_sram) : ret = cb->pre_off_sram(); : break; : default: : printk(BIOS_ERR, "%s(%u, %d) invalid type\n", __func__, id, type); : return -EINVAL; : } : : if (ret) : break; : } : } : : if (ret) : printk(BIOS_ERR, "%s(%u, %d) failed(%d)\n", __func__, id, type, ret); : : return ret; : } : : static inline int mtcmos_pre_on_callback(u32 id) : { : return mtcmos_callback(id, CB_TYPE_PRE_ON); : } : : static inline int mtcmos_pre_off_callback(u32 id) : { : return mtcmos_callback(id, CB_TYPE_PRE_OFF); : } : : static inline int mtcmos_post_on_callback(u32 id) : { : return mtcmos_callback(id, CB_TYPE_POST_ON); : } : : static inline int mtcmos_post_off_callback(u32 id) : { : return mtcmos_callback(id, CB_TYPE_POST_OFF); : } : : static inline int mtcmos_pre_off_sram_callback(u32 id) : { : return mtcmos_callback(id, CB_TYPE_PRE_OFF_SRAM); : } : : static inline int mtcmos_post_on_sram_callback(u32 id) : { : return mtcmos_callback(id, CB_TYPE_POST_ON_SRAM); : } > I don't think it is worth to add such complex logic to register the callback for only for `4` types […] Done https://review.coreboot.org/c/coreboot/+/84497/comment/6b0e1e85_97a7c850?us… : PS34, Line 836: mtcmos_ctrl(MTCMOS_ID_MM_INFRA_AO, MTCMOS_POWER_ON); : mtcmos_ctrl(MTCMOS_ID_MM_INFRA0, MTCMOS_POWER_ON); : mtcmos_ctrl(MTCMOS_ID_MM_INFRA1, MTCMOS_POWER_ON); : : mtcmos_ctrl(MTCMOS_ID_DISP_VCORE, MTCMOS_POWER_ON); > So, the whole callback code is only for these 4 `mtcmos_ctrl` calls? If there are no other calls tha […] add a cb filed in mtcmos_data or mtcmos_vote_data to save the callback function, the logic for calling callback is not need change. File src/soc/mediatek/mt8196/mtcmos.c: https://review.coreboot.org/c/coreboot/+/84497/comment/65758351_797b08c0?us… : PS35, Line 7: include <assert.h> : #include <console/console.h> : #include <delay.h> : #include <soc/addressmap.h> : #include <soc/mtcmos.h> : #include <soc/pll.h> : #include <soc/spm_mtcmos.h> : #include <string.h> : #include <timer.h> > I'm not sure if you are using all those headers. remove unused assert.h & string.h https://review.coreboot.org/c/coreboot/+/84497/comment/b7991548_b12a42b5?us… : PS35, Line 353: int > maybe "enum cb_err" ? no need mtcmos_cb_register is removed -- To view, visit https://review.coreboot.org/c/coreboot/+/84497?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I44f2bb10453377a8412e80ac0c100760ebfbaff9 Gerrit-Change-Number: 84497 Gerrit-PatchSet: 36 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-CC: Guangjie Song <guangjie.song(a)mediatek.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Comment-Date: Thu, 05 Dec 2024 03:01:13 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Comment-In-Reply-To: Guangjie Song <guangjie.song(a)mediatek.corp-partner.google.com> Comment-In-Reply-To: Yidi Lin <yidilin(a)google.com> Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com> Comment-In-Reply-To: Elyes Haouas <ehaouas(a)noos.fr>

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[L] Change in coreboot[main]: soc/mediatek/mt8196: Add mtcmos init support
by Jarried Lin (Code Review) 05 Dec '24

05 Dec '24

Attention is currently required from: Hung-Te Lin, Jarried Lin. Hello Guangjie Song, Hung-Te Lin, Yidi Lin, Yu-Ping Wu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/84497?usp=email to look at the new patch set (#36). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: soc/mediatek/mt8196: Add mtcmos init support ...................................................................... soc/mediatek/mt8196: Add mtcmos init support Add mtcmos init code and APIs for controlling power domain. TEST=build pass and driver init ok BUG=b:317009620 Signed-off-by: Guangjie Song <guangjie.song(a)mediatek.corp-partner.google.com> Change-Id: I44f2bb10453377a8412e80ac0c100760ebfbaff9 --- M src/soc/mediatek/mt8196/Makefile.mk M src/soc/mediatek/mt8196/bootblock.c M src/soc/mediatek/mt8196/include/soc/memlayout.ld A src/soc/mediatek/mt8196/include/soc/spm_mtcmos.h A src/soc/mediatek/mt8196/mtcmos.c 5 files changed, 845 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/84497/36 -- To view, visit https://review.coreboot.org/c/coreboot/+/84497?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I44f2bb10453377a8412e80ac0c100760ebfbaff9 Gerrit-Change-Number: 84497 Gerrit-PatchSet: 36 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-CC: Guangjie Song <guangjie.song(a)mediatek.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com>

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[XS] Change in coreboot[main]: soc/mediatek/mt8196: Set DRAMC_PARAM_HEADER_VERSION to 4
by Jarried Lin (Code Review) 05 Dec '24

05 Dec '24

Attention is currently required from: Hung-Te Lin, Yidi Lin, Yu-Ping Wu. Hello Crystal Guo, Hung-Te Lin, Yidi Lin, Yu-Ping Wu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85502?usp=email to look at the new patch set (#2). Change subject: soc/mediatek/mt8196: Set DRAMC_PARAM_HEADER_VERSION to 4 ...................................................................... soc/mediatek/mt8196: Set DRAMC_PARAM_HEADER_VERSION to 4 Set DRAMC_PARAM_HEADER_VERSION to 4 for aligning with DRAM blob. TEST=Bootup pass. BUG=b:317009620 Change-Id: I45c9ea97e3c015bab7145116e2074b44df5e955c Signed-off-by: Crystal Guo <crystal.guo(a)mediatek.corp-partner.google.com> --- M src/soc/mediatek/mt8196/include/soc/dramc_param.h 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/85502/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85502?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I45c9ea97e3c015bab7145116e2074b44df5e955c Gerrit-Change-Number: 85502 Gerrit-PatchSet: 2 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-CC: Crystal Guo <crystal.guo(a)mediatek.corp-partner.google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com>

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[XS] Change in blobs[main]: soc/mediatek/mt8196: Update DRAM blob to 0.4.0
by Crystal Guo (Code Review) 05 Dec '24

05 Dec '24

Attention is currently required from: Jarried Lin, Yidi Lin, Yu-Ping Wu. Crystal Guo has posted comments on this change by Crystal Guo. ( https://review.coreboot.org/c/blobs/+/85501?usp=email ) Change subject: soc/mediatek/mt8196: Update DRAM blob to 0.4.0 ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/c/blobs/+/85501?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: blobs Gerrit-Branch: main Gerrit-Change-Id: I2ac90c1b7272455a62cf3651de05589224842fea Gerrit-Change-Number: 85501 Gerrit-PatchSet: 2 Gerrit-Owner: Crystal Guo <crystal.guo(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Crystal Guo <crystal.guo(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Comment-Date: Thu, 05 Dec 2024 02:44:09 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: soc/mediatek/mt8196: Enable ARM Trusted Firmware integration
by Jarried Lin (Code Review) 05 Dec '24

05 Dec '24

Attention is currently required from: Hung-Te Lin, Yidi Lin, Yu-Ping Wu. Jarried Lin has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/85503?usp=email ) Change subject: soc/mediatek/mt8196: Enable ARM Trusted Firmware integration ...................................................................... soc/mediatek/mt8196: Enable ARM Trusted Firmware integration Enable configuration to build with MT8196 arm-trusted-firmware drivers. TEST=build pass BUG=b:317009620 Change-Id: I516e648f78b74cc5ea82f52084d5b9dbaeb6f7f0 Signed-off-by: Jarried Lin <jarried.lin(a)mediatek.corp-partner.google.com> --- M src/soc/mediatek/mt8196/Kconfig M src/soc/mediatek/mt8196/Makefile.mk 2 files changed, 4 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/85503/1 diff --git a/src/soc/mediatek/mt8196/Kconfig b/src/soc/mediatek/mt8196/Kconfig index c934761..984e379 100644 --- a/src/soc/mediatek/mt8196/Kconfig +++ b/src/soc/mediatek/mt8196/Kconfig @@ -7,6 +7,7 @@ select ARCH_VERSTAGE_ARMV8_64 select ARCH_ROMSTAGE_ARMV8_64 select ARCH_RAMSTAGE_ARMV8_64 + select ARM64_USE_ARM_TRUSTED_FIRMWARE select HAVE_UART_SPECIAL select CACHE_MRC_SETTINGS select MEDIATEK_DRAM_BLOB_FAST_INIT diff --git a/src/soc/mediatek/mt8196/Makefile.mk b/src/soc/mediatek/mt8196/Makefile.mk index 9d00a2e..3f76811 100644 --- a/src/soc/mediatek/mt8196/Makefile.mk +++ b/src/soc/mediatek/mt8196/Makefile.mk @@ -29,6 +29,7 @@ romstage-y += ../common/memory_test.c romstage-y += ../common/mmu_operations.c ../common/mmu_cmops.c +ramstage-$(CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE) += ../common/bl31.c ramstage-y += ../common/dpm_v2.c ramstage-y += dramc_info.c ramstage-y += ../common/early_init.c @@ -40,6 +41,8 @@ ramstage-y += soc.c ramstage-y += ../common/usb.c usb.c +BL31_MAKEARGS += PLAT=mt8196 + CPPFLAGS_common += -Isrc/soc/mediatek/mt8196/include CPPFLAGS_common += -Isrc/soc/mediatek/common/include -- To view, visit https://review.coreboot.org/c/coreboot/+/85503?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I516e648f78b74cc5ea82f52084d5b9dbaeb6f7f0 Gerrit-Change-Number: 85503 Gerrit-PatchSet: 1 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com>

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[XS] Change in coreboot[main]: soc/mediatek/mt8196: Set DRAMC_PARAM_HEADER_VERSION to 4
by Jarried Lin (Code Review) 05 Dec '24

05 Dec '24

Attention is currently required from: Crystal Guo. Hello Crystal Guo, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/85502?usp=email to review the following change. Change subject: soc/mediatek/mt8196: Set DRAMC_PARAM_HEADER_VERSION to 4 ...................................................................... soc/mediatek/mt8196: Set DRAMC_PARAM_HEADER_VERSION to 4 Set DRAMC_PARAM_HEADER_VERSION to 4 for aligning with DRAM blob. Test=Bootup pass. BUG=b:317009620 Change-Id: I45c9ea97e3c015bab7145116e2074b44df5e955c Signed-off-by: Crystal Guo <crystal.guo(a)mediatek.corp-partner.google.com> --- M src/soc/mediatek/mt8196/include/soc/dramc_param.h 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/85502/1 diff --git a/src/soc/mediatek/mt8196/include/soc/dramc_param.h b/src/soc/mediatek/mt8196/include/soc/dramc_param.h index e74a5d5..13a4dff 100644 --- a/src/soc/mediatek/mt8196/include/soc/dramc_param.h +++ b/src/soc/mediatek/mt8196/include/soc/dramc_param.h @@ -13,7 +13,7 @@ #include <stdint.h> #include <sys/types.h> -#define DRAMC_PARAM_HEADER_VERSION 3 +#define DRAMC_PARAM_HEADER_VERSION 4 struct sdram_params { /* rank, cbt */ -- To view, visit https://review.coreboot.org/c/coreboot/+/85502?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I45c9ea97e3c015bab7145116e2074b44df5e955c Gerrit-Change-Number: 85502 Gerrit-PatchSet: 1 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Crystal Guo <crystal.guo(a)mediatek.corp-partner.google.com> Gerrit-Attention: Crystal Guo <crystal.guo(a)mediatek.corp-partner.google.com>

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[S] Change in coreboot[main]: mb/google/rex/var/kanix: Disable FP_MCU based on fw_config
by Dinesh Gehlot (Code Review) 05 Dec '24

05 Dec '24

Attention is currently required from: David Wu, Eran Mitrani, Jakub Czapiga, Subrata Banik, Tarun, Tyler Wang. Dinesh Gehlot has posted comments on this change by Tyler Wang. ( https://review.coreboot.org/c/coreboot/+/85365?usp=email ) Change subject: mb/google/rex/var/kanix: Disable FP_MCU based on fw_config ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85365?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I087f082c051bc3a97f2514dd121b279e27738022 Gerrit-Change-Number: 85365 Gerrit-PatchSet: 3 Gerrit-Owner: Tyler Wang <tyler.wang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Tyler Wang <tyler.wang(a)quanta.corp-partner.google.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Comment-Date: Thu, 05 Dec 2024 02:29:20 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: soc/intel/ptl: Populate SMBIOS Type 4 with unique serial number
by Eric Lai (Code Review) 05 Dec '24

05 Dec '24

Attention is currently required from: Kapil Porwal, Pranava Y N, Subrata Banik. Eric Lai has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/85456?usp=email ) Change subject: soc/intel/ptl: Populate SMBIOS Type 4 with unique serial number ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85456?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I38a0bb0e44c619393b8f058ae30fbf2f9719b724 Gerrit-Change-Number: 85456 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Comment-Date: Thu, 05 Dec 2024 02:15:58 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in blobs[main]: soc/mediatek/mt8196: Update DRAM blob to 0.4.0
by Crystal Guo (Code Review) 05 Dec '24

05 Dec '24

Crystal Guo has uploaded a new patch set (#2). ( https://review.coreboot.org/c/blobs/+/85501?usp=email ) Change subject: soc/mediatek/mt8196: Update DRAM blob to 0.4.0 ...................................................................... soc/mediatek/mt8196: Update DRAM blob to 0.4.0 1. Sync dramk to MediaTek's preloader version 20241121. 2. Add SLC support. BUG=b:317009620 TEST=Bootup pass. Change-Id: I2ac90c1b7272455a62cf3651de05589224842fea Signed-off-by: Crystal Guo <crystal.guo(a)mediatek.corp-partner.google.com> --- M soc/mediatek/mt8196/dram.elf M soc/mediatek/mt8196/dram.elf.md5 M soc/mediatek/mt8196/dram_release_notes.txt 3 files changed, 6 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/blobs refs/changes/01/85501/2 -- To view, visit https://review.coreboot.org/c/blobs/+/85501?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: blobs Gerrit-Branch: main Gerrit-Change-Id: I2ac90c1b7272455a62cf3651de05589224842fea Gerrit-Change-Number: 85501 Gerrit-PatchSet: 2 Gerrit-Owner: Crystal Guo <crystal.guo(a)mediatek.corp-partner.google.com>

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[XS] Change in blobs[main]: soc/mediatek/mt8196: Update DRAM blob to 0.4.0
by Crystal Guo (Code Review) 05 Dec '24

05 Dec '24

Crystal Guo has uploaded this change for review. ( https://review.coreboot.org/c/blobs/+/85501?usp=email ) Change subject: soc/mediatek/mt8196: Update DRAM blob to 0.4.0 ...................................................................... soc/mediatek/mt8196: Update DRAM blob to 0.4.0 1. Sync dramk to MediaTek's preloader version 20241121. 2. Add SLC support. BUG=b:317009620 TEST=Bootup pass. Change-Id: I2ac90c1b7272455a62cf3651de05589224842fea Signed-off-by: Crystal Guo <crystal.guo(a)mediatek.corp-partner.google.com> --- M soc/mediatek/mt8196/dram.elf M soc/mediatek/mt8196/dram.elf.md5 M soc/mediatek/mt8196/dram_release_notes.txt 3 files changed, 6 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/blobs refs/changes/01/85501/1 diff --git a/soc/mediatek/mt8196/dram.elf b/soc/mediatek/mt8196/dram.elf index 3faa1cf..a39b8f9 100644 --- a/soc/mediatek/mt8196/dram.elf +++ b/soc/mediatek/mt8196/dram.elf Binary files differ diff --git a/soc/mediatek/mt8196/dram.elf.md5 b/soc/mediatek/mt8196/dram.elf.md5 index cb044a4..c62a77b 100644 --- a/soc/mediatek/mt8196/dram.elf.md5 +++ b/soc/mediatek/mt8196/dram.elf.md5 @@ -1 +1 @@ -f28bedae7529a3be011fb0a6bb478c94 *dram.elf +eb5a6b2b584df19a461297b35ca69b1a *dram.elf diff --git a/soc/mediatek/mt8196/dram_release_notes.txt b/soc/mediatek/mt8196/dram_release_notes.txt index 7f6b7a2..979a68b 100644 --- a/soc/mediatek/mt8196/dram_release_notes.txt +++ b/soc/mediatek/mt8196/dram_release_notes.txt @@ -2,3 +2,8 @@ 1. An official build from ChromeOS version 16093.0.0. Protocol (params header) version: 3 + +# 0.4.0 + +1. An official build from ChromeOS version 16117.0.0. + Protocol (params header) version: 4 \ No newline at end of file -- To view, visit https://review.coreboot.org/c/blobs/+/85501?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: blobs Gerrit-Branch: main Gerrit-Change-Id: I2ac90c1b7272455a62cf3651de05589224842fea Gerrit-Change-Number: 85501 Gerrit-PatchSet: 1 Gerrit-Owner: Crystal Guo <crystal.guo(a)mediatek.corp-partner.google.com>

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coreboot-gerrit December 2024