coreboot-gerrit December 2024

coreboot-gerrit@coreboot.org

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[XL] Change in coreboot[main]: util/intelp2m: Rework platform packages
by Maxim (Code Review) 10 Dec '24

10 Dec '24

Attention is currently required from: David Hendricks. Maxim has posted comments on this change by Maxim. ( https://review.coreboot.org/c/coreboot/+/71167?usp=email ) Change subject: util/intelp2m: Rework platform packages ...................................................................... Patch Set 12: (1 comment) Patchset: PS12: > Hi @max.senia.poliak@gmail. […] Hi David, Thank you for your interest in this work. Well, it might take me a while - need to make changes for new platforms added after this patch. But first, finish with the tests -- To view, visit https://review.coreboot.org/c/coreboot/+/71167?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I2e0aa56efa2430ac6524c6977f8b6fd13113edf9 Gerrit-Change-Number: 71167 Gerrit-PatchSet: 12 Gerrit-Owner: Maxim <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Alicja Michalska <ahplka19(a)gmail.com> Gerrit-CC: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Attention: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Comment-Date: Tue, 10 Dec 2024 21:30:07 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: David Hendricks <david.hendricks(a)gmail.com>

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[S] Change in coreboot[main]: mb/google/fatcat: Limit Power Limit when battery is missing
by Jérémy Compostella (Code Review) 10 Dec '24

10 Dec '24

Attention is currently required from: Jamie Ryu, Paul Menzel, Subrata Banik. Hello Jamie Ryu, Pranava Y N, Subrata Banik, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85146?usp=email to look at the new patch set (#17). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: mb/google/fatcat: Limit Power Limit when battery is missing ...................................................................... mb/google/fatcat: Limit Power Limit when battery is missing Ensure the board can boot by limiting the power limits if the battery is missing. This addresses the factory use case. BUG=b:377798581 TEST=See power limit override log message when the battery is missing on fatcat board Change-Id: I5d71e9edde0ecbd7aaf316cd754a6ebcff9da77e Signed-off-by: Jeremy Compostella <jeremy.compostella(a)intel.com> --- M src/mainboard/google/fatcat/Kconfig M src/mainboard/google/fatcat/variants/baseboard/fatcat/Makefile.mk A src/mainboard/google/fatcat/variants/baseboard/fatcat/ramstage.c 3 files changed, 30 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/85146/17 -- To view, visit https://review.coreboot.org/c/coreboot/+/85146?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I5d71e9edde0ecbd7aaf316cd754a6ebcff9da77e Gerrit-Change-Number: 85146 Gerrit-PatchSet: 17 Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org>

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[S] Change in coreboot[main]: intel/common/block: Program the right power_limits_config entry
by Bora Guvendik (Code Review) 10 Dec '24

10 Dec '24

Attention is currently required from: Jamie Ryu, Jérémy Compostella, Subrata Banik. Bora Guvendik has posted comments on this change by Jérémy Compostella. ( https://review.coreboot.org/c/coreboot/+/85244?usp=email ) Change subject: intel/common/block: Program the right power_limits_config entry ...................................................................... Patch Set 13: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85244?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I32de8a24a2b5aee3eb5a6eee2d1d91e203085e65 Gerrit-Change-Number: 85244 Gerrit-PatchSet: 13 Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Comment-Date: Tue, 10 Dec 2024 18:17:28 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: intel/common/block: Program the right power_limits_config entry
by Jérémy Compostella (Code Review) 10 Dec '24

10 Dec '24

Attention is currently required from: Jamie Ryu, Subrata Banik. Jérémy Compostella has posted comments on this change by Jérémy Compostella. ( https://review.coreboot.org/c/coreboot/+/85244?usp=email ) Change subject: intel/common/block: Program the right power_limits_config entry ...................................................................... Patch Set 13: (1 comment) File src/mainboard/intel/mtlrvp/variants/baseboard/mtlrvp_p/ramstage.c: https://review.coreboot.org/c/coreboot/+/85244/comment/b41fec79_f1dab671?us… : PS12, Line 2: > please add `#include <chip. […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/85244?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I32de8a24a2b5aee3eb5a6eee2d1d91e203085e65 Gerrit-Change-Number: 85244 Gerrit-PatchSet: 13 Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Comment-Date: Tue, 10 Dec 2024 17:52:24 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com>

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[M] Change in coreboot[main]: soc/amd/common/acpi: Add SPI flash controller
by Felix Held (Code Review) 10 Dec '24

10 Dec '24

Attention is currently required from: Ana Carolina Cabral, Fred Reitberger, Jason Glenesk, Matt DeVillier, Paul Menzel. Felix Held has posted comments on this change by Ana Carolina Cabral. ( https://review.coreboot.org/c/coreboot/+/84918?usp=email ) Change subject: soc/amd/common/acpi: Add SPI flash controller ...................................................................... Patch Set 5: (5 comments) File src/soc/amd/common/acpi/spi.asl: https://review.coreboot.org/c/coreboot/+/84918/comment/bbf184c4_76279e90?us… : PS5, Line 12: should be tabs for indentation https://review.coreboot.org/c/coreboot/+/84918/comment/62282694_040fb5ab?us… : PS5, Line 33: 0xFEC10000 SPI_BASE_ADDRESS https://review.coreboot.org/c/coreboot/+/84918/comment/84862fcc_6967c25a?us… : PS5, Line 46: store please use asl2 syntax instead of the old asl1 syntax. usage of the asl1 syntax has been deprecated in coreboot and the asl2 syntax is easier to read https://review.coreboot.org/c/coreboot/+/84918/comment/afac5f68_5ee3a086?us… : PS5, Line 55: RAR2 seems that that definition is missing; what is that supposed to do? https://review.coreboot.org/c/coreboot/+/84918/comment/9c59166d_1e454263?us… : PS5, Line 57: store (2, ASCE) switching to use SPI_CS3_L when acquiring the spi controller semaphore and switching back to SPI_CS1_L when releasing it seems both questionable in general and board-specific to me -- To view, visit https://review.coreboot.org/c/coreboot/+/84918?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I0f2c1e3351671ad47fbe5c890e4f99d2e19dbfbf Gerrit-Change-Number: 84918 Gerrit-PatchSet: 5 Gerrit-Owner: Ana Carolina Cabral Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Ana Carolina Cabral Gerrit-Comment-Date: Tue, 10 Dec 2024 17:23:25 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: mb/google/fatcat: config GPP_F23 as ISH gpio pin
by Li1 Feng (Code Review) 10 Dec '24

10 Dec '24

Attention is currently required from: Jérémy Compostella, Paul Menzel, Pranava Y N, Subrata Banik. Li1 Feng has posted comments on this change by Li1 Feng. ( https://review.coreboot.org/c/coreboot/+/85464?usp=email ) Change subject: mb/google/fatcat: config GPP_F23 as ISH gpio pin ...................................................................... Patch Set 5: (2 comments) Patchset: PS4: > Can we handle this using FW_CONFIG ? Done Commit Message: https://review.coreboot.org/c/coreboot/+/85464/comment/505570e9_fcbfa1eb?us… : PS4, Line 9: The GPP_F23/ISH_GP_9A pin receives the lid open/close signal from : SMC_LID. This pin is not utilized in the AP firmware stack; however, the : ISH firmware requires this signal for its tablet mode support. : Therefore, we configure this pin as an ISH GPIO. > The right side looks a little unaligned. It’d be great if you re-flowed. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/85464?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I19a4d6967acf96aefe2f38d628f898811d8a6e6d Gerrit-Change-Number: 85464 Gerrit-PatchSet: 5 Gerrit-Owner: Li1 Feng <li1.feng(a)intel.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Comment-Date: Tue, 10 Dec 2024 17:19:04 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org>

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[XS] Change in coreboot[main]: mb/google/fatcat: config GPP_F23 as ISH gpio pin
by Li1 Feng (Code Review) 10 Dec '24

10 Dec '24

Attention is currently required from: Jérémy Compostella, Li1 Feng, Pranava Y N. Hello Jérémy Compostella, Pranava Y N, Subrata Banik, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85464?usp=email to look at the new patch set (#5). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: mb/google/fatcat: config GPP_F23 as ISH gpio pin ...................................................................... mb/google/fatcat: config GPP_F23 as ISH gpio pin The GPP_F23/ISH_GP_9A pin receives the lid open/close signal from SMC_LID. This pin is not utilized in the AP firmware stack; however the ISH firmware requires this signal for its tablet mode support. Therefore, we configure this pin as an ISH GPIO. BUG=b:370984186 TEST=Build and flash CB; run ISH main firmware; read this pin and verified it returned the correct value. fatcat-rev257 ~ # ectool --name=cros_ish gpioget lid_open GPIO lid_open = 1 Change-Id: I19a4d6967acf96aefe2f38d628f898811d8a6e6d Signed-off-by: Li Feng <li1.feng(a)intel.com> --- M src/mainboard/google/fatcat/variants/fatcat/fw_config.c M src/mainboard/google/fatcat/variants/fatcat/gpio.c 2 files changed, 4 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/85464/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/85464?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I19a4d6967acf96aefe2f38d628f898811d8a6e6d Gerrit-Change-Number: 85464 Gerrit-PatchSet: 5 Gerrit-Owner: Li1 Feng <li1.feng(a)intel.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Li1 Feng <li1.feng(a)intel.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com>

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[S] Change in coreboot[main]: mb/google/fatcat: Limit Power Limit when battery is missing
by Jérémy Compostella (Code Review) 10 Dec '24

10 Dec '24

Attention is currently required from: Jamie Ryu, Paul Menzel, Subrata Banik. Jérémy Compostella has posted comments on this change by Jérémy Compostella. ( https://review.coreboot.org/c/coreboot/+/85146?usp=email ) Change subject: mb/google/fatcat: Limit Power Limit when battery is missing ...................................................................... Patch Set 15: (2 comments) File src/mainboard/google/fatcat/variants/baseboard/fatcat/ramstage.c: https://review.coreboot.org/c/coreboot/+/85146/comment/b8a3d96b_402251d1?us… : PS14, Line 25: /* If battery is not present, limit the power to the power optimized configuration. */ > Could be omitted as the code below is (luckily) very readable/understandable. Done https://review.coreboot.org/c/coreboot/+/85146/comment/4aa2b2a8_860451b1?us… : PS14, Line 26: if (!google_chromeec_is_battery_present()) > do we need `if (CONFIG(EC_GOOGLE_CHROMEEC)) {` check as well ? […] `EC_GOOGLE_CHROMEEC` is part of `BOARD_GOOGLE_FATCAT_COMMON` which is selected by `BOARD_GOOGLE_BASEBOARD_FATCAT` so I assumed that this test should be unnecessary. -- To view, visit https://review.coreboot.org/c/coreboot/+/85146?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I5d71e9edde0ecbd7aaf316cd754a6ebcff9da77e Gerrit-Change-Number: 85146 Gerrit-PatchSet: 15 Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Tue, 10 Dec 2024 17:05:34 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org>

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[S] Change in coreboot[main]: mb/google/fatcat: Limit Power Limit when battery is missing
by Jérémy Compostella (Code Review) 10 Dec '24

10 Dec '24

Attention is currently required from: Jamie Ryu, Jérémy Compostella. Hello Jamie Ryu, Pranava Y N, Subrata Banik, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85146?usp=email to look at the new patch set (#16). The following approvals got outdated and were removed: Code-Review+2 by Jamie Ryu Change subject: mb/google/fatcat: Limit Power Limit when battery is missing ...................................................................... mb/google/fatcat: Limit Power Limit when battery is missing Ensure the board can boot by limiting the power limits if the battery is missing. This addresses the factory use case. BUG=b:377798581 TEST=See power limit override log message when the battery is missing on fatcat board Change-Id: I5d71e9edde0ecbd7aaf316cd754a6ebcff9da77e Signed-off-by: Jeremy Compostella <jeremy.compostella(a)intel.com> --- M src/mainboard/google/fatcat/Kconfig M src/mainboard/google/fatcat/variants/baseboard/fatcat/Makefile.mk A src/mainboard/google/fatcat/variants/baseboard/fatcat/ramstage.c 3 files changed, 30 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/85146/16 -- To view, visit https://review.coreboot.org/c/coreboot/+/85146?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I5d71e9edde0ecbd7aaf316cd754a6ebcff9da77e Gerrit-Change-Number: 85146 Gerrit-PatchSet: 16 Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com>

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[S] Change in coreboot[main]: intel/common/block: Program the right power_limits_config entry
by Jérémy Compostella (Code Review) 10 Dec '24

10 Dec '24

Attention is currently required from: Jamie Ryu, Jérémy Compostella. Hello Dinesh Gehlot, Eran Mitrani, Jakub Czapiga, Jamie Ryu, Kapil Porwal, Subrata Banik, Tarun, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85244?usp=email to look at the new patch set (#13). The following approvals got outdated and were removed: Code-Review+2 by Jamie Ryu Change subject: intel/common/block: Program the right power_limits_config entry ...................................................................... intel/common/block: Program the right power_limits_config entry When variant_update_cpu_power_limits() programs PL4, it systematically sets the first entry of the power_limits_config SoC chip data structure. This approach is problematic because the current SoC SKU may align with a different data structure entry, introducing inconsistencies. This commit introduces the power_limits_index field to the cpu_tdp_power_limits data structure. This field specifies the specific power limits entry that should be updated. All data structures utilized by this function are updated accordingly. BUG=b:380408956 TEST=Able to retrieve collect 28W power_limit. Change-Id: I32de8a24a2b5aee3eb5a6eee2d1d91e203085e65 Signed-off-by: Subrata Banik <subratabanik(a)google.com> Signed-off-by: Jeremy Compostella <jeremy.compostella(a)intel.com> --- M src/mainboard/google/rex/variants/baseboard/ovis/ramstage.c M src/mainboard/google/rex/variants/baseboard/rex/ramstage.c M src/mainboard/google/rex/variants/deku/ramstage.c M src/mainboard/google/rex/variants/screebo/variant.c M src/mainboard/intel/mtlrvp/variants/baseboard/mtlrvp_p/ramstage.c M src/soc/intel/common/block/include/intelblocks/power_limit.h M src/soc/intel/common/block/power_limit/power_limit.c 7 files changed, 15 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/44/85244/13 -- To view, visit https://review.coreboot.org/c/coreboot/+/85244?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I32de8a24a2b5aee3eb5a6eee2d1d91e203085e65 Gerrit-Change-Number: 85244 Gerrit-PatchSet: 13 Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com>

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