Attention is currently required from: Dinesh Gehlot, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Paul Menzel, Subrata Banik.
Hello Dinesh Gehlot, Eric Lai, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Subrata Banik, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/85363?usp=email
to look at the new patch set (#7).
Change subject: mb/google/nissa/var/glassway: Modify touch screen ILIT2901 sequence
......................................................................
mb/google/nissa/var/glassway: Modify touch screen ILIT2901 sequence
After modified the settings, it could be met the time sequence for
this ILIT2901 touchscreen specification via our EE's measurements.
1. ILIT2901 Specification: ILI2901A-A202 Data Sheet_V1.2_20240128.pdf.
2. Double delay RST time to 12ms.
3. F/W calibration delay time is about 700ms after RST high.
The tuned firmware version is 005c_0700.0000.0000.0006.bin.
BUG=b:375986645
BRANCH=firmware-nissa-15217.B
TEST=1. emerge-nissa coreboot chromeos-bootimage
2. Verified the sequence correctly by EE.
Change-Id: I15e30ee72541b4f12b3ec4ea509cb09dc29659ca
Signed-off-by: Daniel Peng <Daniel_Peng(a)pegatron.corp-partner.google.com>
---
M src/mainboard/google/brya/variants/glassway/overridetree.cb
1 file changed, 6 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/85363/7
--
To view, visit https://review.coreboot.org/c/coreboot/+/85363?usp=email
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email
Gerrit-MessageType: newpatchset
Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: I15e30ee72541b4f12b3ec4ea509cb09dc29659ca
Gerrit-Change-Number: 85363
Gerrit-PatchSet: 7
Gerrit-Owner: Daniel Peng <daniel_peng(a)pegatron.corp-partner.google.com>
Gerrit-Reviewer: Daniel Peng <daniel_peng(a)pegatron.corp-partner.google.com>
Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com>
Gerrit-Reviewer: Eric Lai <ericllai(a)google.com>
Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com>
Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com>
Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org>
Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org>
Gerrit-Attention: Jayvik Desai <jayvik(a)google.com>
Gerrit-Attention: Subrata Banik <subratabanik(a)google.com>
Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org>
Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com>
Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com>
Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org>
Attention is currently required from: Hung-Te Lin, Jarried Lin, Yidi Lin.
Hello Hope Wang, Hung-Te Lin, Yidi Lin, Yu-Ping Wu, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/85128?usp=email
to look at the new patch set (#29).
The following approvals got outdated and were removed:
Code-Review+2 by Yidi Lin, Verified+1 by build bot (Jenkins)
Change subject: soc/mediatek/mt8196: Add PMIC MT6363 ADC driver
......................................................................
soc/mediatek/mt8196: Add PMIC MT6363 ADC driver
Add MT6363 AUXADC driver support, which is essential for handling the
Analog-to-Digital Conversion (ADC) functionalities in the MT8196 SoC.
TEST=build pass
BUG=b:317009620
Change-Id: Ice3c286cd207e445392d5f0126a07ce4f40dcf8a
Signed-off-by: Hope Wang <hope.wang(a)mediatek.corp-partner.google.com>
---
A src/soc/mediatek/common/include/soc/mt6363_sdmadc.h
A src/soc/mediatek/common/mt6363_sdmadc.c
M src/soc/mediatek/mt8196/Makefile.mk
3 files changed, 203 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/85128/29
--
To view, visit https://review.coreboot.org/c/coreboot/+/85128?usp=email
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email
Gerrit-MessageType: newpatchset
Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: Ice3c286cd207e445392d5f0126a07ce4f40dcf8a
Gerrit-Change-Number: 85128
Gerrit-PatchSet: 29
Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com>
Gerrit-Reviewer: Hope Wang <hope.wang(a)mediatek.corp-partner.google.com>
Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org>
Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com>
Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org>
Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org>
Gerrit-Attention: Yidi Lin <yidilin(a)google.com>
Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com>
Attention is currently required from: Angel Pons, Christian Walter, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, Paul Menzel, Tim Chu, yuchi.chen(a)intel.com.
Shuo Liu has posted comments on this change by Shuo Liu. ( https://review.coreboot.org/c/coreboot/+/85153?usp=email )
Change subject: soc/intel/xeon_sp: Improve PCI INTx IRQ routing for Gen6
......................................................................
Patch Set 12:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/85153/comment/231cbfbb_e1001c47?us… :
PS11, Line 9: 1. Route IRQ for on-chip end-points only.
> Why?
Updated the commit message with additional info
--
To view, visit https://review.coreboot.org/c/coreboot/+/85153?usp=email
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email
Gerrit-MessageType: comment
Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: Ibeb7c8fb3432e5cb240ac3b09c19d2c361e4b45a
Gerrit-Change-Number: 85153
Gerrit-PatchSet: 12
Gerrit-Owner: Shuo Liu <shuo.liu(a)intel.com>
Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com>
Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com>
Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com>
Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com>
Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com>
Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com>
Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Reviewer: yuchi.chen(a)intel.com
Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org>
Gerrit-Attention: yuchi.chen(a)intel.com
Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com>
Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com>
Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com>
Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org>
Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com>
Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com>
Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com>
Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com>
Gerrit-Comment-Date: Wed, 11 Dec 2024 01:54:51 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org>
Attention is currently required from: Angel Pons, Christian Walter, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, Shuo Liu, Tim Chu, yuchi.chen(a)intel.com.
Hello Angel Pons, Christian Walter, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, Tim Chu, build bot (Jenkins), yuchi.chen(a)intel.com,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/85153?usp=email
to look at the new patch set (#12).
Change subject: soc/intel/xeon_sp: Improve PCI INTx IRQ routing for Gen6
......................................................................
soc/intel/xeon_sp: Improve PCI INTx IRQ routing for Gen6
1. Route IRQ for on-chip end-points only (e.g. 00:1f.4
i801_smbus)
IRQ routing for devices under root ports needs additional
swizzle per decided by root port configurations, which will
postponed to later till there is actual usage.
2. Route IRQ based on FSP programmed end-point device ID <->
PIRQ mapping.
TESTED=Build and boot on intel/avenuecity CRB
Change-Id: Ibeb7c8fb3432e5cb240ac3b09c19d2c361e4b45a
Signed-off-by: Shuo Liu <shuo.liu(a)intel.com>
---
M src/soc/intel/xeon_sp/include/soc/irq.h
M src/soc/intel/xeon_sp/lpc_gen6.c
2 files changed, 52 insertions(+), 7 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/85153/12
--
To view, visit https://review.coreboot.org/c/coreboot/+/85153?usp=email
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email
Gerrit-MessageType: newpatchset
Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: Ibeb7c8fb3432e5cb240ac3b09c19d2c361e4b45a
Gerrit-Change-Number: 85153
Gerrit-PatchSet: 12
Gerrit-Owner: Shuo Liu <shuo.liu(a)intel.com>
Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com>
Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com>
Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com>
Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com>
Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com>
Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com>
Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Reviewer: yuchi.chen(a)intel.com
Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org>
Gerrit-Attention: yuchi.chen(a)intel.com
Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com>
Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com>
Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com>
Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com>
Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com>
Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com>
Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com>
Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com>
Attention is currently required from: Jamie Ryu, Jérémy Compostella, Paul Menzel.
Subrata Banik has posted comments on this change by Jérémy Compostella. ( https://review.coreboot.org/c/coreboot/+/85146?usp=email )
Change subject: mb/google/fatcat: Limit Power Limit when battery is missing
......................................................................
Patch Set 17:
(1 comment)
Patchset:
PS17:
> @subratabanik@google.com, I re-tested this patch today and I realized the current implementation may be a bit problematic as all the board without a battery attached will lower PL4. Would it make sense to have a FW_CONFIG flag to not apply this policy ?
Unfortunately, we won't be helped here much as Chromebooks are meant for with battery.
The alternatives could be
1. set batteryfake from EC
2. Use dolos for battery emulators
--
To view, visit https://review.coreboot.org/c/coreboot/+/85146?usp=email
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email
Gerrit-MessageType: comment
Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: I5d71e9edde0ecbd7aaf316cd754a6ebcff9da77e
Gerrit-Change-Number: 85146
Gerrit-PatchSet: 17
Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com>
Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com>
Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com>
Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org>
Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com>
Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com>
Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org>
Gerrit-Comment-Date: Wed, 11 Dec 2024 01:53:10 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Comment-In-Reply-To: Jérémy Compostella <jeremy.compostella(a)intel.com>
Attention is currently required from: Hung-Te Lin, Jarried Lin.
Yu-Ping Wu has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/85128?usp=email )
The change is no longer submittable: All-Comments-Resolved is unsatisfied now.
Change subject: soc/mediatek/mt8196: Add PMIC MT6363 ADC driver
......................................................................
Patch Set 28:
(2 comments)
File src/soc/mediatek/common/mt6363_sdmadc.c:
https://review.coreboot.org/c/coreboot/+/85128/comment/c6546d23_3b6b88c5?us… :
PS28, Line 70: = NULL
No need for initialization.
https://review.coreboot.org/c/coreboot/+/85128/comment/070b01df_7e518916?us… :
PS28, Line 73: channel
`channel %d` (to print the channel)
--
To view, visit https://review.coreboot.org/c/coreboot/+/85128?usp=email
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email
Gerrit-MessageType: comment
Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: Ice3c286cd207e445392d5f0126a07ce4f40dcf8a
Gerrit-Change-Number: 85128
Gerrit-PatchSet: 28
Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com>
Gerrit-Reviewer: Hope Wang <hope.wang(a)mediatek.corp-partner.google.com>
Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org>
Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com>
Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org>
Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org>
Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com>
Gerrit-Comment-Date: Wed, 11 Dec 2024 01:34:12 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Attention is currently required from: Hung-Te Lin, Jarried Lin.
Yu-Ping Wu has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/85126?usp=email )
Change subject: soc/mediatek/mt8196: Add PMIF and PMIC driver support
......................................................................
Patch Set 22: Code-Review+2
--
To view, visit https://review.coreboot.org/c/coreboot/+/85126?usp=email
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email
Gerrit-MessageType: comment
Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: I232015f45735ee5278b09d0352410617a1565177
Gerrit-Change-Number: 85126
Gerrit-PatchSet: 22
Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com>
Gerrit-Reviewer: Hope Wang <hope.wang(a)mediatek.corp-partner.google.com>
Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org>
Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org>
Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com>
Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org>
Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com>
Gerrit-Comment-Date: Wed, 11 Dec 2024 01:31:46 +0000
Gerrit-HasComments: No
Gerrit-Has-Labels: Yes
Attention is currently required from: Boris Mittelberg, Caveh Jalali, Jayvik Desai, Kapil Porwal, Paul Menzel, Subrata Banik.
Julius Werner has posted comments on this change by Jayvik Desai. ( https://review.coreboot.org/c/coreboot/+/85326?usp=email )
Change subject: ec/google/chromeec: Add debug timestamp for host EC commands
......................................................................
Patch Set 11:
(1 comment)
File src/ec/google/chromeec/ec_lpc.c:
https://review.coreboot.org/c/coreboot/+/85326/comment/4c3584e1_41590c24?us… :
PS9, Line 286: printk
> I was thinking we could keep a data structure that maps EC host commands to timestamps. That way, we'd always know which timestamp belongs to which EC host command.
So you would basically be creating hundreds of new timestamps... I don't think this is worth it. I really don't think timestamps are the right tool for this level of debugging anyway.
> We already have a similar feature for FSP. When we build FSP with a specific flag, it adds more timestamps that aren't needed during regular boot.
Okay, but that's a bit of a different situation. The FSP only runs in one specific part of the boot flow and (I think?) there's already a timestamp right before and after it to mark that part. So if you turn on FSP debugging timestamps it's not that surprising that the time between start and end of the FSP is broken up by additional timestamps.
But EC commands happen all over the place, and will change the values for all sorts of timestamps that have nothing to do with the EC.
--
To view, visit https://review.coreboot.org/c/coreboot/+/85326?usp=email
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email
Gerrit-MessageType: comment
Gerrit-Project: coreboot
Gerrit-Branch: main
Gerrit-Change-Id: I8ab89830ede940d2237ad21187b137dca9689fb0
Gerrit-Change-Number: 85326
Gerrit-PatchSet: 11
Gerrit-Owner: Jayvik Desai <jayvik(a)google.com>
Gerrit-Reviewer: Boris Mittelberg <bmbm(a)google.com>
Gerrit-Reviewer: Caveh Jalali <caveh(a)chromium.org>
Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com>
Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org>
Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Julius Werner <jwerner(a)chromium.org>
Gerrit-Attention: Jayvik Desai <jayvik(a)google.com>
Gerrit-Attention: Subrata Banik <subratabanik(a)google.com>
Gerrit-Attention: Caveh Jalali <caveh(a)chromium.org>
Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com>
Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org>
Gerrit-Attention: Boris Mittelberg <bmbm(a)google.com>
Gerrit-Comment-Date: Wed, 11 Dec 2024 01:08:45 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Comment-In-Reply-To: Jayvik Desai <jayvik(a)google.com>
Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com>
Comment-In-Reply-To: Kapil Porwal <kapilporwal(a)google.com>
Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org>