coreboot-gerrit December 2024

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[main]: soc/mediatek/mt8196: Initialize SSPM
by Yidi Lin (Code Review) 10 Dec '24

10 Dec '24

Attention is currently required from: Hung-Te Lin, Jarried Lin, Kenji Yu, Yu-Ping Wu. Yidi Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/85516?usp=email ) Change subject: soc/mediatek/mt8196: Initialize SSPM ...................................................................... Patch Set 11: (3 comments) File src/soc/mediatek/mt8196/include/soc/mt8196_sspm.h: https://review.coreboot.org/c/coreboot/+/85516/comment/2402375b_4fa8826a?us… : PS11, Line 6: #include <soc/addressmap.h> : : #define SSPM_SRAM_CON (SPM_BASE + 0xEE4) : #define SPM_PRJ_CODE 0xB160001 : #define SSPM_SRAM_SLEEP_B 0x10 : #define SSPM_SRAM_ISOINT_B 0x2 Move to `mt8196/sspm_sram.c`. https://review.coreboot.org/c/coreboot/+/85516/comment/51fe9d4f_c09ff629?us… : PS11, Line 13: void sspm_enable_sram(void); 1. Move to `common/soc/include/sspm.h` 2. Add a weak function in `common/sspm.c` ``` __weak void sspm_enable_sram(void) { /* do nothing */ } ``` in `common/sspm.c` ``` void sspm_init() { sspm_enable_sram(); ... ... } ``` File src/soc/mediatek/mt8196/sspm.c: https://review.coreboot.org/c/coreboot/+/85516/comment/f3b64c47_36027286?us… : PS11, Line 4: mt8196_sspm sspm.h -- To view, visit https://review.coreboot.org/c/coreboot/+/85516?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic56f0bad2f4cbf11d5711425d57c3b5b6bf283f0 Gerrit-Change-Number: 85516 Gerrit-PatchSet: 11 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Kenji Yu <kenji.yu(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Kenji Yu <kenji.yu(a)mediatek.corp-partner.google.com> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Tue, 10 Dec 2024 14:45:24 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[M] Change in coreboot[main]: soc/intel/xeon_sp: Improve IRQ routing for Gen6
by Paul Menzel (Code Review) 10 Dec '24

10 Dec '24

Attention is currently required from: Angel Pons, Christian Walter, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, Shuo Liu, Tim Chu, yuchi.chen(a)intel.com. Paul Menzel has posted comments on this change by Shuo Liu. ( https://review.coreboot.org/c/coreboot/+/85153?usp=email ) Change subject: soc/intel/xeon_sp: Improve IRQ routing for Gen6 ...................................................................... Patch Set 11: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/85153/comment/235c5724_99d8fa4b?us… : PS11, Line 9: 1. Route IRQ for on-chip end-points only. Why? -- To view, visit https://review.coreboot.org/c/coreboot/+/85153?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ibeb7c8fb3432e5cb240ac3b09c19d2c361e4b45a Gerrit-Change-Number: 85153 Gerrit-PatchSet: 11 Gerrit-Owner: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: yuchi.chen(a)intel.com Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: yuchi.chen(a)intel.com Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Tue, 10 Dec 2024 14:23:30 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: mb/google/brya: Adjust EC memory map range to support indexed IO.
by Paul Menzel (Code Review) 10 Dec '24

10 Dec '24

Attention is currently required from: Dinesh Gehlot, Eric Lai, Jayvik Desai, Kapil Porwal, Nick Vaccaro. Paul Menzel has posted comments on this change by Jayvik Desai. ( https://review.coreboot.org/c/coreboot/+/85547?usp=email ) Change subject: mb/google/brya: Adjust EC memory map range to support indexed IO. ...................................................................... Patch Set 1: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/85547/comment/24da9660_09b19607?us… : PS1, Line 6: > `Subject line should not end with a period.` Please fix. -- To view, visit https://review.coreboot.org/c/coreboot/+/85547?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ide5026b35da7c00deab4464eedfca9d52d294fd6 Gerrit-Change-Number: 85547 Gerrit-PatchSet: 1 Gerrit-Owner: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Tue, 10 Dec 2024 14:20:51 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[M] Change in coreboot[main]: soc/mediatek/mt8196: Add PMIC MT6363 ADC driver
by Yidi Lin (Code Review) 10 Dec '24

10 Dec '24

Attention is currently required from: Hung-Te Lin, Jarried Lin, Yu-Ping Wu. Yidi Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/85128?usp=email ) Change subject: soc/mediatek/mt8196: Add PMIC MT6363 ADC driver ...................................................................... Patch Set 28: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85128?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ice3c286cd207e445392d5f0126a07ce4f40dcf8a Gerrit-Change-Number: 85128 Gerrit-PatchSet: 28 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hope Wang <hope.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Tue, 10 Dec 2024 14:17:38 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[L] Change in coreboot[main]: soc/mediatek/mt8196: Add mtcmos init support
by Yidi Lin (Code Review) 10 Dec '24

10 Dec '24

Attention is currently required from: Elyes Haouas, Hung-Te Lin, Jarried Lin, Paul Menzel, Yu-Ping Wu. Yidi Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/84497?usp=email ) Change subject: soc/mediatek/mt8196: Add mtcmos init support ...................................................................... Patch Set 40: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/84497?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I44f2bb10453377a8412e80ac0c100760ebfbaff9 Gerrit-Change-Number: 84497 Gerrit-PatchSet: 40 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-CC: Guangjie Song <guangjie.song(a)mediatek.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Comment-Date: Tue, 10 Dec 2024 14:17:24 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XL] Change in coreboot[main]: soc/mediatek/mt8196: Add PMIF and PMIC driver support
by Yidi Lin (Code Review) 10 Dec '24

10 Dec '24

Attention is currently required from: Hung-Te Lin, Jarried Lin, Yu-Ping Wu. Yidi Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/85126?usp=email ) Change subject: soc/mediatek/mt8196: Add PMIF and PMIC driver support ...................................................................... Patch Set 22: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/85126?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I232015f45735ee5278b09d0352410617a1565177 Gerrit-Change-Number: 85126 Gerrit-PatchSet: 22 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hope Wang <hope.wang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Tue, 10 Dec 2024 14:16:58 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[M] Change in coreboot[main]: drivers/usb/intel_bluetooth: Relocate BTRK to \_SB.PCI0
by Sean Rhodes (Code Review) 10 Dec '24

10 Dec '24

Attention is currently required from: Paul Menzel. Sean Rhodes has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/84990?usp=email ) Change subject: drivers/usb/intel_bluetooth: Relocate BTRK to \_SB.PCI0 ...................................................................... Patch Set 3: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/84990/comment/16760ee7_971c1eae?us… : PS3, Line 11: > Did Linux log an error before? No -- To view, visit https://review.coreboot.org/c/coreboot/+/84990?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I044b745dce41c9d7a86384b42543ad93485d85ce Gerrit-Change-Number: 84990 Gerrit-PatchSet: 3 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Nicholas Sudsgaard <devel+coreboot(a)nsudsgaard.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Tue, 10 Dec 2024 13:44:05 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org>

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[XS] Change in coreboot[main]: drivers/usb/intel_bluetooth: Change the Power Resource to S0
by Sean Rhodes (Code Review) 10 Dec '24

10 Dec '24

Attention is currently required from: Nicholas Sudsgaard. Sean Rhodes has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/84988?usp=email ) Change subject: drivers/usb/intel_bluetooth: Change the Power Resource to S0 ...................................................................... Patch Set 5: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/84988/comment/1ef500e3_91e5e380?us… : PS4, Line 9: is > "is" => "to" Done -- To view, visit https://review.coreboot.org/c/coreboot/+/84988?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I9ae710ef452c717ec414324d2847bf3218fd62d3 Gerrit-Change-Number: 84988 Gerrit-PatchSet: 5 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Nicholas Sudsgaard <devel+coreboot(a)nsudsgaard.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nicholas Sudsgaard <devel+coreboot(a)nsudsgaard.com> Gerrit-Comment-Date: Tue, 10 Dec 2024 13:43:44 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nicholas Sudsgaard <devel+coreboot(a)nsudsgaard.com>

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[S] Change in coreboot[main]: drivers/usb/intel_bluetooth: Add GBTR Method
by Sean Rhodes (Code Review) 10 Dec '24

10 Dec '24

Attention is currently required from: Nicholas Sudsgaard. Sean Rhodes has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/84992?usp=email ) Change subject: drivers/usb/intel_bluetooth: Add GBTR Method ...................................................................... Patch Set 2: (1 comment) File src/soc/intel/common/block/cnvi/cnvi.c: https://review.coreboot.org/c/coreboot/+/84992/comment/1951c0b9_dc958ef7?us… : PS2, Line 132: If ((\_SB.PCI0.GBTR() == One)) > Why was this GBTE replaced with GBTR? Because it can be used from both CNVi and full PCI -- To view, visit https://review.coreboot.org/c/coreboot/+/84992?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I8d025f63192218399b8d5e60e847853e54a8353c Gerrit-Change-Number: 84992 Gerrit-PatchSet: 2 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Nicholas Sudsgaard <devel+coreboot(a)nsudsgaard.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nicholas Sudsgaard <devel+coreboot(a)nsudsgaard.com> Gerrit-Comment-Date: Tue, 10 Dec 2024 13:43:12 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nicholas Sudsgaard <devel+coreboot(a)nsudsgaard.com>

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[S] Change in coreboot[main]: mb/google/fatcat: Limit Power Limit when battery is missing
by Subrata Banik (Code Review) 10 Dec '24

10 Dec '24

Attention is currently required from: Jérémy Compostella. Subrata Banik has posted comments on this change by Jérémy Compostella. ( https://review.coreboot.org/c/coreboot/+/85146?usp=email ) Change subject: mb/google/fatcat: Limit Power Limit when battery is missing ...................................................................... Patch Set 14: -Code-Review (1 comment) File src/mainboard/google/fatcat/variants/baseboard/fatcat/ramstage.c: https://review.coreboot.org/c/coreboot/+/85146/comment/a5773805_7b6d6c88?us… : PS14, Line 26: if (!google_chromeec_is_battery_present()) do we need `if (CONFIG(EC_GOOGLE_CHROMEEC)) {` check as well ? ``` if (CONFIG(EC_GOOGLE_CHROMEEC)) { if (!google_chromeec_is_battery_present()) variant_update_cpu_power_limits(power_optimized_limits, ARRAY_SIZE(power_optimized_limits)) } ``` -- To view, visit https://review.coreboot.org/c/coreboot/+/85146?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I5d71e9edde0ecbd7aaf316cd754a6ebcff9da77e Gerrit-Change-Number: 85146 Gerrit-PatchSet: 14 Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Comment-Date: Tue, 10 Dec 2024 12:56:08 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes

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coreboot-gerrit December 2024