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Change subject: soc/mediatek/mt8196: Add SPI driver support
......................................................................
Patch Set 3:
(3 comments)
File src/soc/mediatek/mt8196/include/soc/spi.h:
https://review.coreboot.org/c/coreboot/+/84930/comment/77378dd5_457530c4?us… :
PS3, Line 8: #ifndef __SOC_MEDIATEK_MT8196_SPI_H__
Why change it? The code in mediatek/ is already inconsistent.
https://review.coreboot.org/c/coreboot/+/84930/comment/3db69873_0868ec4e?us… :
PS3, Line 15: x
`(x)`
File src/soc/mediatek/mt8196/spi.c:
https://review.coreboot.org/c/coreboot/+/84930/comment/9cf45a66_cf894d7f?us… :
PS3, Line 123: SPI_BUS_NUMBER
`ARRAY_SIZE(pad_funcs[0])`
I fixed mt8188 in CB:84950.
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Yu-Ping Wu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/84950?usp=email )
Change subject: soc/mediatek/mt8188/spi: Fix out-of-bound array access for pad_funcs
......................................................................
soc/mediatek/mt8188/spi: Fix out-of-bound array access for pad_funcs
The size of the inner array of the 2-dimensional array pad_funcs should
be 4 instead of SPI_BUS_NUMBER (6). This bug leads to two extra
gpio_set_mode() calls with unexpected GPIOs.
Inspecting spi.o, the data immediately after the .rodata.pad_funcs
section is .rodata.spi_ctrlr_bus_map, with the following data:
00000428 00 00 00 00 00 00 00 00 00 00 00 00 05 00 00 00
00000438 00 00 00 00 00 00 00 00 ...
This is equivalent to the following calls:
gpio_set_mode(GPIO(GPIO05), 0);
gpio_set_mode(GPIO(GPIO00), 0);
The second call is already included in the pad_funcs array, so the first
call is the only practical impact of this bug.
Change-Id: I9c44f09b3cdadbbf039b95efca7144f213672092
Signed-off-by: Yu-Ping Wu <yupingso(a)chromium.org>
---
M src/soc/mediatek/mt8188/spi.c
1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/84950/1
diff --git a/src/soc/mediatek/mt8188/spi.c b/src/soc/mediatek/mt8188/spi.c
index 994663d..66fbf0f 100644
--- a/src/soc/mediatek/mt8188/spi.c
+++ b/src/soc/mediatek/mt8188/spi.c
@@ -114,7 +114,7 @@
ptr = pad_funcs[bus];
- for (unsigned int i = 0; i < SPI_BUS_NUMBER; i++)
+ for (unsigned int i = 0; i < ARRAY_SIZE(pad_funcs[0]); i++)
gpio_set_mode(ptr[i].gpio, ptr[i].func);
}
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Change subject: mb/google/nissa/var/glassway: Add initial LTE related settings
......................................................................
Patch Set 5:
(1 comment)
Patchset:
PS4:
Add more description on TEST section. Please kindly help to confirm if any. Thanks.
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Change subject: mb/google/nissa/var/glassway: Add touch screen ILIT2901 support
......................................................................
Patch Set 5:
(1 comment)
Patchset:
PS5:
Sorry to push to submit if no concern. Thanks.
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Change subject: soc/mediatek/mt8196: Disable irq2axi feature
......................................................................
Patch Set 5:
(6 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/84896/comment/1e138daa_01765b5d?us… :
PS1, Line 13: TEST=Build pass and the interrupt can be correctly handled.
> Please mention the problems/symptoms in the commit message. […]
Done
File src/soc/mediatek/mt8196/include/soc/irq2axi.h:
https://review.coreboot.org/c/coreboot/+/84896/comment/47e1183f_db0907cc?us… :
PS3, Line 6: #include <device/mmio.h>
> move to c file
Done
https://review.coreboot.org/c/coreboot/+/84896/comment/64b12129_a5c6c545?us… :
PS3, Line 8:
> use tab for indent
Done
https://review.coreboot.org/c/coreboot/+/84896/comment/25d5c5bc_9549b31b?us… :
PS3, Line 13: (
> remove parentheses
Done
https://review.coreboot.org/c/coreboot/+/84896/comment/40d89026_595554f1?us… :
PS3, Line 16: )
> ditto
Done
File src/soc/mediatek/mt8196/irq2axi.c:
https://review.coreboot.org/c/coreboot/+/84896/comment/53c0bc8b_dc2a27be?us… :
PS3, Line 8: printk(BIOS_INFO, "%s\n", __func__);
> Please make it debug level or reword it. […]
Done
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Hello Hung-Te Lin, Runyang Chen, Yidi Lin, Yu-Ping Wu, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/84896?usp=email
to look at the new patch set (#5).
Change subject: soc/mediatek/mt8196: Disable irq2axi feature
......................................................................
soc/mediatek/mt8196: Disable irq2axi feature
Irq2axi translates wire-based interrupt into message signal interrupt.
Since MT8196 uses legacy wire-based interrupt, this feature needs to be
disabled.
If the interrupt is not handled, it will cause the system fail to boot.
TEST=Build pass, check irq2axi_disable log and the interrupt can be
correctly handled by checking /proc/interrupts.
BUG=b:317009620
Signed-off-by: Runyang Chen <runyang.chen(a)mediatek.corp-partner.google.com>
Change-Id: I0e89a0ee75e574a4b9e8df0a0f6a5f6e03bba2d6
---
M src/mainboard/google/rauru/romstage.c
M src/soc/mediatek/mt8196/Makefile.mk
A src/soc/mediatek/mt8196/include/soc/irq2axi.h
A src/soc/mediatek/mt8196/irq2axi.c
4 files changed, 39 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/84896/5
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