coreboot-gerrit November 2024

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[XS] Change in coreboot[main]: mb/google/dedede: Select INTEL_CRASHLOG only for ChromeOS builds
by Matt DeVillier (Code Review) 04 Nov '24

04 Nov '24

Attention is currently required from: Balaji Manigandan, Jakub Czapiga, Jędrzej Ciupis, Pratikkumar V Prajapati, Sowmya Aralguppe, Subrata Banik. Matt DeVillier has posted comments on this change by Matt DeVillier. ( https://review.coreboot.org/c/coreboot/+/84359?usp=email ) Change subject: mb/google/dedede: Select INTEL_CRASHLOG only for ChromeOS builds ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: just re-raising this issue - would like to have it fixed for the upcoming release -- To view, visit https://review.coreboot.org/c/coreboot/+/84359?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I53be4befe9a04bdaece21f40f93af6599baa7e0b Gerrit-Change-Number: 84359 Gerrit-PatchSet: 2 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Balaji Manigandan <balaji.bmg(a)gmail.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Jędrzej Ciupis <jciupis(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Reviewer: Sowmya Aralguppe <sowmya.aralguppe(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sowmya Aralguppe <sowmya.aralguppe(a)intel.com> Gerrit-Attention: Jędrzej Ciupis <jciupis(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Balaji Manigandan <balaji.bmg(a)gmail.com> Gerrit-Attention: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Comment-Date: Mon, 04 Nov 2024 20:12:47 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: ec/google/chromeec: Add API to get PD Chip info
by Nick Vaccaro (Code Review) 04 Nov '24

04 Nov '24

Attention is currently required from: Caveh Jalali, Forest Mittelberg, Karthik Ramasubramanian, Nick Vaccaro, Subrata Banik. Nick Vaccaro has posted comments on this change by Karthik Ramasubramanian. ( https://review.coreboot.org/c/coreboot/+/84936?usp=email ) Change subject: ec/google/chromeec: Add API to get PD Chip info ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/84936?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I4cc4493ac64d44076877fee633488c95cd09807e Gerrit-Change-Number: 84936 Gerrit-PatchSet: 3 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Forest Mittelberg <bmbm(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Caveh Jalali <caveh(a)chromium.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: Forest Mittelberg <bmbm(a)google.com> Gerrit-Comment-Date: Mon, 04 Nov 2024 19:58:04 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[M] Change in coreboot[main]: mb/google/fizz: Fix USB port defintions
by Matt DeVillier (Code Review) 04 Nov '24

04 Nov '24

Matt DeVillier has submitted this change. ( https://review.coreboot.org/c/coreboot/+/84955?usp=email ) Change subject: mb/google/fizz: Fix USB port defintions ...................................................................... mb/google/fizz: Fix USB port defintions commit 6c83a71b0a80 ("skl mainboards/dt: Move usb{2,3}_ports settings into XHCI device scope") not only moved the USB port definitions under the XHCI device reference, but also combined multiple register definitions. In doing so, it broke the inheritance from the baseboard, since the variant overridetree registers now replaced the entire usb2_ports/usb3_ports structs, rather than replacing individual array elements therein. This resulted in any USB ports inherited from the baseboard and not overridden by the variant being non-functional as they were not included in the resulting combined devicetree. To fix this, return to overriding individual array elements in the usb2/3_ports structs. TEST=build/boot google/fizz/var/karma. Verify all USB ports present and functional. Verify mainboard/static.c in built shows all ports. Change-Id: I0e80bf4949a857c21d44537eb720a7a8a7db2f80 Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84955 Reviewed-by: Nicholas Sudsgaard <devel+coreboot(a)nsudsgaard.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/google/fizz/variants/baseboard/devicetree.cb M src/mainboard/google/fizz/variants/endeavour/overridetree.cb M src/mainboard/google/fizz/variants/karma/overridetree.cb 3 files changed, 34 insertions(+), 44 deletions(-) Approvals: build bot (Jenkins): Verified Nicholas Sudsgaard: Looks good to me, approved diff --git a/src/mainboard/google/fizz/variants/baseboard/devicetree.cb b/src/mainboard/google/fizz/variants/baseboard/devicetree.cb index 2976deb..25114f0 100644 --- a/src/mainboard/google/fizz/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/fizz/variants/baseboard/devicetree.cb @@ -204,25 +204,22 @@ device ref igpu on end device ref sa_thermal on end device ref south_xhci on - register "usb2_ports" = "{ - [0] = USB2_PORT_LONG(OC0), // Type-C - [1] = USB2_PORT_MID(OC3), // Type-A Rear - [2] = USB2_PORT_MID(OC2), // Type-A Front - [3] = USB2_PORT_MID(OC2), // Type-A Front - [4] = USB2_PORT_MID(OC1), // Type-A Rear - [5] = USB2_PORT_MID(OC1), // Type-A Rear - [6] = USB2_PORT_MID(OC_SKIP), // Bluetooth - [7] = USB2_PORT_MID(OC_SKIP), // Type-A 2.0 / Debug - }" + register "usb2_ports[0]" = "USB2_PORT_LONG(OC0)" # Type-C + register "usb2_ports[1]" = "USB2_PORT_MID(OC3)" # Type-A Rear + register "usb2_ports[2]" = "USB2_PORT_MID(OC2)" # Type-A Front + register "usb2_ports[3]" = "USB2_PORT_MID(OC2)" # Type-A Front + register "usb2_ports[4]" = "USB2_PORT_MID(OC1)" # Type-A Rear + register "usb2_ports[5]" = "USB2_PORT_MID(OC1)" # Type-A Rear + register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth + register "usb2_ports[7]" = "USB2_PORT_MID(OC_SKIP)" # Type-A 2.0 / Debug - register "usb3_ports" = "{ - [0] = USB3_PORT_DEFAULT(OC0), // Type-C - [1] = USB3_PORT_DEFAULT(OC3), // Type-A Rear - [2] = USB3_PORT_DEFAULT(OC2), // Type-A Front - [3] = USB3_PORT_DEFAULT(OC2), // Type-A Front - [4] = USB3_PORT_DEFAULT(OC1), // Type-A Rear - [5] = USB3_PORT_DEFAULT(OC1), // Type-A Rear - }" + register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC0)" # Type-C + register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC3)" # Type-A Rear + register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC2)" # Type-A Front + register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC2)" # Type-A Front + register "usb3_ports[4]" = "USB3_PORT_DEFAULT(OC1)" # Type-A Rear + register "usb3_ports[5]" = "USB3_PORT_DEFAULT(OC1)" # Type-A Rear + chip drivers/usb/acpi register "desc" = ""Root Hub"" register "type" = "UPC_TYPE_HUB" diff --git a/src/mainboard/google/fizz/variants/endeavour/overridetree.cb b/src/mainboard/google/fizz/variants/endeavour/overridetree.cb index 649b5c1..f359bf3 100644 --- a/src/mainboard/google/fizz/variants/endeavour/overridetree.cb +++ b/src/mainboard/google/fizz/variants/endeavour/overridetree.cb @@ -22,23 +22,20 @@ device domain 0 on device ref south_xhci on - register "usb2_ports" = "{ - [0] = USB2_PORT_LONG(OC_SKIP), // Type-C - [1] = USB2_PORT_MID(OC_SKIP), // HDMI - [2] = USB2_PORT_MID(OC2), // Type-A Rear - [3] = USB2_PORT_MID(OC2), // Type-A Rear - [4] = USB2_PORT_MID(OC3), // Type-A Rear - [5] = USB2_PORT_MID(OC_SKIP), // HDMI Audio - [6] = USB2_PORT_MID(OC_SKIP), // Bluetooth - }" + register "usb2_ports[0]" = "USB2_PORT_LONG(OC_SKIP)" # Type-C + register "usb2_ports[1]" = "USB2_PORT_MID(OC_SKIP)" # HDMI + register "usb2_ports[2]" = "USB2_PORT_MID(OC2)" # Type-A Rear + register "usb2_ports[3]" = "USB2_PORT_MID(OC2)" # Type-A Rear + register "usb2_ports[4]" = "USB2_PORT_MID(OC3)" # Type-A Rear + register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)" # HDMI Audio + register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # Bluetooth - register "usb3_ports" = "{ - [0] = USB3_PORT_DEFAULT(OC_SKIP), // Type-C - [1] = USB3_PORT_DEFAULT(OC_SKIP), // HDMI - [2] = USB3_PORT_DEFAULT(OC2), // Type-A Rear - [3] = USB3_PORT_DEFAULT(OC2), // Type-A Rear - [4] = USB3_PORT_DEFAULT(OC3), // Type-A Rear - }" + register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Type-C + register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # HDMI + register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC2)" # Type-A Rear + register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC2)" # Type-A Rear + register "usb3_ports[4]" = "USB3_PORT_DEFAULT(OC3)" # Type-A Rear + chip drivers/usb/acpi device usb 0.0 on chip drivers/usb/acpi diff --git a/src/mainboard/google/fizz/variants/karma/overridetree.cb b/src/mainboard/google/fizz/variants/karma/overridetree.cb index 25b39f4..53fef3c 100644 --- a/src/mainboard/google/fizz/variants/karma/overridetree.cb +++ b/src/mainboard/google/fizz/variants/karma/overridetree.cb @@ -15,17 +15,13 @@ #| Camera | 8 | | #| Touchsreen | 10 | | #+----------------+-------+-----------------------------------+ - register "usb2_ports" = "{ - [2] = USB2_PORT_MID(OC2), // Type-A Side - [3] = USB2_PORT_MID(OC_SKIP), // Card reader - [7] = USB2_PORT_MID(OC_SKIP), // Camera - [9] = USB2_PORT_MID(OC_SKIP), // Touchscreen - }" + register "usb2_ports[2]" = "USB2_PORT_MID(OC2)" # Type-A Side + register "usb2_ports[3]" = "USB2_PORT_MID(OC_SKIP)" # Card reader + register "usb2_ports[7]" = "USB2_PORT_MID(OC_SKIP)" # Camera + register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # Touchscreen - register "usb3_ports" = "{ - [2] = USB3_PORT_DEFAULT(OC2), // Type-A Side - [3] = USB3_PORT_DEFAULT(OC_SKIP), // Card reader - }" + register "usb3_ports[2]" = "USB3_PORT_DEFAULT(OC2)" # Type-A Side + register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC_SKIP)" # Card reader chip drivers/usb/acpi device usb 0.0 on -- To view, visit https://review.coreboot.org/c/coreboot/+/84955?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I0e80bf4949a857c21d44537eb720a7a8a7db2f80 Gerrit-Change-Number: 84955 Gerrit-PatchSet: 3 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Nicholas Sudsgaard <devel+coreboot(a)nsudsgaard.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[XS] Change in coreboot[main]: soc/intel/pantherlake: Update SAF base address
by Anil Kumar K (Code Review) 04 Nov '24

04 Nov '24

Attention is currently required from: Kapil Porwal, Pranava Y N, Subrata Banik. Anil Kumar K has posted comments on this change by Anil Kumar K. ( https://review.coreboot.org/c/coreboot/+/84863?usp=email ) Change subject: soc/intel/pantherlake: Update SAF base address ...................................................................... Patch Set 3: (1 comment) File src/soc/intel/pantherlake/include/soc/iomap.h: https://review.coreboot.org/c/coreboot/+/84863/comment/ff00df5a_52fe6687?us… : PS2, Line 19: 0xFA000000 > use `0xfa000000` Done -- To view, visit https://review.coreboot.org/c/coreboot/+/84863?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I14fa8cf06144f46369cc8cab6087c790280e9859 Gerrit-Change-Number: 84863 Gerrit-PatchSet: 3 Gerrit-Owner: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Comment-Date: Mon, 04 Nov 2024 19:49:50 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com>

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[XS] Change in coreboot[main]: soc/intel/pantherlake: Update SAF base address
by Anil Kumar K (Code Review) 04 Nov '24

04 Nov '24

Attention is currently required from: Anil Kumar K, Kapil Porwal, Pranava Y N. Hello Kapil Porwal, Pranava Y N, Subrata Banik, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/84863?usp=email to look at the new patch set (#3). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: soc/intel/pantherlake: Update SAF base address ...................................................................... soc/intel/pantherlake: Update SAF base address Intel ref doc Number# 812562 BUG=b:357011633 TEST=build and boot coreboot image on Google/Fatcat board. Change-Id: I14fa8cf06144f46369cc8cab6087c790280e9859 Signed-off-by: Anil Kumar <anil.kumar.k(a)intel.com> --- M src/soc/intel/pantherlake/include/soc/iomap.h 1 file changed, 1 insertion(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/84863/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/84863?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I14fa8cf06144f46369cc8cab6087c790280e9859 Gerrit-Change-Number: 84863 Gerrit-PatchSet: 3 Gerrit-Owner: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com>

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[XS] Change in coreboot[main]: soc/intel/pantherlake: Update SAF base address
by Subrata Banik (Code Review) 04 Nov '24

04 Nov '24

Attention is currently required from: Anil Kumar K, Kapil Porwal, Pranava Y N. Subrata Banik has posted comments on this change by Anil Kumar K. ( https://review.coreboot.org/c/coreboot/+/84863?usp=email ) Change subject: soc/intel/pantherlake: Update SAF base address ...................................................................... Patch Set 2: (1 comment) File src/soc/intel/pantherlake/include/soc/iomap.h: https://review.coreboot.org/c/coreboot/+/84863/comment/05685aa0_e3da1efc?us… : PS2, Line 19: 0xFA000000 use `0xfa000000` -- To view, visit https://review.coreboot.org/c/coreboot/+/84863?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I14fa8cf06144f46369cc8cab6087c790280e9859 Gerrit-Change-Number: 84863 Gerrit-PatchSet: 2 Gerrit-Owner: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Comment-Date: Mon, 04 Nov 2024 18:23:01 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: soc/intel/pantherlake: Update SAF base address
by Anil Kumar K (Code Review) 04 Nov '24

04 Nov '24

Attention is currently required from: Kapil Porwal, Pranava Y N, Subrata Banik. Anil Kumar K has posted comments on this change by Anil Kumar K. ( https://review.coreboot.org/c/coreboot/+/84863?usp=email ) Change subject: soc/intel/pantherlake: Update SAF base address ...................................................................... Patch Set 2: (1 comment) File src/soc/intel/pantherlake/include/soc/iomap.h: https://review.coreboot.org/c/coreboot/+/84863/comment/74cf859e_b097a63b?us… : PS2, Line 19: SAF_BASE_ADDRESS > I will check and confirm Subrata.. […] Hi Subrata. We are in the process of updating external document . The address 0xFA000000 is the correct address for SAF -- To view, visit https://review.coreboot.org/c/coreboot/+/84863?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I14fa8cf06144f46369cc8cab6087c790280e9859 Gerrit-Change-Number: 84863 Gerrit-PatchSet: 2 Gerrit-Owner: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Comment-Date: Mon, 04 Nov 2024 18:19:30 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Anil Kumar K <anil.kumar.k(a)intel.com> Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com>

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[XS] Change in coreboot[main]: mb/google/fatcat/var/fatcat: Configure eSPI alarm GPIO
by Subrata Banik (Code Review) 04 Nov '24

04 Nov '24

Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/84957?usp=email ) Change subject: mb/google/fatcat/var/fatcat: Configure eSPI alarm GPIO ...................................................................... mb/google/fatcat/var/fatcat: Configure eSPI alarm GPIO This patch configures the ESPI_SOC_ALERT_L GPIO pad on fatcat as NC to enable S0ix low power entry. TEST=Build fatcat and check the platform boots without an issue. Change-Id: Icb80a56177105c0281d05fe1f5daa87e6f7e291f Signed-off-by: Sukumar Ghorai <sukumar.ghorai(a)intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84957 Reviewed-by: Subrata Banik <subratabanik(a)google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Jamie Ryu <jamie.m.ryu(a)intel.com> --- M src/mainboard/google/fatcat/variants/fatcat/gpio.c 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: Subrata Banik: Looks good to me, approved build bot (Jenkins): Verified Jamie Ryu: Looks good to me, approved diff --git a/src/mainboard/google/fatcat/variants/fatcat/gpio.c b/src/mainboard/google/fatcat/variants/fatcat/gpio.c index ca59446..b76db5a 100644 --- a/src/mainboard/google/fatcat/variants/fatcat/gpio.c +++ b/src/mainboard/google/fatcat/variants/fatcat/gpio.c @@ -100,7 +100,7 @@ /* GPP_B23: ISH_GP_6_SNSR_HDR */ PAD_CFG_NF(GPP_B23, NONE, DEEP, NF4), /* GPP_B24: ESPI_ALERT0_EC_R_N */ - PAD_CFG_NF(GPP_B24, NONE, DEEP, NF1), + PAD_NC(GPP_B24, NONE), /* GPP_B25: X1_SLOT_WAKE_N */ PAD_CFG_GPI_SCI_LOW(GPP_B25, NONE, DEEP, LEVEL), -- To view, visit https://review.coreboot.org/c/coreboot/+/84957?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Icb80a56177105c0281d05fe1f5daa87e6f7e291f Gerrit-Change-Number: 84957 Gerrit-PatchSet: 7 Gerrit-Owner: Sukumar Ghorai <sukumar.ghorai(a)intel.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[XS] Change in coreboot[main]: mb/google/fatcat: Disable package c-state auto-demotion
by Subrata Banik (Code Review) 04 Nov '24

04 Nov '24

Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/84956?usp=email ) Change subject: mb/google/fatcat: Disable package c-state auto-demotion ...................................................................... mb/google/fatcat: Disable package c-state auto-demotion Package C-state auto demotion feature allows hardware to determine lower C-state as per platform policy. Since platform sets performance policy to balanced from hardware, auto demotion can be disabled without performance impact. TEST=Build fatcat and check the platform boots without an issue. Change-Id: I01f2cb8ac1093ae98cc076e35ad1924baa53aa59 Signed-off-by: Sukumar Ghorai <sukumar.ghorai(a)intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84956 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Jamie Ryu <jamie.m.ryu(a)intel.com> Reviewed-by: Subrata Banik <subratabanik(a)google.com> --- M src/mainboard/google/fatcat/variants/baseboard/fatcat/devicetree.cb 1 file changed, 2 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Jamie Ryu: Looks good to me, approved Subrata Banik: Looks good to me, approved diff --git a/src/mainboard/google/fatcat/variants/baseboard/fatcat/devicetree.cb b/src/mainboard/google/fatcat/variants/baseboard/fatcat/devicetree.cb index 1b1fc73..a81f35e 100644 --- a/src/mainboard/google/fatcat/variants/baseboard/fatcat/devicetree.cb +++ b/src/mainboard/google/fatcat/variants/baseboard/fatcat/devicetree.cb @@ -39,6 +39,8 @@ # TODO: Safe Setting. Needs to be removed later # Disable C1 C-state auto-demotion register "disable_c1_state_auto_demotion" = "true" + # Disable PKGC-state auto-demotion + register "disable_package_c_state_demotion" = "true" # Enable CNVi BT register "cnvi_bt_core" = "true" -- To view, visit https://review.coreboot.org/c/coreboot/+/84956?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I01f2cb8ac1093ae98cc076e35ad1924baa53aa59 Gerrit-Change-Number: 84956 Gerrit-PatchSet: 3 Gerrit-Owner: Sukumar Ghorai <sukumar.ghorai(a)intel.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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[XS] Change in coreboot[main]: mb/google/fatcat/var/fatcat: Configure eSPI alarm GPIO
by Jamie Ryu (Code Review) 04 Nov '24

04 Nov '24

Attention is currently required from: Pranava Y N, Sukumar Ghorai. Jamie Ryu has posted comments on this change by Sukumar Ghorai. ( https://review.coreboot.org/c/coreboot/+/84957?usp=email ) Change subject: mb/google/fatcat/var/fatcat: Configure eSPI alarm GPIO ...................................................................... Patch Set 6: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/84957?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Icb80a56177105c0281d05fe1f5daa87e6f7e291f Gerrit-Change-Number: 84957 Gerrit-PatchSet: 6 Gerrit-Owner: Sukumar Ghorai <sukumar.ghorai(a)intel.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sukumar Ghorai <sukumar.ghorai(a)intel.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Comment-Date: Mon, 04 Nov 2024 18:13:22 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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