coreboot-gerrit November 2024

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[XS] Change in coreboot[main]: xcompile: Use Walloc-size GCC option
by Elyes Haouas (Code Review) 11 Nov '24

11 Nov '24

Attention is currently required from: Felix Singer, Martin L Roth, Paul Menzel. Elyes Haouas has posted comments on this change by Elyes Haouas. ( https://review.coreboot.org/c/coreboot/+/84074?usp=email ) Change subject: xcompile: Use Walloc-size GCC option ...................................................................... Patch Set 10: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/84074/comment/472de02e_8a1cd704?us… : PS8, Line 11: commit 6ab188ee (`Makefile.mk: Use Walloc-size GCC option`) added this > `Please use git commit description style 'commit <12+ chars of sha1> ("<title line>")' - ie: 'commit d05fe9fd3ce9 ("Revert "Makefile.mk: Use Walloc-size GCC option"")'` Please fix. -- To view, visit https://review.coreboot.org/c/coreboot/+/84074?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If5d36b073bb5b4cccb0cf2b67b43edb3f97f168c Gerrit-Change-Number: 84074 Gerrit-PatchSet: 10 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Mon, 11 Nov 2024 02:48:59 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: xcompile: Use Walloc-size GCC option
by Elyes Haouas (Code Review) 11 Nov '24

11 Nov '24

Attention is currently required from: Felix Singer, Martin L Roth, Paul Menzel. Elyes Haouas has posted comments on this change by Elyes Haouas. ( https://review.coreboot.org/c/coreboot/+/84074?usp=email ) Change subject: xcompile: Use Walloc-size GCC option ...................................................................... Patch Set 10: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/84074/comment/5cc89f94_1f6b58d2?us… : PS8, Line 10: target type of the pointer. > `Please use git commit description style 'commit <12+ chars of sha1> ("<title line>")' - ie: 'commit 6ab188ee6c99 ("Makefile.mk: Use Walloc-size GCC option")'` Please fix. -- To view, visit https://review.coreboot.org/c/coreboot/+/84074?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If5d36b073bb5b4cccb0cf2b67b43edb3f97f168c Gerrit-Change-Number: 84074 Gerrit-PatchSet: 10 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Mon, 11 Nov 2024 02:47:30 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: xcompile: Use Walloc-size GCC option
by Elyes Haouas (Code Review) 11 Nov '24

11 Nov '24

Attention is currently required from: Felix Singer, Martin L Roth, Paul Menzel. Hello Martin L Roth, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/84074?usp=email to look at the new patch set (#10). Change subject: xcompile: Use Walloc-size GCC option ...................................................................... xcompile: Use Walloc-size GCC option Warn about allocation function calls with insufficient size for the target type of the pointer. commit 6ab188ee6c99 (`Makefile.mk: Use Walloc-size GCC option`) added this GCC option, but commit d05fe9fd3ce9 (`Revert "Makefile.mk: Use Localiser GCC option"`) reverted it as old GCC didn't support it. So enable it for modern GCC version. Change-Id: If5d36b073bb5b4cccb0cf2b67b43edb3f97f168c Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> --- M util/xcompile/xcompile 1 file changed, 3 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/84074/10 -- To view, visit https://review.coreboot.org/c/coreboot/+/84074?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If5d36b073bb5b4cccb0cf2b67b43edb3f97f168c Gerrit-Change-Number: 84074 Gerrit-PatchSet: 10 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org>

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[XS] Change in coreboot[main]: soc/intel/pantherlake: Update SAF base address
by Subrata Banik (Code Review) 11 Nov '24

11 Nov '24

Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/84863?usp=email ) Change subject: soc/intel/pantherlake: Update SAF base address ...................................................................... soc/intel/pantherlake: Update SAF base address BUG=b:357011633 TEST=build and boot coreboot image on Google/Fatcat board. Change-Id: I14fa8cf06144f46369cc8cab6087c790280e9859 Signed-off-by: Anil Kumar <anil.kumar.k(a)intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84863 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Subrata Banik <subratabanik(a)google.com> --- M src/soc/intel/pantherlake/include/soc/iomap.h 1 file changed, 1 insertion(+), 2 deletions(-) Approvals: build bot (Jenkins): Verified Subrata Banik: Looks good to me, approved diff --git a/src/soc/intel/pantherlake/include/soc/iomap.h b/src/soc/intel/pantherlake/include/soc/iomap.h index 2ecd28e..0bd5697 100644 --- a/src/soc/intel/pantherlake/include/soc/iomap.h +++ b/src/soc/intel/pantherlake/include/soc/iomap.h @@ -16,8 +16,7 @@ #define MCH_BASE_SIZE 0x20000 /* System Agent Fabric (SAF) */ -/* TODO: Update with latest value */ -#define SAF_BASE_ADDRESS 0x3ffe000000 +#define SAF_BASE_ADDRESS 0xfa000000 #define SAF_BASE_SIZE 0x2000000 /* Add dummy entry to cater common/block/acpi/acpi/northbridge.asl */ -- To view, visit https://review.coreboot.org/c/coreboot/+/84863?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I14fa8cf06144f46369cc8cab6087c790280e9859 Gerrit-Change-Number: 84863 Gerrit-PatchSet: 5 Gerrit-Owner: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Hannah Williams <hannah.williams(a)intel.com>

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[XS] Change in coreboot[main]: xcompile: Use Walloc-size GCC option
by Elyes Haouas (Code Review) 11 Nov '24

11 Nov '24

Attention is currently required from: Felix Singer, Martin L Roth, Paul Menzel. Hello Martin L Roth, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/84074?usp=email to look at the new patch set (#9). Change subject: xcompile: Use Walloc-size GCC option ...................................................................... xcompile: Use Walloc-size GCC option Warn about allocation function calls with insufficient size for the target type of the pointer. commit 6ab188ee6c99 (`Makefile.mk: Use Walloc-size GCC option`) added this GCC option, but commit d05fe9fd3 (`Revert "Makefile.mk: Use Walloc-size GCC option"`) reverted it as old GCC didn't support it. So enable it for modern GCC version. Change-Id: If5d36b073bb5b4cccb0cf2b67b43edb3f97f168c Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> --- M util/xcompile/xcompile 1 file changed, 3 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/84074/9 -- To view, visit https://review.coreboot.org/c/coreboot/+/84074?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If5d36b073bb5b4cccb0cf2b67b43edb3f97f168c Gerrit-Change-Number: 84074 Gerrit-PatchSet: 9 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org>

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[XS] Change in coreboot[main]: Makefile.mk: Remove Wno-packed-not-aligned flag
by Elyes Haouas (Code Review) 11 Nov '24

11 Nov '24

Attention is currently required from: Felix Singer, Martin L Roth, Paul Menzel. Elyes Haouas has posted comments on this change by Elyes Haouas. ( https://review.coreboot.org/c/coreboot/+/84562?usp=email ) Change subject: Makefile.mk: Remove Wno-packed-not-aligned flag ...................................................................... Patch Set 11: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/84562/comment/b939d92e_eb3df349?us… : PS10, Line 8: > `Please use git commit description style 'commit <12+ chars of sha1> ("<title line>")' - ie: 'commit 035ee6a66836 ("Makefile.inc: disable warnings on unaligned struct members")'` Please fix. -- To view, visit https://review.coreboot.org/c/coreboot/+/84562?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I8759603ff7b2c75e4a863a25c796781544be14ed Gerrit-Change-Number: 84562 Gerrit-PatchSet: 11 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Mon, 11 Nov 2024 02:26:49 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: Makefile.mk: Remove Wno-packed-not-aligned flag
by Elyes Haouas (Code Review) 11 Nov '24

11 Nov '24

Attention is currently required from: Felix Singer, Martin L Roth, Paul Menzel. Hello Martin L Roth, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/84562?usp=email to look at the new patch set (#11). Change subject: Makefile.mk: Remove Wno-packed-not-aligned flag ...................................................................... Makefile.mk: Remove Wno-packed-not-aligned flag commit 035ee6a66836 (Makefile.inc: disable warnings on unaligned struct members) added Wno-packed-not-aligned to silent GCC warning. Now, this GCC's flag is not needed anymore. Change-Id: I8759603ff7b2c75e4a863a25c796781544be14ed Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> --- M Makefile.mk 1 file changed, 0 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/62/84562/11 -- To view, visit https://review.coreboot.org/c/coreboot/+/84562?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I8759603ff7b2c75e4a863a25c796781544be14ed Gerrit-Change-Number: 84562 Gerrit-PatchSet: 11 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org>

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[S] Change in coreboot[main]: southbridge/intel/common: Improve ACPI _PRT method generation
by Name of user not set (Code Review) 11 Nov '24

11 Nov '24

Attention is currently required from: Angel Pons, Felix Held, Shuo Liu. yuchi.chen(a)intel.com has posted comments on this change by yuchi.chen(a)intel.com. ( https://review.coreboot.org/c/coreboot/+/85013?usp=email ) Change subject: southbridge/intel/common: Improve ACPI _PRT method generation ...................................................................... Patch Set 6: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/85013/comment/8335d73b_4d220dfa?us… : PS5, Line 7: Imrpove > Typo? Improve Done -- To view, visit https://review.coreboot.org/c/coreboot/+/85013?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I867a0c74e633ddfe63d29870f9fd50ca883c2e78 Gerrit-Change-Number: 85013 Gerrit-PatchSet: 6 Gerrit-Owner: yuchi.chen(a)intel.com Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Mon, 11 Nov 2024 02:24:30 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com>

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[XL] Change in coreboot[main]: soc/intel/snowridge: Add support for Intel Atom Snow Ridge SoC
by Name of user not set (Code Review) 11 Nov '24

11 Nov '24

Attention is currently required from: Angel Pons, Elyes Haouas, Felix Held, Felix Singer, Frans Hendriks, Jérémy Compostella, Paul Menzel, Vasiliy Khoruzhick, yuchi.chen(a)intel.com. Hello Angel Pons, Felix Held, Jérémy Compostella, Shuo Liu, Vasiliy Khoruzhick, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/83321?usp=email to look at the new patch set (#51). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: soc/intel/snowridge: Add support for Intel Atom Snow Ridge SoC ...................................................................... soc/intel/snowridge: Add support for Intel Atom Snow Ridge SoC Change-Id: I32ad836dfaaff0d1816eac41e5a7d19ece11080f Signed-off-by: Yuchi Chen <yuchi.chen(a)intel.com> Tested-by: Vasiliy Khoruzhick <vasilykh(a)arista.com> --- A src/soc/intel/snowridge/Kconfig A src/soc/intel/snowridge/Makefile.mk A src/soc/intel/snowridge/acpi.c A src/soc/intel/snowridge/acpi/hostbridges.asl A src/soc/intel/snowridge/acpi/pch_irqs.asl A src/soc/intel/snowridge/acpi/pcie.asl A src/soc/intel/snowridge/acpi/pcie_port.asl A src/soc/intel/snowridge/acpi/pmc.asl A src/soc/intel/snowridge/acpi/southcluster.asl A src/soc/intel/snowridge/acpi/uncore.asl A src/soc/intel/snowridge/bootblock/bootblock.c A src/soc/intel/snowridge/bootblock/bootblock.h A src/soc/intel/snowridge/bootblock/early_uart_init.c A src/soc/intel/snowridge/chip.c A src/soc/intel/snowridge/chip.h A src/soc/intel/snowridge/common/fsp_hob.c A src/soc/intel/snowridge/common/fsp_hob.h A src/soc/intel/snowridge/common/gpio.c A src/soc/intel/snowridge/common/hob_display.c A src/soc/intel/snowridge/common/kti_cache.c A src/soc/intel/snowridge/common/kti_cache.h A src/soc/intel/snowridge/common/pmclib.c A src/soc/intel/snowridge/common/reset.c A src/soc/intel/snowridge/common/spi.c A src/soc/intel/snowridge/common/systemagent_early.c A src/soc/intel/snowridge/common/uart8250mem.c A src/soc/intel/snowridge/common/uart8250mem.h A src/soc/intel/snowridge/common/upd_display.c A src/soc/intel/snowridge/cpu.c A src/soc/intel/snowridge/dlb.c A src/soc/intel/snowridge/finalize.c A src/soc/intel/snowridge/heci.c A src/soc/intel/snowridge/include/soc/acpi.h A src/soc/intel/snowridge/include/soc/cpu.h A src/soc/intel/snowridge/include/soc/gpio.h A src/soc/intel/snowridge/include/soc/gpio_defs.h A src/soc/intel/snowridge/include/soc/gpio_snr.h A src/soc/intel/snowridge/include/soc/iomap.h A src/soc/intel/snowridge/include/soc/irq.h A src/soc/intel/snowridge/include/soc/lpc.h A src/soc/intel/snowridge/include/soc/msr.h A src/soc/intel/snowridge/include/soc/nvs.h A src/soc/intel/snowridge/include/soc/p2sb.h A src/soc/intel/snowridge/include/soc/pci_devs.h A src/soc/intel/snowridge/include/soc/pcr_gpmr.h A src/soc/intel/snowridge/include/soc/pcr_ids.h A src/soc/intel/snowridge/include/soc/pm.h A src/soc/intel/snowridge/include/soc/pmc.h A src/soc/intel/snowridge/include/soc/sata.h A src/soc/intel/snowridge/include/soc/smbus.h A src/soc/intel/snowridge/include/soc/soc_chip.h A src/soc/intel/snowridge/include/soc/systemagent.h A src/soc/intel/snowridge/itss.c A src/soc/intel/snowridge/lockdown.c A src/soc/intel/snowridge/lpc.c A src/soc/intel/snowridge/nis.c A src/soc/intel/snowridge/qat.c A src/soc/intel/snowridge/ramstage.h A src/soc/intel/snowridge/romstage/gpio_snr.c A src/soc/intel/snowridge/romstage/romstage.c A src/soc/intel/snowridge/sata.c A src/soc/intel/snowridge/smihandler.c A src/soc/intel/snowridge/sriov.c A src/soc/intel/snowridge/systemagent.c 64 files changed, 4,925 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/83321/51 -- To view, visit https://review.coreboot.org/c/coreboot/+/83321?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I32ad836dfaaff0d1816eac41e5a7d19ece11080f Gerrit-Change-Number: 83321 Gerrit-PatchSet: 51 Gerrit-Owner: yuchi.chen(a)intel.com Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Vasiliy Khoruzhick <vasilykh(a)arista.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-CC: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-CC: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: yuchi.chen(a)intel.com Gerrit-Attention: Vasiliy Khoruzhick <vasilykh(a)arista.com> Gerrit-Attention: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr>

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[S] Change in coreboot[main]: southbridge/intel/common: Improve ACPI _PRT method generation
by Name of user not set (Code Review) 11 Nov '24

11 Nov '24

Attention is currently required from: Angel Pons, Felix Held, Shuo Liu, yuchi.chen(a)intel.com. Hello Angel Pons, Felix Held, Shuo Liu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/85013?usp=email to look at the new patch set (#6). The following approvals got outdated and were removed: Code-Review+1 by Shuo Liu, Code-Review+2 by Angel Pons, Verified+1 by build bot (Jenkins) Change subject: southbridge/intel/common: Improve ACPI _PRT method generation ...................................................................... southbridge/intel/common: Improve ACPI _PRT method generation Add a scope parameter for `intel_write_pci0_PRT()` so that it could be reused for multiple domains. Change-Id: I867a0c74e633ddfe63d29870f9fd50ca883c2e78 Signed-off-by: Yuchi Chen <yuchi.chen(a)intel.com> --- M src/soc/intel/common/block/irq/irq.c M src/southbridge/intel/common/acpi_pirq_gen.c M src/southbridge/intel/common/acpi_pirq_gen.h M src/southbridge/intel/common/rcba_pirq.c 4 files changed, 7 insertions(+), 10 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/85013/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/85013?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I867a0c74e633ddfe63d29870f9fd50ca883c2e78 Gerrit-Change-Number: 85013 Gerrit-PatchSet: 6 Gerrit-Owner: yuchi.chen(a)intel.com Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: yuchi.chen(a)intel.com Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de>

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coreboot-gerrit November 2024