coreboot-gerrit January 2024

coreboot-gerrit@coreboot.org

1 participants
3044 discussions

[S] Change in coreboot[main]: mb/amd/onyx_poc: Add and use APCB configuration data
by Varshit Pandya (Code Review) 25 Jan '24

25 Jan '24

Attention is currently required from: Felix Held, Paul Menzel, Varshit Pandya. Hello Felix Held, Matt DeVillier, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/80204?usp=email to look at the new patch set (#6). Change subject: mb/amd/onyx_poc: Add and use APCB configuration data ...................................................................... mb/amd/onyx_poc: Add and use APCB configuration data This patch adds APCB blobs to the mainboard directory and it replaces CB:76445 Also this brings onyx_poc mainboard inline with how APCB are included in other AMD mainboard: commit 95d05d830162 ("mb/google/zork: Add and use APCB configuration data"), commit I352f58e0d39 ("mb/google/ skyrim: Add and use APCB configuration data") and commit I1c34528fa0f ("mb/amd/onyx_poc: Add and use APCB configuration data"). BUG=none TEST=build/boot onyx_poc Change-Id: I1c34528fa0fd15b847c22c995713078c60ac3873 Signed-off-by: Varshit Pandya <pandyavarshit(a)gmail.com> --- M src/mainboard/amd/onyx_poc/Makefile.mk A src/mainboard/amd/onyx_poc/data.apcb A src/mainboard/amd/onyx_poc/data1.apcb A src/mainboard/amd/onyx_poc/data_rec.apcb A src/mainboard/amd/onyx_poc/data_rec1.apcb A src/mainboard/amd/onyx_poc/data_rec2.apcb 6 files changed, 6 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/80204/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/80204?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1c34528fa0fd15b847c22c995713078c60ac3873 Gerrit-Change-Number: 80204 Gerrit-PatchSet: 6 Gerrit-Owner: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

1 0

[S] Change in coreboot[main]: mb/amd/onyx_poc: Add and use APCB configuration data
by Varshit Pandya (Code Review) 25 Jan '24

25 Jan '24

Attention is currently required from: Felix Held, Paul Menzel, Varshit Pandya. Hello Felix Held, Matt DeVillier, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/80204?usp=email to look at the new patch set (#5). The following approvals got outdated and were removed: Code-Review+2 by Felix Held, Verified+1 by build bot (Jenkins) Change subject: mb/amd/onyx_poc: Add and use APCB configuration data ...................................................................... mb/amd/onyx_poc: Add and use APCB configuration data This patch adds APCB blobs to the mainboard directory and it replaces https://review.coreboot.org/c/blobs/+/76445 Also this brings onyx_poc mainboard inline with how APCB are included in other AMD mainboard: commit 95d05d830162 ("mb/google/zork: Add and use APCB configuration data"), commit I352f58e0d39 ("mb/google/skyrim: Add and use APCB configuration data") and commit I1c34528fa0f ("mb/amd/onyx_poc: Add and use APCB configuration data") BUG=none TEST=build/boot onyx_poc Change-Id: I1c34528fa0fd15b847c22c995713078c60ac3873 Signed-off-by: Varshit Pandya <pandyavarshit(a)gmail.com> --- M src/mainboard/amd/onyx_poc/Makefile.mk A src/mainboard/amd/onyx_poc/data.apcb A src/mainboard/amd/onyx_poc/data1.apcb A src/mainboard/amd/onyx_poc/data_rec.apcb A src/mainboard/amd/onyx_poc/data_rec1.apcb A src/mainboard/amd/onyx_poc/data_rec2.apcb 6 files changed, 6 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/80204/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/80204?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1c34528fa0fd15b847c22c995713078c60ac3873 Gerrit-Change-Number: 80204 Gerrit-PatchSet: 5 Gerrit-Owner: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

1 0

[S] Change in coreboot[main]: nb/intel/*: Match ACPI with resource allocation
by Arthur Heymans (Code Review) 25 Jan '24

25 Jan '24

Attention is currently required from: Angel Pons, Felix Held, Nico Huber. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80207?usp=email ) Change subject: nb/intel/*: Match ACPI with resource allocation ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: > Numbers look good. The comment could be more accurate. Technically, it only > shouldn't be higher than what ACPI reports, so the OS doesn't get confused. Done. Updated comments. -- To view, visit https://review.coreboot.org/c/coreboot/+/80207?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I2ba0e96a7ab18d65b7fbbb38b1a979ea2ec6d1be Gerrit-Change-Number: 80207 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 25 Jan 2024 16:40:20 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: comment

1 0

[S] Change in coreboot[main]: nb/intel/*: Match ACPI with resource allocation
by Arthur Heymans (Code Review) 25 Jan '24

25 Jan '24

Attention is currently required from: Angel Pons, Arthur Heymans, Felix Held, Nico Huber. Hello Angel Pons, Felix Held, Nico Huber, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/80207?usp=email to look at the new patch set (#2). The following approvals got outdated and were removed: Code-Review+1 by Nico Huber, Verified+1 by build bot (Jenkins) Change subject: nb/intel/*: Match ACPI with resource allocation ...................................................................... nb/intel/*: Match ACPI with resource allocation Currently resource allocation starts top down from the default value 0xfe000000. This does not match what ACPI reports, so adapt CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT to reflect that. Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> Change-Id: I2ba0e96a7ab18d65b7fbbb38b1a979ea2ec6d1be --- M src/northbridge/intel/gm45/Kconfig M src/northbridge/intel/haswell/Kconfig M src/northbridge/intel/i945/Kconfig M src/northbridge/intel/ironlake/Kconfig M src/northbridge/intel/pineview/Kconfig M src/northbridge/intel/sandybridge/Kconfig M src/northbridge/intel/x4x/Kconfig 7 files changed, 28 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/80207/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/80207?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I2ba0e96a7ab18d65b7fbbb38b1a979ea2ec6d1be Gerrit-Change-Number: 80207 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

1 0

[XL] Change in coreboot[main]: mb/emulation: Add SIMICS QSP support
by Arthur Heymans (Code Review) 25 Jan '24

25 Jan '24

Attention is currently required from: Benjamin Doron, Lean Sheng Tan, Leon Groß, Nico Huber, Patrick Rudolph, Paul Menzel. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/77905?usp=email ) Change subject: mb/emulation: Add SIMICS QSP support ...................................................................... Patch Set 16: (1 comment) Patchset: PS4: > I don't see any benefit of having support for SIMICS default QSP target as it's emulating even less bits than QEMU. So this simulated target does not simulate a lot of hardware so this indeed is mostly a stub. So from the perspective of testing more stuff, it's not an added value. When SIMICS is used with another more real target, there is no use for this code. I was told that Intel uses this QSP target (internally) in SIMICS training, so mostly to people get familiar with both firmware building and testing it on this simulator. I think this use case is what makes this target a valuable addition to coreboot. -- To view, visit https://review.coreboot.org/c/coreboot/+/77905?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I175b20bb4746608e4d868aa96492fc06c149bd36 Gerrit-Change-Number: 77905 Gerrit-PatchSet: 16 Gerrit-Owner: Leon Groß <leon.gross(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Leon Groß <leon.gross(a)9elements.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Comment-Date: Thu, 25 Jan 2024 16:33:42 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Patrick Rudolph <patrick.rudolph(a)9elements.com> Comment-In-Reply-To: Benjamin Doron <benjamin.doron00(a)gmail.com> Comment-In-Reply-To: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-MessageType: comment

1 0

[S] Change in coreboot[main]: nb/intel/*: Match ACPI with resource allocation
by Nico Huber (Code Review) 25 Jan '24

25 Jan '24

Attention is currently required from: Angel Pons, Arthur Heymans, Felix Held. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80207?usp=email ) Change subject: nb/intel/*: Match ACPI with resource allocation ...................................................................... Patch Set 1: Code-Review+1 (1 comment) Patchset: PS1: Numbers look good. The comment could be more accurate. Technically, it only shouldn't be higher than what ACPI reports, so the OS doesn't get confused. -- To view, visit https://review.coreboot.org/c/coreboot/+/80207?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I2ba0e96a7ab18d65b7fbbb38b1a979ea2ec6d1be Gerrit-Change-Number: 80207 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 25 Jan 2024 16:30:40 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

[S] Change in coreboot[main]: nb/intel/*: Match ACPI with resource allocation
by Arthur Heymans (Code Review) 25 Jan '24

25 Jan '24

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/80207?usp=email ) Change subject: nb/intel/*: Match ACPI with resource allocation ...................................................................... nb/intel/*: Match ACPI with resource allocation Currently resource allocation starts top down from the default value 0xfe000000. This does not match what ACPI reports, so adapt CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT to reflect that. Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> Change-Id: I2ba0e96a7ab18d65b7fbbb38b1a979ea2ec6d1be --- M src/northbridge/intel/gm45/Kconfig M src/northbridge/intel/haswell/Kconfig M src/northbridge/intel/i945/Kconfig M src/northbridge/intel/ironlake/Kconfig M src/northbridge/intel/pineview/Kconfig M src/northbridge/intel/sandybridge/Kconfig M src/northbridge/intel/x4x/Kconfig 7 files changed, 28 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/80207/1 diff --git a/src/northbridge/intel/gm45/Kconfig b/src/northbridge/intel/gm45/Kconfig index 2a266b9..22625df 100644 --- a/src/northbridge/intel/gm45/Kconfig +++ b/src/northbridge/intel/gm45/Kconfig @@ -30,6 +30,10 @@ int default 64 +# This must match ACPI +config DOMAIN_RESOURCE_32BIT_LIMIT + default 0xfec00000 + config SMM_RESERVED_SIZE hex default 0x100000 diff --git a/src/northbridge/intel/haswell/Kconfig b/src/northbridge/intel/haswell/Kconfig index 4b83a25..0f89cfb 100644 --- a/src/northbridge/intel/haswell/Kconfig +++ b/src/northbridge/intel/haswell/Kconfig @@ -60,6 +60,10 @@ int default 64 +# This must match ACPI +config DOMAIN_RESOURCE_32BIT_LIMIT + default ECAM_MMCONF_BASE_ADDRESS + config DCACHE_RAM_BASE hex default 0xff7c0000 diff --git a/src/northbridge/intel/i945/Kconfig b/src/northbridge/intel/i945/Kconfig index 9c1a111..941250f 100644 --- a/src/northbridge/intel/i945/Kconfig +++ b/src/northbridge/intel/i945/Kconfig @@ -40,6 +40,10 @@ int default 64 +# This must match ACPI +config DOMAIN_RESOURCE_32BIT_LIMIT + default 0xfec00000 + config OVERRIDE_CLOCK_DISABLE bool default n diff --git a/src/northbridge/intel/ironlake/Kconfig b/src/northbridge/intel/ironlake/Kconfig index 502b99b..8dcfca1 100644 --- a/src/northbridge/intel/ironlake/Kconfig +++ b/src/northbridge/intel/ironlake/Kconfig @@ -46,6 +46,10 @@ config ECAM_MMCONF_BUS_NUMBER default 256 +# This must match ACPI +config DOMAIN_RESOURCE_32BIT_LIMIT + default 0xfec00000 + config INTEL_GMA_BCLV_OFFSET default 0x48254 diff --git a/src/northbridge/intel/pineview/Kconfig b/src/northbridge/intel/pineview/Kconfig index c652209..77df5f2 100644 --- a/src/northbridge/intel/pineview/Kconfig +++ b/src/northbridge/intel/pineview/Kconfig @@ -37,4 +37,8 @@ config FIXED_EPBAR_MMIO_BASE default 0xfed19000 +# This must match ACPI +config DOMAIN_RESOURCE_32BIT_LIMIT + default 0xfec00000 + endif diff --git a/src/northbridge/intel/sandybridge/Kconfig b/src/northbridge/intel/sandybridge/Kconfig index 34a0939..aeffd6e 100644 --- a/src/northbridge/intel/sandybridge/Kconfig +++ b/src/northbridge/intel/sandybridge/Kconfig @@ -103,6 +103,10 @@ int default 64 +# This must match ACPI +config DOMAIN_RESOURCE_32BIT_LIMIT + default ECAM_MMCONF_BASE_ADDRESS + config DCACHE_RAM_BASE hex default 0xfefe0000 diff --git a/src/northbridge/intel/x4x/Kconfig b/src/northbridge/intel/x4x/Kconfig index 248852e..bb62e38 100644 --- a/src/northbridge/intel/x4x/Kconfig +++ b/src/northbridge/intel/x4x/Kconfig @@ -27,6 +27,10 @@ int default 256 +# This must match ACPI +config DOMAIN_RESOURCE_32BIT_LIMIT + default 0xfec00000 + config SMM_RESERVED_SIZE hex default 0x100000 -- To view, visit https://review.coreboot.org/c/coreboot/+/80207?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I2ba0e96a7ab18d65b7fbbb38b1a979ea2ec6d1be Gerrit-Change-Number: 80207 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newchange

1 0

[XS] Change in coreboot[main]: util/crossgcc/buildgcc: Compile RISC-V GCC with medany
by Arthur Heymans (Code Review) 25 Jan '24

25 Jan '24

Attention is currently required from: Felix Held, Felix Singer, Martin L Roth, Maximilian Brune, Nico Huber. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80139?usp=email ) Change subject: util/crossgcc/buildgcc: Compile RISC-V GCC with medany ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/80139?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If5f07ce034686dd7fec160ea76838507c0ba7fa0 Gerrit-Change-Number: 80139 Gerrit-PatchSet: 1 Gerrit-Owner: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 25 Jan 2024 15:26:36 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

[S] Change in coreboot[main]: mb/amd/onyx_poc: Add and use APCB configuration data
by Varshit Pandya (Code Review) 25 Jan '24

25 Jan '24

Attention is currently required from: Paul Menzel, Varshit Pandya. Hello Felix Held, Matt DeVillier, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/80204?usp=email to look at the new patch set (#4). Change subject: mb/amd/onyx_poc: Add and use APCB configuration data ...................................................................... mb/amd/onyx_poc: Add and use APCB configuration data This patch adds APCB blobs to the mainboard directory and it replaces CB:76445. Also this brings onyx_poc mainboard inline with how APCB are included in other AMD mainboard, CB:79591, CB:79592 and CB:79593 BUG=none TEST=build/boot onyx_poc Change-Id: I1c34528fa0fd15b847c22c995713078c60ac3873 Signed-off-by: Varshit Pandya <pandyavarshit(a)gmail.com> --- M src/mainboard/amd/onyx_poc/Makefile.mk A src/mainboard/amd/onyx_poc/data.apcb A src/mainboard/amd/onyx_poc/data1.apcb A src/mainboard/amd/onyx_poc/data_rec.apcb A src/mainboard/amd/onyx_poc/data_rec1.apcb A src/mainboard/amd/onyx_poc/data_rec2.apcb 6 files changed, 6 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/80204/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/80204?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1c34528fa0fd15b847c22c995713078c60ac3873 Gerrit-Change-Number: 80204 Gerrit-PatchSet: 4 Gerrit-Owner: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: newpatchset

1 0

[S] Change in coreboot[main]: mb/amd/onyx_poc: Add and use APCB configuration data
by Varshit Pandya (Code Review) 25 Jan '24

25 Jan '24

Attention is currently required from: Paul Menzel, Varshit Pandya. Hello Felix Held, Matt DeVillier, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/80204?usp=email to look at the new patch set (#3). Change subject: mb/amd/onyx_poc: Add and use APCB configuration data ...................................................................... mb/amd/onyx_poc: Add and use APCB configuration data This patch adds APCB blobs to the mainboard directory and it replaces https://review.coreboot.org/c/blobs/+/76445 Also this brings onyx_poc mainboard inline with how APCB are included in other AMD mainboard: commit 95d05d830162 ("mb/google/zork: Add and use APCB configuration data"), commit I352f58e0d39 ("mb/google/skyrim: Add and use APCB configuration data") and commit I1c34528fa0f ("mb/amd/onyx_poc: Add and use APCB configuration data") BUG=none TEST=build/boot onyx_poc Change-Id: I1c34528fa0fd15b847c22c995713078c60ac3873 Signed-off-by: Varshit Pandya <pandyavarshit(a)gmail.com> --- M src/mainboard/amd/onyx_poc/Makefile.mk A src/mainboard/amd/onyx_poc/data.apcb A src/mainboard/amd/onyx_poc/data1.apcb A src/mainboard/amd/onyx_poc/data_rec.apcb A src/mainboard/amd/onyx_poc/data_rec1.apcb A src/mainboard/amd/onyx_poc/data_rec2.apcb 6 files changed, 6 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/80204/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/80204?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1c34528fa0fd15b847c22c995713078c60ac3873 Gerrit-Change-Number: 80204 Gerrit-PatchSet: 3 Gerrit-Owner: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: newpatchset

1 0

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit January 2024