coreboot-gerrit January 2024

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[main]: vc/amd: move verstage on PSP files to new psp_verstage folder
by Marshall Dawson (Code Review) 25 Jan '24

25 Jan '24

Attention is currently required from: Felix Held, Fred Reitberger, Jason Glenesk, Matt DeVillier. Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80209?usp=email ) Change subject: vc/amd: move verstage on PSP files to new psp_verstage folder ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/80209?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic47f8b18bc515600add7838f4c7afcb4fff7c004 Gerrit-Change-Number: 80209 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 25 Jan 2024 21:25:56 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[L] Change in coreboot[main]: device/device.h: Drop multiple links
by Arthur Heymans (Code Review) 25 Jan '24

25 Jan '24

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[L] Change in coreboot[main]: device/device.h: Drop multiple links
by Arthur Heymans (Code Review) 25 Jan '24

25 Jan '24

Attention is currently required from: Chen, Gang C, Felix Held, Fred Reitberger, Jason Glenesk, Jincheng Li, Jérémy Compostella, Martin L Roth, Matt DeVillier, Nico Huber. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78328?usp=email ) Change subject: device/device.h: Drop multiple links ...................................................................... Patch Set 13: (2 comments) Patchset: PS10: > > Per tests on SPR, APIC devices will link under a null attribute bus path_type after adding drop multiple links. > > > > is_cpu() will check the bus path_type to be one CPU_CLUSTER and that will lead to the failure return: > > > > bool is_cpu(const struct device *cpu) > > { > > return cpu->path.type == DEVICE_PATH_APIC && > > cpu->bus->dev->path.type == DEVICE_PATH_CPU_CLUSTER; > > } > > > > Append device tree print: > > > > [0m[SPEW ] Show all devs... After init.[0m > > [0m[SPEW ] Root Device: enabled 1[0m > > [0m[SPEW ] CPU_CLUSTER: 0: enabled 1[0m > > [0m[SPEW ] DOMAIN: 0000: enabled 1[0m > > [0m[SPEW ] PCI: 00:00.0: enabled 1[0m > > [0m[SPEW ] PCI: 00:18.0: enabled 0[0m > > ... > > [0m[SPEW ] DOMAIN: 0001: enabled 1[0m > > ... > > [0m[SPEW ] PCI: 00:00.3: enabled 1[0m > > [0m[SPEW ] PCI: 00:14.4: enabled 1[0m > > [0m[SPEW ] PCI: 01:00.0: enabled 1[0m > > [0m[SPEW ] PCI: 02:00.0: enabled 1[0m > > [0m[SPEW ] PCI: 03:00.0: enabled 1[0m > > [0m[SPEW ] PNP: 002e.4: enabled 1[0m > > [0m[SPEW ] PNP: 002e.5: enabled 1[0m > > [0m[SPEW ] PNP: 002e.7: enabled 1[0m > > [0m[SPEW ] PNP: 002e.d: enabled 1[0m > > [0m[SPEW ] PNP: 002e.e: enabled 1[0m > > [0m[SPEW ] PCI: 15:00.0: enabled 1[0m > > [0m[SPEW ] PCI: 15:00.1: enabled 1[0m > > ... > > [0m[SPEW ] GENERIC: 0.0: enabled 1[0m > > [0m[SPEW ] GENERIC: 0.0: enabled 1[0m > > [0m[SPEW ] GENERIC: 0.0: enabled 1[0m > > [0m[SPEW ] GENERIC: 0.0: enabled 1[0m > > [0m[SPEW ] APIC: 00: enabled 1[0m > > [0m[SPEW ] APIC: 05: enabled 1[0m > > [0m[SPEW ] APIC: 07: enabled 1[0m > > ... > > [0m[DEBUG] BS: BS_DEV_INIT run times (exec / console): 4100 / 3120 ms[0m > > > > Suggest to delete "cpu->bus->dev->path.type == DEVICE_PATH_CPU_CLUSTER;" check in is_cpu() > > I'm not entirely sure what's going on but v10 had some flaws that ought to be fixed in the latest revision. Could you check again? Latest patchset (14) fixes this, I believe. Thanks for reporting. Patchset: PS13: > the first test was with edk2 payload; using linux + seabios resulted in a more helpful error; there the linux kernel says: > ACPI: No LAPIC entries present > AMD-Vi: [Frmware Bug]: : No southbridge IOAPIC found Latest patchset should fix this I believe. -- To view, visit https://review.coreboot.org/c/coreboot/+/78328?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iab6fe269faef46ae77ed1ea425440cf5c7dbd49b Gerrit-Change-Number: 78328 Gerrit-PatchSet: 13 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 25 Jan 2024 21:14:18 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Comment-In-Reply-To: Jincheng Li <jincheng.li(a)intel.com> Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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[L] Change in coreboot[main]: device/device.h: Rename busses for clarity
by Arthur Heymans (Code Review) 25 Jan '24

25 Jan '24

Attention is currently required from: Angel Pons, Arthur Heymans, Caveh Jalali, Chen, Gang C, Christian Walter, Cliff Huang, Dinesh Gehlot, Eran Mitrani, Eric Lai, Felix Held, Forest Mittelberg, Fred Reitberger, Jakub Czapiga, Jason Glenesk, Jason Nien, Jeff Daly, Jincheng Li, Johnny Lin, Jérémy Compostella, Kapil Porwal, Lance Zhao, Martin L Roth, Martin Roth, Matt DeVillier, Michał Żygowski, Nick Vaccaro, Piotr Król, Sean Rhodes, Shuo Liu, Subrata Banik, Tarun, Tim Chu, Tim Wawrzynczak, Vanessa Eusebio, Varshit Pandya, Werner Zeh. Hello Angel Pons, Caveh Jalali, Chen, Gang C, Christian Walter, Cliff Huang, Dinesh Gehlot, Eran Mitrani, Eric Lai, Felix Held, Forest Mittelberg, Fred Reitberger, Jakub Czapiga, Jason Glenesk, Jason Nien, Jeff Daly, Jincheng Li, Johnny Lin, Jérémy Compostella, Kapil Porwal, Lance Zhao, Martin L Roth, Martin Roth, Matt DeVillier, Michał Żygowski, Nick Vaccaro, Piotr Król, Sean Rhodes, Shuo Liu, Subrata Banik, Tarun, Tim Chu, Tim Wawrzynczak, Vanessa Eusebio, Varshit Pandya, Werner Zeh, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/78330?usp=email to look at the new patch set (#20). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: device/device.h: Rename busses for clarity ...................................................................... device/device.h: Rename busses for clarity This renames bus to upstream and link_list to downstream. Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> Change-Id: I80a81b6b8606e450ff180add9439481ec28c2420 --- M src/acpi/acpi.c M src/acpi/device.c M src/arch/x86/mpspec.c M src/cpu/intel/haswell/haswell_init.c M src/cpu/intel/model_2065x/model_2065x_init.c M src/cpu/intel/model_206ax/model_206ax_init.c M src/device/cardbus_device.c M src/device/device.c M src/device/device_const.c M src/device/device_util.c M src/device/i2c_bus.c M src/device/mdio.c M src/device/oprom/realmode/x86.c M src/device/oprom/realmode/x86_interrupts.c M src/device/oprom/yabel/device.c M src/device/oprom/yabel/interrupt.c M src/device/pci_device.c M src/device/pci_rom.c M src/device/pciexp_device.c M src/device/pcix_device.c M src/device/pnp_device.c M src/device/resource_allocator_v4.c M src/device/root_device.c M src/drivers/i2c/ptn3460/ptn3460.c M src/drivers/intel/dptf/dptf.c M src/drivers/intel/ish/ish.c M src/drivers/intel/mipi_camera/camera.c M src/drivers/intel/soundwire/soundwire.c M src/drivers/net/phy/m88e1512/m88e1512.c M src/drivers/net/r8168.c M src/drivers/nxp/uwb/uwb.c M src/drivers/pcie/generic/generic.c M src/drivers/spi/acpi/acpi.c M src/drivers/usb/hub/acpi.c M src/drivers/usb/pci_xhci/pci_xhci.c M src/drivers/wifi/generic/acpi.c M src/drivers/wifi/generic/smbios.c M src/drivers/wwan/fm/acpi_fm350gl.c M src/ec/google/chromeec/ec_acpi.c M src/include/device/device.h M src/include/device/pci_ops.h M src/lib/smbios.c M src/mainboard/aopen/dxplplusu/acpi_tables.c M src/mainboard/emulation/qemu-i440fx/northbridge.c M src/mainboard/google/brox/mainboard.c M src/mainboard/google/brya/mainboard.c M src/mainboard/google/kahlee/variants/careena/mainboard.c M src/mainboard/google/kahlee/variants/treeya/audio.c M src/mainboard/google/octopus/mainboard.c M src/mainboard/google/rex/mainboard.c M src/mainboard/google/zork/variants/baseboard/ramstage_common.c M src/mainboard/ibase/mb899/mptable.c M src/mainboard/kontron/986lcd-m/mptable.c M src/mainboard/pcengines/apu2/mainboard.c M src/mainboard/roda/rk9/ti_pci7xx1.c M src/mainboard/siemens/fa_ehl/mainboard.c M src/mainboard/siemens/mc_apl1/mainboard.c M src/mainboard/siemens/mc_apl1/variants/mc_apl3/mainboard.c M src/mainboard/siemens/mc_apl1/variants/mc_apl5/mainboard.c M src/mainboard/siemens/mc_apl1/variants/mc_apl6/mainboard.c M src/mainboard/siemens/mc_ehl/mainboard.c M src/northbridge/amd/pi/00730F01/northbridge.c M src/northbridge/intel/e7505/northbridge.c M src/northbridge/intel/gm45/northbridge.c M src/northbridge/intel/haswell/pcie.c M src/northbridge/intel/i440bx/northbridge.c M src/northbridge/intel/i945/northbridge.c M src/northbridge/intel/pineview/northbridge.c M src/northbridge/intel/sandybridge/pcie.c M src/northbridge/intel/x4x/northbridge.c M src/soc/amd/cezanne/xhci.c M src/soc/amd/common/block/acpi/ivrs.c M src/soc/amd/common/block/data_fabric/domain.c M src/soc/amd/common/block/lpc/lpc.c M src/soc/amd/genoa_poc/domain.c M src/soc/amd/glinda/xhci.c M src/soc/amd/mendocino/xhci.c M src/soc/amd/phoenix/xhci.c M src/soc/amd/picasso/xhci.c M src/soc/amd/stoneyridge/northbridge.c M src/soc/cavium/cn81xx/ecam0.c M src/soc/intel/apollolake/chip.c M src/soc/intel/braswell/southcluster.c M src/soc/intel/common/block/acpi/pep.c M src/soc/intel/common/block/lpc/lpc.c M src/soc/intel/common/block/pcie/rtd3/rtd3.c M src/soc/intel/common/block/usb4/pcie.c M src/soc/intel/common/block/xhci/xhci.c M src/soc/intel/denverton_ns/lpc.c M src/soc/intel/meteorlake/fsp_params.c M src/soc/intel/skylake/chip.c M src/soc/intel/xeon_sp/chip_common.c M src/soc/intel/xeon_sp/cpx/soc_acpi.c M src/soc/intel/xeon_sp/skx/soc_acpi.c M src/soc/intel/xeon_sp/spr/ioat.c M src/soc/intel/xeon_sp/spr/soc_acpi.c M src/soc/intel/xeon_sp/uncore.c M src/soc/intel/xeon_sp/uncore_acpi.c M src/southbridge/amd/pi/hudson/lpc.c M src/southbridge/intel/bd82x6x/pcie.c M src/superio/common/generic.c M src/superio/common/ssdt.c M src/superio/nuvoton/npcd378/superio.c M src/vendorcode/amd/opensil/genoa_poc/mpio/chip.c M util/sconfig/main.c 105 files changed, 349 insertions(+), 354 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/78330/20 -- To view, visit https://review.coreboot.org/c/coreboot/+/78330?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I80a81b6b8606e450ff180add9439481ec28c2420 Gerrit-Change-Number: 78330 Gerrit-PatchSet: 20 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Forest Mittelberg <bmbm(a)google.com> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Jeff Daly <jeffd(a)silicom-usa.com> Gerrit-Reviewer: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Attention: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Caveh Jalali <caveh(a)chromium.org> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Jeff Daly <jeffd(a)silicom-usa.com> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Tarun <tstuli(a)gmail.com> Gerrit-Attention: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Attention: Forest Mittelberg <bmbm(a)google.com> Gerrit-MessageType: newpatchset

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[L] Change in coreboot[main]: device/device.h: Drop multiple links
by Arthur Heymans (Code Review) 25 Jan '24

25 Jan '24

Attention is currently required from: Arthur Heymans, Chen, Gang C, Fred Reitberger, Jason Glenesk, Jincheng Li, Jérémy Compostella, Martin L Roth, Matt DeVillier, Nico Huber. Hello Chen, Gang C, Felix Held, Fred Reitberger, Jason Glenesk, Jincheng Li, Jérémy Compostella, Martin L Roth, Matt DeVillier, Shuo Liu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/78328?usp=email to look at the new patch set (#14). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: device/device.h: Drop multiple links ...................................................................... device/device.h: Drop multiple links Multiple links are unused throughout the tree and make the code more confusing as an iteration over all busses is needed to get downstream devices. This also not done consistently e.g. the allocator does not care about multiple links on busses. A better way of dealing multiple links below a device is to feature dummy devices with each their respective bus. This drops the sconfig capability to declare the same device multiple times which was previously used to declare multiple links. Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> Change-Id: Iab6fe269faef46ae77ed1ea425440cf5c7dbd49b --- M src/arch/x86/mpspec.c M src/device/device.c M src/device/device_util.c M src/device/pci_device.c M src/device/root_device.c M src/include/device/device.h M src/northbridge/amd/pi/00730F01/northbridge.c M src/soc/amd/common/block/acpi/ivrs.c M src/soc/amd/common/block/lpc/lpc.c M src/soc/amd/stoneyridge/northbridge.c M src/soc/intel/common/block/lpc/lpc.c M src/southbridge/amd/pi/hudson/lpc.c M util/sconfig/main.c M util/sconfig/sconfig.h M util/sconfig/sconfig.tab.c_shipped M util/sconfig/sconfig.y 16 files changed, 192 insertions(+), 362 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/78328/14 -- To view, visit https://review.coreboot.org/c/coreboot/+/78328?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iab6fe269faef46ae77ed1ea425440cf5c7dbd49b Gerrit-Change-Number: 78328 Gerrit-PatchSet: 14 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[main]: mb/google/rex/variants/deku: update USB-C port configuration
by Felix Held (Code Review) 25 Jan '24

25 Jan '24

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/80156?usp=email ) Change subject: mb/google/rex/variants/deku: update USB-C port configuration ...................................................................... mb/google/rex/variants/deku: update USB-C port configuration This CL update setting according to schematic v0.4. BUG=b:320201111 BRANCH=firmware-rex-15709.B TEST=Built FW image correctly. Change-Id: Ia4570d26ee9fd175ed9099bd057cee3c30c95704 Signed-off-by: Tony Huang <tony-huang(a)quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/80156 Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Reviewed-by: Subrata Banik <subratabanik(a)google.com> Reviewed-by: Eran Mitrani <mitrani(a)google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Derek Huang <derekhuang(a)google.com> --- M src/mainboard/google/rex/variants/deku/overridetree.cb 1 file changed, 5 insertions(+), 5 deletions(-) Approvals: Sumeet R Pawnikar: Looks good to me, but someone else must approve Eran Mitrani: Looks good to me, approved Derek Huang: Looks good to me, approved Subrata Banik: Looks good to me, approved build bot (Jenkins): Verified diff --git a/src/mainboard/google/rex/variants/deku/overridetree.cb b/src/mainboard/google/rex/variants/deku/overridetree.cb index 9c35338..711d3b6 100644 --- a/src/mainboard/google/rex/variants/deku/overridetree.cb +++ b/src/mainboard/google/rex/variants/deku/overridetree.cb @@ -117,21 +117,21 @@ register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" register "use_custom_pld" = "true" register "custom_pld" = "ACPI_PLD_TYPE_C(BACK, RIGHT, ACPI_PLD_GROUP(2, 1))" - device ref tcss_usb3_port1 on end + device ref tcss_usb3_port2 on end end chip drivers/usb/acpi register "desc" = ""USB3 Type-C Port C2"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" register "use_custom_pld" = "true" register "custom_pld" = "ACPI_PLD_TYPE_C(BACK, CENTER, ACPI_PLD_GROUP(3, 1))" - device ref tcss_usb3_port2 on end + device ref tcss_usb3_port1 on end end chip drivers/usb/acpi register "desc" = ""USB3 Type-C Port C3"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" register "use_custom_pld" = "true" register "custom_pld" = "ACPI_PLD_TYPE_C(FRONT, LEFT, ACPI_PLD_GROUP(4, 1))" - device ref tcss_usb3_port2 on end + device ref tcss_usb3_port3 on end end end end @@ -156,7 +156,7 @@ end chip drivers/intel/usb4/retimer register "dfp[1].power_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B22)" - use tcss_usb3_port3 as dfp[0].typec_port + use tcss_usb3_port3 as dfp[1].typec_port device generic 0 on end end end @@ -298,7 +298,7 @@ chip drivers/intel/pmc_mux/conn #USB2_C3 use usb2_port5 as usb2_port - use tcss_usb3_port1 as usb3_port + use tcss_usb3_port3 as usb3_port device generic 3 alias conn3 on end end end -- To view, visit https://review.coreboot.org/c/coreboot/+/80156?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia4570d26ee9fd175ed9099bd057cee3c30c95704 Gerrit-Change-Number: 80156 Gerrit-PatchSet: 2 Gerrit-Owner: Tony Huang <tony-huang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Derek Huang <derekhuang(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Kevin Chiu <kevin.chiu(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[L] Change in coreboot[main]: device/device.h: Drop multiple links
by Felix Held (Code Review) 25 Jan '24

25 Jan '24

Attention is currently required from: Arthur Heymans, Chen, Gang C, Fred Reitberger, Jason Glenesk, Jincheng Li, Jérémy Compostella, Martin L Roth, Matt DeVillier, Nico Huber. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78328?usp=email ) Change subject: device/device.h: Drop multiple links ...................................................................... Patch Set 13: (1 comment) Patchset: PS13: > tested patchset 13 and it seems to cause some weird behavior on mandolin. […] the first test was with edk2 payload; using linux + seabios resulted in a more helpful error; there the linux kernel says: ACPI: No LAPIC entries present AMD-Vi: [Frmware Bug]: : No southbridge IOAPIC found -- To view, visit https://review.coreboot.org/c/coreboot/+/78328?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iab6fe269faef46ae77ed1ea425440cf5c7dbd49b Gerrit-Change-Number: 78328 Gerrit-PatchSet: 13 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Comment-Date: Thu, 25 Jan 2024 20:54:29 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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[L] Change in coreboot[main]: device/device.h: Drop multiple links
by Felix Held (Code Review) 25 Jan '24

25 Jan '24

Attention is currently required from: Arthur Heymans, Chen, Gang C, Fred Reitberger, Jason Glenesk, Jincheng Li, Jérémy Compostella, Martin L Roth, Matt DeVillier, Nico Huber. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/78328?usp=email ) Change subject: device/device.h: Drop multiple links ...................................................................... Patch Set 13: (1 comment) Patchset: PS13: tested patchset 13 and it seems to cause some weird behavior on mandolin. windows booted, but rebooting it made it boot-loop and when trying to boot ubuntu the screen doesn't light up and show anything. haven't further debugged that, but it seems to me that this is causing some regression -- To view, visit https://review.coreboot.org/c/coreboot/+/78328?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iab6fe269faef46ae77ed1ea425440cf5c7dbd49b Gerrit-Change-Number: 78328 Gerrit-PatchSet: 13 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Comment-Date: Thu, 25 Jan 2024 20:50:24 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[main]: arch/arm64: Reformat C files with clang-format v16
by Julius Werner (Code Review) 25 Jan '24

25 Jan '24

Attention is currently required from: Martin L Roth. Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80009?usp=email ) Change subject: arch/arm64: Reformat C files with clang-format v16 ...................................................................... Patch Set 1: (2 comments) File src/arch/arm64/bl31.c: https://review.coreboot.org/c/coreboot/+/80009/comment/abe820c4_44dbefb4 : PS1, Line 22: .h = {.type = PARAM_EP, > No, the setting aren't that granular. We only have one setting for alignment with the brace. Ack, I guess I'll have to get used to it. File src/arch/arm64/romstage.c: https://review.coreboot.org/c/coreboot/+/80009/comment/767c34e9_3dfcae00 : PS1, Line 12: { /* no-op, for bring-up */ > We can tell it to keep the braces with nothing inside on a single line. […] Well, I think you have that setting already (see `__aeabi_unwind_cpp_pr0()` in `eabi_compat.c`), it just doesn't catch here because the comment makes the braces "not empty". That's why I'm suggesting moving the comment out. -- To view, visit https://review.coreboot.org/c/coreboot/+/80009?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I4543a416d16d2689d7962e9bc69de4ba703495fb Gerrit-Change-Number: 80009 Gerrit-PatchSet: 1 Gerrit-Owner: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Comment-Date: Thu, 25 Jan 2024 20:20:26 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Martin L Roth <gaumless(a)gmail.com> Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: soc/amd/common: Fix typo
by Felix Held (Code Review) 25 Jan '24

25 Jan '24

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/80161?usp=email ) Change subject: soc/amd/common: Fix typo ...................................................................... soc/amd/common: Fix typo Change-Id: Ida6e87908ae6996529057c8df12dbe046ee54b98 Signed-off-by: Varshit Pandya <pandyavarshit(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/80161 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Reviewed-by: Felix Held <felix-coreboot(a)felixheld.de> --- M src/soc/amd/common/fsp/pci/pcie_clk_req.c 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: Matt DeVillier: Looks good to me, approved build bot (Jenkins): Verified Felix Held: Looks good to me, approved diff --git a/src/soc/amd/common/fsp/pci/pcie_clk_req.c b/src/soc/amd/common/fsp/pci/pcie_clk_req.c index 881c650..a16b0de 100644 --- a/src/soc/amd/common/fsp/pci/pcie_clk_req.c +++ b/src/soc/amd/common/fsp/pci/pcie_clk_req.c @@ -7,7 +7,7 @@ #include <device/pci_ids.h> #include <soc/platform_descriptors.h> -/* Update gpp glk req config based on DXIO descriptors and enabled devices. */ +/* Update gpp clk req config based on DXIO descriptors and enabled devices. */ void pcie_gpp_dxio_update_clk_req_config(enum gpp_clk_req *gpp_clk_config, size_t gpp_clk_config_num) { -- To view, visit https://review.coreboot.org/c/coreboot/+/80161?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ida6e87908ae6996529057c8df12dbe046ee54b98 Gerrit-Change-Number: 80161 Gerrit-PatchSet: 2 Gerrit-Owner: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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