coreboot-gerrit January 2024

coreboot-gerrit@coreboot.org

1 participants
3044 discussions

[M] Change in coreboot[main]: soc/intel/xeon_sp: Initial support for PCI multi segment groups
by Patrick Rudolph (Code Review) 26 Jan '24

26 Jan '24

Attention is currently required from: Annie Chen, Arthur Heymans, Chen, Gang C, Christian Walter, David Hendricks, Jincheng Li, Johnny Lin, Naresh Solanki, Nill Ge, Shuo Liu, TangYiwei, Tim Chu. Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79878?usp=email ) Change subject: soc/intel/xeon_sp: Initial support for PCI multi segment groups ...................................................................... Patch Set 5: (1 comment) File src/soc/intel/xeon_sp/spr/ioat.c: https://review.coreboot.org/c/coreboot/+/79878/comment/f7d35359_7b3570e3 : PS4, Line 57: domain_to_pcie_segment_group(domain); > Information like busses are passed via arguments. I think doing that for segment makes sense too. […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/79878?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I0ba5e426123234979d746d3bdfc1ddfbd71c3447 Gerrit-Change-Number: 79878 Gerrit-PatchSet: 5 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Annie Chen <chen.annieet(a)inventec.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Naresh Solanki <naresh.solanki(a)9elements.com> Gerrit-Reviewer: Nill Ge <geshijian(a)bytedance.com> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: TangYiwei Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Annie Chen <chen.annieet(a)inventec.com> Gerrit-Attention: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Nill Ge <geshijian(a)bytedance.com> Gerrit-Attention: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Attention: TangYiwei Gerrit-Attention: Naresh Solanki <naresh.solanki(a)9elements.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Fri, 26 Jan 2024 09:02:49 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: mb/google/brya: Correct EC-is-trusted logic
by Qinghong Zeng (Code Review) 26 Jan '24

26 Jan '24

Attention is currently required from: Kapil Porwal, Nick Vaccaro, Qinghong Zeng, Reka Norman, Subrata Banik. Hello Eric Lai, Kapil Porwal, Nick Vaccaro, Reka Norman, Subrata Banik, Weimin Wu, Yu-Ping Wu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/80158?usp=email to look at the new patch set (#2). Change subject: mb/google/brya: Correct EC-is-trusted logic ...................................................................... mb/google/brya: Correct EC-is-trusted logic With Cr50, the GPIO EC_IN_RW is used to determine whether EC is trusted. However, with Ti50 where brya has been switched to, it is determined by Ti50's boot mode. If the boot mode is TRUSTED_RO, the VB2_CONTEXT_EC_TRUSTED flag will be set in check_boot_mode(). Therefore in the Ti50 case get_ec_is_trusted() can just return 0. The current code of get_ec_is_trusted() only checks the GPIO, which causes the EC to be always considered "trusted". Therefore, correct the return value to 0 for TPM_GOOGLE_TI50. BUG=b:321172119 TEST=emerge-nissa coreboot chromeos-bootimage TEST=firmware_DevMode passed in FAFT test Change-Id: I308f8b36411030911c4421d80827fc49ff325a1b Signed-off-by: zengqinghong <zengqinghong(a)huaqin.corp-partner.google.com> --- M src/mainboard/google/brya/chromeos.c 1 file changed, 4 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/58/80158/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/80158?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I308f8b36411030911c4421d80827fc49ff325a1b Gerrit-Change-Number: 80158 Gerrit-PatchSet: 2 Gerrit-Owner: Qinghong Zeng <zengqinghong(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Reka Norman <rekanorman(a)chromium.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Qinghong Zeng <zengqinghong(a)huaqin.corp-partner.google.com> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[main]: soc/intel/xeon_sp: Attach more stacks
by Patrick Rudolph (Code Review) 26 Jan '24

26 Jan '24

Attention is currently required from: Arthur Heymans, Christian Walter, Felix Held, Johnny Lin, Nico Huber, Shuo Liu, Tim Chu. Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80091?usp=email ) Change subject: soc/intel/xeon_sp: Attach more stacks ...................................................................... Patch Set 5: (1 comment) File src/soc/intel/xeon_sp/skx/soc_util.c: https://review.coreboot.org/c/coreboot/+/80091/comment/7c03772c_2221c911 : PS4, Line 62: bool is_ubox_stack_res(const STACK_RES *res) : { : return res->Personality == 0; : } > > We do not have tiogapass to validate and rely on community to confirm this. […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/80091?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I8f9d52dd117364a42de1c73d39cc86dafeaf2678 Gerrit-Change-Number: 80091 Gerrit-PatchSet: 5 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Fri, 26 Jan 2024 09:00:30 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Patrick Rudolph <patrick.rudolph(a)9elements.com> Comment-In-Reply-To: Shuo Liu <shuo.liu(a)intel.com> Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

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[M] Change in coreboot[main]: soc/intel/xeon_sp: Initial support for PCI multi segment groups
by Patrick Rudolph (Code Review) 26 Jan '24

26 Jan '24

Attention is currently required from: Annie Chen, Chen, Gang C, Christian Walter, David Hendricks, Jincheng Li, Johnny Lin, Naresh Solanki, Nill Ge, Shuo Liu, TangYiwei, Tim Chu. Hello Annie Chen, Arthur Heymans, Chen, Gang C, Christian Walter, David Hendricks, Jincheng Li, Johnny Lin, Naresh Solanki, Nill Ge, Shuo Liu, TangYiwei, Tim Chu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/79878?usp=email to look at the new patch set (#5). Change subject: soc/intel/xeon_sp: Initial support for PCI multi segment groups ...................................................................... soc/intel/xeon_sp: Initial support for PCI multi segment groups Add PCI enumeration support by reading the PCIeSegment reported in the FSP HOB and add it when creating the PCI domain for each stack. The PCI enumeration will be able to scan the additional PCI segment groups and properly handle those devices. Code that still hardcodes B:D:F numbers will not work when PCI multi segment support is enabled and need to be updated in future commits. In addition ACPI code generation needs to take PCI segment groups into account. Change-Id: I0ba5e426123234979d746d3bdfc1ddfbd71c3447 Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M src/soc/intel/xeon_sp/chip_common.c M src/soc/intel/xeon_sp/include/soc/chip_common.h M src/soc/intel/xeon_sp/spr/ioat.c 3 files changed, 48 insertions(+), 17 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/78/79878/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/79878?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I0ba5e426123234979d746d3bdfc1ddfbd71c3447 Gerrit-Change-Number: 79878 Gerrit-PatchSet: 5 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Annie Chen <chen.annieet(a)inventec.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Naresh Solanki <naresh.solanki(a)9elements.com> Gerrit-Reviewer: Nill Ge <geshijian(a)bytedance.com> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: TangYiwei Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Annie Chen <chen.annieet(a)inventec.com> Gerrit-Attention: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Nill Ge <geshijian(a)bytedance.com> Gerrit-Attention: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Attention: TangYiwei Gerrit-Attention: Naresh Solanki <naresh.solanki(a)9elements.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[main]: soc/intel/xeon_sp: Drop code to locate the UBOX bus
by Patrick Rudolph (Code Review) 26 Jan '24

26 Jan '24

Attention is currently required from: Arthur Heymans, Christian Walter, Johnny Lin, Tim Chu. Hello Arthur Heymans, Christian Walter, Johnny Lin, Tim Chu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/80102?usp=email to look at the new patch set (#6). Change subject: soc/intel/xeon_sp: Drop code to locate the UBOX bus ...................................................................... soc/intel/xeon_sp: Drop code to locate the UBOX bus Drop the code to retrieve the UBOX bus numbers. Only keep a minial function that works when called from socket0 to retrieve the bus for UBOX(1). Change-Id: I2b18f02f62b69ec7c73cd5665102cb6bfc6e64b5 Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M src/mainboard/ocp/deltalake/ramstage.c M src/soc/intel/xeon_sp/cpx/include/soc/soc_util.h M src/soc/intel/xeon_sp/cpx/soc_util.c M src/soc/intel/xeon_sp/skx/include/soc/soc_util.h M src/soc/intel/xeon_sp/skx/soc_util.c M src/soc/intel/xeon_sp/spr/include/soc/soc_util.h M src/soc/intel/xeon_sp/spr/soc_util.c M src/soc/intel/xeon_sp/util.c 8 files changed, 16 insertions(+), 35 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/80102/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/80102?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I2b18f02f62b69ec7c73cd5665102cb6bfc6e64b5 Gerrit-Change-Number: 80102 Gerrit-PatchSet: 6 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[main]: soc/intel/xeon_sp: Attach more stacks
by Patrick Rudolph (Code Review) 26 Jan '24

26 Jan '24

Attention is currently required from: Christian Walter, Felix Held, Johnny Lin, Nico Huber, Patrick Rudolph, Shuo Liu, Tim Chu. Hello Arthur Heymans, Christian Walter, Felix Held, Johnny Lin, Nico Huber, Shuo Liu, Tim Chu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/80091?usp=email to look at the new patch set (#5). The following approvals got outdated and were removed: Code-Review+1 by Shuo Liu, Verified+1 by build bot (Jenkins) Change subject: soc/intel/xeon_sp: Attach more stacks ...................................................................... soc/intel/xeon_sp: Attach more stacks Attach UBOX stacks as well and thus rename the function to attack_stacks. In order to use PCI drivers for UBOX devices, locating UBOX devices by vendor and device IDs and replacing device access by specifying S:B:D:F numbers, add a PCI domain for the UBOX stacks and let the PCI enumerator index all devices. Since there are no PCI BARs on the UBOX bus the PCI locator doesn't have to assign resources on those buses. Once all PCI devices on the UBOX stack can be located without knowing their UBOX bus number and PCI segment the Xeon-SP code can fully enable the multi PCI segment group support. Test: ibm/sbp1 (4S) is able to find all PCU devices by PCI ID. Change-Id: I8f9d52dd117364a42de1c73d39cc86dafeaf2678 Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M src/soc/intel/xeon_sp/chip_common.c M src/soc/intel/xeon_sp/cpx/soc_util.c M src/soc/intel/xeon_sp/include/soc/util.h M src/soc/intel/xeon_sp/skx/soc_util.c M src/soc/intel/xeon_sp/spr/soc_util.c 5 files changed, 91 insertions(+), 13 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/80091/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/80091?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I8f9d52dd117364a42de1c73d39cc86dafeaf2678 Gerrit-Change-Number: 80091 Gerrit-PatchSet: 5 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-MessageType: newpatchset

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[XS] Change in coreboot[main]: mb/google/brya: Correct EC-is-trusted logic
by Yu-Ping Wu (Code Review) 26 Jan '24

26 Jan '24

Attention is currently required from: Kapil Porwal, Nick Vaccaro, Qinghong Zeng, Reka Norman, Subrata Banik. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80158?usp=email ) Change subject: mb/google/brya: Correct EC-is-trusted logic ...................................................................... Patch Set 1: Code-Review+2 (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/80158/comment/f80d0920_8841672b : PS1, Line 21: firmware-DevMode firmware_DevMode I know it's from my typo in CB:64998. -- To view, visit https://review.coreboot.org/c/coreboot/+/80158?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I308f8b36411030911c4421d80827fc49ff325a1b Gerrit-Change-Number: 80158 Gerrit-PatchSet: 1 Gerrit-Owner: Qinghong Zeng <zengqinghong(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Reka Norman <rekanorman(a)chromium.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Qinghong Zeng <zengqinghong(a)huaqin.corp-partner.google.com> Gerrit-Comment-Date: Fri, 26 Jan 2024 08:39:22 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[main]: soc/intel/xeon_sp: Locate PCU by PCI device ID
by Patrick Rudolph (Code Review) 26 Jan '24

26 Jan '24

Attention is currently required from: Arthur Heymans, Christian Walter, Johnny Lin, Nico Huber, Shuo Liu, Tim Chu. Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80093?usp=email ) Change subject: soc/intel/xeon_sp: Locate PCU by PCI device ID ...................................................................... Patch Set 6: Code-Review-2 (1 comment) Patchset: PS6: I mixed CPX and ICX (both 3rd gen Xeon-SP). Need to revise the PCI IDs. -- To view, visit https://review.coreboot.org/c/coreboot/+/80093?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I06694715cba76b101165f1cef66d161b0f896b26 Gerrit-Change-Number: 80093 Gerrit-PatchSet: 6 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Fri, 26 Jan 2024 08:31:46 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/rex/variants/deku: Update memory table
by Tony Huang (Code Review) 26 Jan '24

26 Jan '24

Tony Huang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/80212?usp=email ) Change subject: mb/google/rex/variants/deku: Update memory table ...................................................................... mb/google/rex/variants/deku: Update memory table Update ram id table based on schematic. MT62F512M32D2DR-031 WT:B MT62F1G32D2DS-026 WT:B MT62F2G32D4DS-026 WT:B H58G56BK7BX068 K3KL6L60GM-MGCT BUG=b:320203629 TEST=Run part_id_gen tool without any errors Change-Id: I31538988d1329d9e2f45d862eb0ae05c0d6a179e Signed-off-by: Tony Huang <tony-huang(a)quanta.corp-partner.google.com> --- M src/mainboard/google/rex/variants/deku/memory/Makefile.mk M src/mainboard/google/rex/variants/deku/memory/dram_id.generated.txt M src/mainboard/google/rex/variants/deku/memory/mem_parts_used.txt 3 files changed, 15 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/12/80212/1 diff --git a/src/mainboard/google/rex/variants/deku/memory/Makefile.mk b/src/mainboard/google/rex/variants/deku/memory/Makefile.mk index 9620b9c..32a6775 100644 --- a/src/mainboard/google/rex/variants/deku/memory/Makefile.mk +++ b/src/mainboard/google/rex/variants/deku/memory/Makefile.mk @@ -1,7 +1,10 @@ # SPDX-License-Identifier: GPL-2.0-or-later # This is an auto-generated file. Do not edit!! # Generated by: -# /tmp/go-build2560620659/b001/exe/part_id_gen MTL lp5 src/mainboard/google/rex/variants/deku/memory src/mainboard/google/rex/variants/deku/memory/mem_parts_used.txt +# ./util/spd_tools/bin/part_id_gen MTL lp5 src/mainboard/google/rex/variants/deku/memory src/mainboard/google/rex/variants/deku/memory/mem_parts_used.txt SPD_SOURCES = -SPD_SOURCES += spd/lp5/set-0/spd-8.hex # ID = 0(0b0000) Parts = MT62F2G32D4DS-026 WT:B +SPD_SOURCES += spd/lp5/set-0/spd-1.hex # ID = 0(0b0000) Parts = MT62F512M32D2DR-031 WT:B +SPD_SOURCES += spd/lp5/set-0/spd-7.hex # ID = 1(0b0001) Parts = MT62F1G32D2DS-026 WT:B, H58G56BK7BX068 +SPD_SOURCES += spd/lp5/set-0/spd-8.hex # ID = 2(0b0010) Parts = MT62F2G32D4DS-026 WT:B +SPD_SOURCES += spd/lp5/set-0/spd-9.hex # ID = 3(0b0011) Parts = K3KL6L60GM-MGCT diff --git a/src/mainboard/google/rex/variants/deku/memory/dram_id.generated.txt b/src/mainboard/google/rex/variants/deku/memory/dram_id.generated.txt index 21b3f69..903aecf 100644 --- a/src/mainboard/google/rex/variants/deku/memory/dram_id.generated.txt +++ b/src/mainboard/google/rex/variants/deku/memory/dram_id.generated.txt @@ -1,7 +1,11 @@ # SPDX-License-Identifier: GPL-2.0-or-later # This is an auto-generated file. Do not edit!! # Generated by: -# /tmp/go-build2560620659/b001/exe/part_id_gen MTL lp5 src/mainboard/google/rex/variants/deku/memory src/mainboard/google/rex/variants/deku/memory/mem_parts_used.txt +# ./util/spd_tools/bin/part_id_gen MTL lp5 src/mainboard/google/rex/variants/deku/memory src/mainboard/google/rex/variants/deku/memory/mem_parts_used.txt DRAM Part Name ID to assign -MT62F2G32D4DS-026 WT:B 0 (0000) +MT62F512M32D2DR-031 WT:B 0 (0000) +MT62F1G32D2DS-026 WT:B 1 (0001) +MT62F2G32D4DS-026 WT:B 2 (0010) +H58G56BK7BX068 1 (0001) +K3KL6L60GM-MGCT 3 (0011) diff --git a/src/mainboard/google/rex/variants/deku/memory/mem_parts_used.txt b/src/mainboard/google/rex/variants/deku/memory/mem_parts_used.txt index 53ec721..4ab6ad0 100644 --- a/src/mainboard/google/rex/variants/deku/memory/mem_parts_used.txt +++ b/src/mainboard/google/rex/variants/deku/memory/mem_parts_used.txt @@ -9,4 +9,8 @@ # See util/spd_tools/README.md for more details and instructions. # Part Name +MT62F512M32D2DR-031 WT:B +MT62F1G32D2DS-026 WT:B MT62F2G32D4DS-026 WT:B +H58G56BK7BX068 +K3KL6L60GM-MGCT -- To view, visit https://review.coreboot.org/c/coreboot/+/80212?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I31538988d1329d9e2f45d862eb0ae05c0d6a179e Gerrit-Change-Number: 80212 Gerrit-PatchSet: 1 Gerrit-Owner: Tony Huang <tony-huang(a)quanta.corp-partner.google.com> Gerrit-MessageType: newchange

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[XL] Change in coreboot[main]: Docs: Replace Recommonmark with MyST Parser
by Nicholas Chin (Code Review) 26 Jan '24

26 Jan '24

Attention is currently required from: Angel Pons, Jason Glenesk, Martin L Roth. Nicholas Chin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/73158?usp=email ) Change subject: Docs: Replace Recommonmark with MyST Parser ...................................................................... Patch Set 6: Code-Review-1 (1 comment) Patchset: PS6: The docker files still need to be set up for MyST Parser -- To view, visit https://review.coreboot.org/c/coreboot/+/73158?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I0837c1722fa56d25c9441ea218e943d8f3d9b804 Gerrit-Change-Number: 73158 Gerrit-PatchSet: 6 Gerrit-Owner: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Daniel Maslowski <info(a)orangecms.org> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Fri, 26 Jan 2024 06:56:55 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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