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I'd like you to reexamine a change. Please visit
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Change subject: mb/google/guybrush: Update DDI descriptor definition
......................................................................
mb/google/guybrush: Update DDI descriptor definition
Update definition to be more intuitive and extensible.
Port descriptors will be defined as individual entities and added
to the descriptor list as such.
BUG=b:281059446
TEST=builds
Change-Id: Ib4ecbaaab5a21c30a67777a4522dc579cc9fa7e6
Signed-off-by: Jon Murphy <jpmurphy(a)google.com>
---
M src/mainboard/google/guybrush/port_descriptors.c
M src/mainboard/google/guybrush/variants/baseboard/include/baseboard/variants.h
M src/mainboard/google/guybrush/variants/baseboard/port_descriptors.c
M src/mainboard/google/guybrush/variants/dewatt/Makefile.inc
M src/mainboard/google/guybrush/variants/dewatt/variant.c
M src/mainboard/google/guybrush/variants/guybrush/variant.c
M src/mainboard/google/guybrush/variants/nipperkin/Makefile.inc
A src/mainboard/google/guybrush/variants/nipperkin/variant.c
8 files changed, 73 insertions(+), 43 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/79793/3
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Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79775?usp=email )
Change subject: Choose Correct FW splash screen at runtime
......................................................................
Patch Set 7:
(1 comment)
File src/lib/Kconfig:
https://review.coreboot.org/c/coreboot/+/79775/comment/45b4926a_9a5b84e5 :
PS6, Line 153: HAVE_CUSTOM_BMP_LOGO
> The HAVE_CUSTOM_BMP_LOGO config should be automatically selected by the CHROMEOS_FW_SPLASH_SCREEN Kconfig, so the user doesn't need to know about this flag.
This is good idea. I like this
>
> My understanding is all modern chromebooks just need:
>
> CONFIG_CHROMEOS_FW_SPLASH_SCREEN=y
> CONFIG_CB_LOGO_PATH=<cb_logo_path>
> CONFIG_CB_PLUS_LOGO_PATH=<cbplus_logo_path>
>
> old legacy chromebooks would still use the old construct:
> CONFIG_BMP_LOGO=y
> CONFIG_FSP2_0_LOGO_FILE_NAME=<logo_path>
Yes, I agree with above assumptions. Even the config CL i have submitted for Rex variants does what you have captured above.
I don't expect to see legacy devices for MTL. may be few Brya early 2023 launches are the one along with few Nissa device (may be).
>
> By legacy device, Subrata, you mean devices that don't have the factory config set correctly, right?
correct. Those devices are relying on RW VPD for factory flow.
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Change subject: soc/intel: Add config to use S3 over S0ix
......................................................................
Patch Set 2:
(1 comment)
Patchset:
PS2:
If I'm not wrong then S3 is not claimed support by Intel for MTL. Atleast this is what we have received so far that S3 path is not validated. hence, ideally we wish to bring any S3 support for supported SoC alone
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Change subject: Choose Correct FW splash screen at runtime
......................................................................
Patch Set 7:
(4 comments)
This change is ready for review.
File src/lib/Kconfig:
https://review.coreboot.org/c/coreboot/+/79775/comment/f341014f_d74d0205 :
PS6, Line 153: HAVE_CUSTOM_BMP_LOGO
> so, ideally all modern chromeos device should select this Kconfig ? to differentiate between previou […]
The HAVE_CUSTOM_BMP_LOGO config should be automatically selected by the CHROMEOS_FW_SPLASH_SCREEN Kconfig, so the user doesn't need to know about this flag.
My understanding is all modern chromebooks just need:
CONFIG_CHROMEOS_FW_SPLASH_SCREEN=y
CONFIG_CB_LOGO_PATH=<cb_logo_path>
CONFIG_CB_PLUS_LOGO_PATH=<cbplus_logo_path>
old legacy chromebooks would still use the old construct:
CONFIG_BMP_LOGO=y
CONFIG_FSP2_0_LOGO_FILE_NAME=<logo_path>
By legacy device, Subrata, you mean devices that don't have the factory config set correctly, right?
File src/vendorcode/google/chromeos/Kconfig:
https://review.coreboot.org/c/coreboot/+/79775/comment/072c4280_c954b430 :
PS6, Line 95: CBPLUS
> nit: CB_PLUS_LOGO_PATH ?
Sure, I can change it. I changed all the cbplus_logo references to cb_plus_logo to make it consistent as well.
File src/vendorcode/google/chromeos/Makefile.inc:
https://review.coreboot.org/c/coreboot/+/79775/comment/f30a7400_1bd2fdb4 :
PS6, Line 27: cb_logo.bmp-compression := $(CBFS_COMPRESS_FLAG)
> one blank line between CB and CB_plus assets ?
Done
https://review.coreboot.org/c/coreboot/+/79775/comment/92360227_2d5409a1 :
PS6, Line 33: ramstage-$(CONFIG_CHROMEOS_FW_SPLASH_SCREEN) += splash.c
> may be move this after line 21?
Done
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Change subject: mb/google/guybrush: Update DDI descriptor definition
......................................................................
Patch Set 2:
(1 comment)
File src/mainboard/google/guybrush/variants/baseboard/port_descriptors.c:
https://review.coreboot.org/c/coreboot/+/79793/comment/911c2d18_a29f107a :
PS2, Line 36: .connector_type = DDI_EDP,
: .aux_index = DDI_AUX1,
: .hdp_index = DDI_HDP1
> We can. […]
True. Maybe just delete the `baseboard/variant.c` file to force each variant to define the `variant_has_hdmi`. This way it's explicit and no one "forgets" or "doesn't know about" the function.
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Change subject: mb/google/guybrush: Update DDI descriptor definition
......................................................................
Patch Set 2:
(1 comment)
File src/mainboard/google/guybrush/variants/baseboard/port_descriptors.c:
https://review.coreboot.org/c/coreboot/+/79793/comment/8a36ee70_fde7b878 :
PS2, Line 36: .connector_type = DDI_EDP,
: .aux_index = DDI_AUX1,
: .hdp_index = DDI_HDP1
> Optional: Can we `#define` these like we did for the DXIO descriptors? We could then make the varian […]
We can. I wasn't sure if there was a lot of benefit in this case, but wanted to leave the option there if it was beneficial in the future. My assumption from the logic in the Dewatt/Guybrush variants is that some SKU's for those models do have an HDMI port, so we would still be defining it the default way and overriding. I could be wrong. WDYT?
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Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/79826?usp=email )
Change subject: soc/amd/picasso/Kconfig: select SOC_AMD_COMMON_BLOCK_EMMC_SKIP_POWEROFF
......................................................................
soc/amd/picasso/Kconfig: select SOC_AMD_COMMON_BLOCK_EMMC_SKIP_POWEROFF
Commit 850b6c6254ab ("soc/amd/picasso: add eMMC MMIO device to
devicetree") broke both S3 resume on Morphius SKUs that use an NVMe SSD
instead of an eMMC and boot on the currently out-of-tree ASRock X370
Killer SLI board. In the latter case, commenting out the
power_off_aoac_device call inside the emmc_enable function fixed things.
TEST=This fixes S3 resume on Morphius with NVMe SSD and an equivalent
change discussed in the patch mentioned above that caused the regression
also fixed boot on the ASRock board.
Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de>
Tested-by: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com>
Change-Id: Id976734c64efe7e0c3d8b073c8009849be291241
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79826
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com>
---
M src/soc/amd/picasso/Kconfig
1 file changed, 1 insertion(+), 0 deletions(-)
Approvals:
build bot (Jenkins): Verified
Matt DeVillier: Looks good to me, approved
diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig
index 796fe4e..ee5e130 100644
--- a/src/soc/amd/picasso/Kconfig
+++ b/src/soc/amd/picasso/Kconfig
@@ -38,6 +38,7 @@
select SOC_AMD_COMMON_BLOCK_DATA_FABRIC_DOMAIN
select SOC_AMD_COMMON_BLOCK_DATA_FABRIC_NP_REGION
select SOC_AMD_COMMON_BLOCK_EMMC
+ select SOC_AMD_COMMON_BLOCK_EMMC_SKIP_POWEROFF
select SOC_AMD_COMMON_BLOCK_GRAPHICS
select SOC_AMD_COMMON_BLOCK_HAS_ESPI
select SOC_AMD_COMMON_BLOCK_HDA
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Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/79825?usp=email )
Change subject: soc/amd/common/emmc: add Kconfig option to skip powering off eMMC
......................................................................
soc/amd/common/emmc: add Kconfig option to skip powering off eMMC
Add a Kconfig option to skip powering off the eMMC controller via the
AOAC block in the case where the eMMC controller is disabled in the
devicetree.
Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de>
Change-Id: I0dbe819222972d9bf0789671b031ad83648e8917
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79825
Reviewed-by: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
---
M src/soc/amd/common/block/emmc/Kconfig
M src/soc/amd/common/block/emmc/emmc.c
2 files changed, 8 insertions(+), 1 deletion(-)
Approvals:
build bot (Jenkins): Verified
Matt DeVillier: Looks good to me, approved
diff --git a/src/soc/amd/common/block/emmc/Kconfig b/src/soc/amd/common/block/emmc/Kconfig
index 96bbada..6316841 100644
--- a/src/soc/amd/common/block/emmc/Kconfig
+++ b/src/soc/amd/common/block/emmc/Kconfig
@@ -2,3 +2,10 @@
bool
help
Select this option to use AMD common EMMC driver support.
+
+config SOC_AMD_COMMON_BLOCK_EMMC_SKIP_POWEROFF
+ bool
+ depends on SOC_AMD_COMMON_BLOCK_EMMC
+ help
+ Select this option to try to switch off the power of the eMMC
+ controller via the AOAC registers.
diff --git a/src/soc/amd/common/block/emmc/emmc.c b/src/soc/amd/common/block/emmc/emmc.c
index 09d2350..9242d71 100644
--- a/src/soc/amd/common/block/emmc/emmc.c
+++ b/src/soc/amd/common/block/emmc/emmc.c
@@ -12,7 +12,7 @@
static void emmc_enable(struct device *dev)
{
- if (!dev->enabled)
+ if (!dev->enabled && !CONFIG(SOC_AMD_COMMON_BLOCK_EMMC_SKIP_POWEROFF))
power_off_aoac_device(FCH_AOAC_DEV_EMMC);
}
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