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Change subject: mb/google/nissa/var/anraggar: Add FW_CONFIG probe for mipi camera
......................................................................
Patch Set 1:
(1 comment)
File src/mainboard/google/brya/variants/anraggar/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/79802/comment/6721fbdd_f1ac6475 :
PS1, Line 4: option UF_1080P 1
why add the field you don't use?
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Change subject: mb/intel/mtlrvp: define a new config for Chrome EC
......................................................................
Patch Set 4: Code-Review+2
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Change subject: mb/intel/mtlrvp: streamline Chrome EC configs
......................................................................
Patch Set 11: Code-Review+2
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Shuo Liu has uploaded a new patch set (#15) to the change originally created by Arthur Heymans. ( https://review.coreboot.org/c/coreboot/+/78327?usp=email )
The following approvals got outdated and were removed:
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Change subject: soc/intel/xeon_sp: Redesign resource allocation
......................................................................
soc/intel/xeon_sp: Redesign resource allocation
The xeon_sp code worked around the coreboot allocator rather than using it.
Now the allocator is able to deal with the multiple IIOs so this is not
necessary anymore.
Instead do the following:
- Parse the FSP HOB information about IIO into coreboot PCI domains
- Use existing scan_bus and read_resource
- Handle DINO stacks with multiple domains in soc-specific code
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
Signed-off-by: Nico Huber <nico.h(a)gmx.de>
Signed-off-by: Shuo Liu <shuo.liu(a)intel.com>
Change-Id: Idb29c24b71a18e2e092f9d4953d106e6ca0a5fe1
---
M src/soc/intel/xeon_sp/Kconfig
M src/soc/intel/xeon_sp/acpi.c
M src/soc/intel/xeon_sp/chip_common.c
M src/soc/intel/xeon_sp/cpx/chip.c
M src/soc/intel/xeon_sp/cpx/soc_util.c
M src/soc/intel/xeon_sp/include/soc/chip_common.h
M src/soc/intel/xeon_sp/include/soc/util.h
M src/soc/intel/xeon_sp/memmap.c
M src/soc/intel/xeon_sp/skx/chip.c
M src/soc/intel/xeon_sp/skx/soc_util.c
M src/soc/intel/xeon_sp/spr/Kconfig
M src/soc/intel/xeon_sp/spr/Makefile.inc
M src/soc/intel/xeon_sp/spr/chip.c
A src/soc/intel/xeon_sp/spr/ioat.c
M src/soc/intel/xeon_sp/spr/soc_acpi.c
M src/soc/intel/xeon_sp/spr/soc_util.c
M src/soc/intel/xeon_sp/util.c
17 files changed, 259 insertions(+), 531 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/78327/15
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Change subject: soc/intel/xeon_sp: Allocate resources above 4G
......................................................................
soc/intel/xeon_sp: Allocate resources above 4G
This makes sure that prefetchable mem64 memory gets allocated above 4G
which allows non prefetchable resources to be allocated in the tight
window below 4G.
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
Change-Id: I27d4f9ce91c12ed4ab3b2f18f2a92b742115d275
---
M src/soc/intel/xeon_sp/Kconfig
1 file changed, 3 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/58/79058/9
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Change subject: device/Kconfig: Add an option to allocate above 4G by default
......................................................................
device/Kconfig: Add an option to allocate above 4G by default
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
Change-Id: I01218a8a3efc4a5f8ba344808949ca6b8898525f
---
M src/device/Kconfig
M src/device/resource_allocator_v4.c
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David Ruth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79794?usp=email )
Change subject: mb/google/byra/var/*: Set WLAN device type back to pci
......................................................................
Patch Set 1:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/79794/comment/132cff5c_65e94dcb :
PS1, Line 12:
> Why only partially revert it?
Because https://review.coreboot.org/c/coreboot/+/79150 already partially reverted the LAN drivers, and I wanted to follow the example that was already set. I'm fine with a full revert, if you think that's more appropriate.
Patchset:
PS1:
> the problem that prompted this change was that the RP04. […]
I'm having difficulty verifying that this change doesn't introduce the same problem. I can't find the entry in the LPI constraint list with or without the change that introduced the issue I'm trying to fix, which leads me to believe I'm not using the right place. Note that I'm working with a pujjo device, and it never had an RP04 block to begin with (only RP01). It's possible that the device was unaffected, but unfortunately, I think it's more likely that I lack the familiarity with the issue to find it. I don't have a copy of Windows to test with (let alone any ability to debug it), unfortunately.
If you could help me out with how I'd be able to see the erroneous entry in the LPI constraint list, I'd be happy to verify whether or not this change reintroduces the issue. I would prefer that even if this change reintroduces the issue that some consideration is given to finding another way to solve the problem of erroneous entries in the LPI constraint list that doesn't break other functionality.
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Change subject: soc/nvidia: Put static keyword at the beginning of declarations
......................................................................
Patch Set 3:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/79856/comment/a1ca0db1_b0efadcc :
PS2, Line 8:
> Why? Coding style?
Done
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Hello Julius Werner, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/79856?usp=email
to look at the new patch set (#3).
Change subject: soc/nvidia: Put static keyword at the beginning of declarations
......................................................................
soc/nvidia: Put static keyword at the beginning of declarations
In order to comply with the more recent style of declarations, put the
static keyword at the beginning.
Fixes following GCC error when the related flag is set:
error: 'static' is not at beginning of declaration [-Werror=old-style-declaration]
Change-Id: Ida683319f7a0c428a9e4808821075abdd9fcb504
Signed-off-by: Felix Singer <felixsinger(a)posteo.net>
---
M src/soc/nvidia/tegra124/clock.c
M src/soc/nvidia/tegra210/clock.c
2 files changed, 6 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/79856/3
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Change subject: Makefile.inc: Enable Wold-style-declaration command option
......................................................................
Patch Set 11: Code-Review+2
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