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Felix Singer has uploaded a new patch set (#8) to the change originally created by Elyes Haouas. ( https://review.coreboot.org/c/coreboot/+/77532?usp=email )
The following approvals got outdated and were removed:
Code-Review+2 by Felix Singer
Change subject: southbridge: Remove last dummy SOUTH_BRIDGE_OPTIONS Kconfig symbol
......................................................................
southbridge: Remove last dummy SOUTH_BRIDGE_OPTIONS Kconfig symbol
Change-Id: If4ae9c800325f5de8f170f8922bacffad1c9bb20
Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr>
Signed-off-by: Felix Singer <felixsinger(a)posteo.net>
---
M src/southbridge/intel/bd82x6x/Kconfig
M util/lint/kconfig_lint
2 files changed, 13 insertions(+), 11 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/77532/8
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Hello Arthur Heymans, Felix Held, Fred Reitberger, Jason Glenesk, Matt DeVillier, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/79366?usp=email
to look at the new patch set (#3).
Change subject: vc/amd/psp: Remove unknown section flags
......................................................................
vc/amd/psp: Remove unknown section flags
The `d` flag used in .section is unknown in LLVM/clang 17 and fails
the build. It is also not documented in the ARM compiler manual.
The GNU assembler supports the `d` flag but it also seems to compile
without.
ARM compiler manual: https://developer.arm.com/documentation/101754/0621/armclang-Reference/armc…
GNU compiler manual: https://sourceware.org/binutils/docs/as/Section.html
`coreboot.rom` does not change between compiling a google skyrim board
with or without this patch. However the debug info for the following
three files in the build directory changes with this patch:
* build/verstage/vendorcode/amd/fsp/mendocino/bl_uapp/bl_uapp_end.o
* build/cbfs/fallback/verstage.elf
* build/cbfs/fallback/verstage.debug
Change-Id: Ie3735b72349b0cfdd27364a39bcdda390af7bfa5
Signed-off-by: Lennart Eichhorn <lennarteichhorn(a)googlemail.com>
---
M src/vendorcode/amd/fsp/cezanne/bl_uapp/bl_uapp_end.S
M src/vendorcode/amd/fsp/common/bl_uapp/bl_uapp_end.S
M src/vendorcode/amd/fsp/mendocino/bl_uapp/bl_uapp_end.S
M src/vendorcode/amd/fsp/picasso/bl_uapp/bl_uapp_end.S
4 files changed, 4 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/79366/3
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Felix Singer has uploaded a new patch set (#7) to the change originally created by Elyes Haouas. ( https://review.coreboot.org/c/coreboot/+/77532?usp=email )
Change subject: southbridge: Remove last dummy SOUTH_BRIDGE_OPTIONS Kconfig symbol
......................................................................
southbridge: Remove last dummy SOUTH_BRIDGE_OPTIONS Kconfig symbol
Change-Id: If4ae9c800325f5de8f170f8922bacffad1c9bb20
Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr>
Signed-off-by: Felix Singer <felixsinger(a)posteo.net>
---
M src/southbridge/intel/bd82x6x/Kconfig
M util/lint/kconfig_lint
2 files changed, 12 insertions(+), 10 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/77532/7
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Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/79852?usp=email )
Change subject: nb/amd/pi/00730F01/state_machine: re-enable LPC decodes
......................................................................
nb/amd/pi/00730F01/state_machine: re-enable LPC decodes
The AmdInitReset entry point of binaryPI disables the LPC decodes for
the serial ports' IO ports causing the serial console output to stop
after this entry point is called until the decodes are re-enabled in
ramstage when the resource enablement is done. This patch re-enables the
LPC IO decoding for the serial ports right after binaryPI disabled it to
get the full log on the serial console.
TEST=Now the full console output from the APU2 board gets printed on the
serial console.
Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de>
Change-Id: I91ef4423bd7bf6c1d7a175336f0f89479f2cde02
---
M src/northbridge/amd/pi/00730F01/state_machine.c
1 file changed, 3 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/79852/1
diff --git a/src/northbridge/amd/pi/00730F01/state_machine.c b/src/northbridge/amd/pi/00730F01/state_machine.c
index 5f27fbb..6832064 100644
--- a/src/northbridge/amd/pi/00730F01/state_machine.c
+++ b/src/northbridge/amd/pi/00730F01/state_machine.c
@@ -10,6 +10,7 @@
#include <northbridge/amd/agesa/state_machine.h>
#include <northbridge/amd/agesa/agesa_helper.h>
#include <northbridge/amd/nb_common.h>
+#include <southbridge/amd/pi/hudson/hudson.h>
void platform_BeforeInitReset(struct sysinfo *cb, AMD_RESET_PARAMS *Reset)
{
@@ -17,6 +18,8 @@
void platform_AfterInitReset(struct sysinfo *cb, AMD_RESET_PARAMS *Reset)
{
+ /* re-enable LPC decodes for serial ports after AmdInitReset disabled those */
+ hudson_lpc_decode();
}
void platform_BeforeInitEarly(struct sysinfo *cb, AMD_EARLY_PARAMS *Early)
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Change subject: tree: Remove the last dummy SOUTH_BRIDGE_OPTIONS
......................................................................
Patch Set 6: Code-Review+2
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Change subject: tree: Remove the last dummy SOUTH_BRIDGE_OPTIONS
......................................................................
Patch Set 6:
(1 comment)
Patchset:
PS6:
Renamed the newly introduced Kconfig option so that it matches more to what we have elsewhere.
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Attention is currently required from: Elyes Haouas, Felix Singer, Martin L Roth, Nico Huber.
Felix Singer has uploaded a new patch set (#6) to the change originally created by Elyes Haouas. ( https://review.coreboot.org/c/coreboot/+/77532?usp=email )
The following approvals got outdated and were removed:
Verified+1 by build bot (Jenkins)
Change subject: tree: Remove the last dummy SOUTH_BRIDGE_OPTIONS
......................................................................
tree: Remove the last dummy SOUTH_BRIDGE_OPTIONS
Change-Id: If4ae9c800325f5de8f170f8922bacffad1c9bb20
Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr>
Signed-off-by: Felix Singer <felixsinger(a)posteo.net>
---
M src/southbridge/intel/bd82x6x/Kconfig
M util/lint/kconfig_lint
2 files changed, 12 insertions(+), 10 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/77532/6
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Change subject: util/lint: Remove the extra `\` in lint-stable-003-whitespace
......................................................................
util/lint: Remove the extra `\` in lint-stable-003-whitespace
A following error occurred when I commit, it seems that the extra `\`
after `\.md$` is unnecessary.
File Binary file src/mainboard/google/guybrush/data.apcb matches has
lines ending with whitespace.
File Binary file src/mainboard/google/skyrim/data.apcb matches has
lines ending with whitespace.
File Binary file src/mainboard/google/zork/data.apcb matches has
lines ending with whitespace.
test failed
Signed-off-by: Ruihai Zhou <zhouruihai(a)huaqin.corp-partner.google.com>
Change-Id: I315a37ccc3c6ebb67f7a250402549761c699dd1b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79782
Reviewed-by: cong yang <yangcong5(a)huaqin.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso(a)google.com>
Reviewed-by: Yidi Lin <yidilin(a)google.com>
---
M util/lint/lint-stable-003-whitespace
1 file changed, 1 insertion(+), 1 deletion(-)
Approvals:
build bot (Jenkins): Verified
Yu-Ping Wu: Looks good to me, approved
Yidi Lin: Looks good to me, but someone else must approve
cong yang: Looks good to me, but someone else must approve
diff --git a/util/lint/lint-stable-003-whitespace b/util/lint/lint-stable-003-whitespace
index 83b3faa..4dd0260 100755
--- a/util/lint/lint-stable-003-whitespace
+++ b/util/lint/lint-stable-003-whitespace
@@ -11,7 +11,7 @@
# shellcheck source=helper_functions.sh
. "${LINTDIR}/helper_functions.sh"
-EXCLUDELIST='^src/vendorcode/|^util/kconfig/|^util/nvidia/cbootimage|^util/goswid|__pycache__|COPYING|LICENSE|README|_shipped$|\.patch$|\.bin$|\.hex$|\.jpg$|\.gif$|\.ttf$|\.woff$|\.png$|\.eot$|\.vbt$|\.ico$|\.md$\|\.apcb$'
+EXCLUDELIST='^src/vendorcode/|^util/kconfig/|^util/nvidia/cbootimage|^util/goswid|__pycache__|COPYING|LICENSE|README|_shipped$|\.patch$|\.bin$|\.hex$|\.jpg$|\.gif$|\.ttf$|\.woff$|\.png$|\.eot$|\.vbt$|\.ico$|\.md$|\.apcb$'
INCLUDELIST="src util payloads Makefile* toolchain.inc tests"
# shellcheck disable=SC2086,SC2046
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Change subject: src/arch/x86/c_start.S: Add proper x86_64 code
......................................................................
Patch Set 5: Code-Review+2
(3 comments)
Patchset:
PS5:
I think after the commit message is updated, this should be good to merge.
File src/arch/x86/c_start.S:
https://review.coreboot.org/c/coreboot/+/59874/comment/70a4f29e_8f5f6b7a :
PS2, Line 66: /** poison the stack. Code should not count on the
: * stack being full of zeros. This stack poisoning
: * recently uncovered a bug in the broadcast SIPI
: * code.
: */
> To avoid duplication, the comment could be put outside the if-else statement.
This patch doesn't touch the comment, so while the comment is true, It doesn't need to be done in this patch.
https://review.coreboot.org/c/coreboot/+/59874/comment/99d28800_98eeead9 :
PS2, Line 99: push_cpu_info
:
: #if CONFIG(CPU_INFO_V2)
: /* Allocate the per_cpu_segment_data on the stack */
: push_per_cpu_segment_data
:
: #if ENV_X86_64
: /*
: * Update the BSP's per_cpu_segment_descriptor to point to the
: * per_cpu_segment_data that was allocated on the stack.
: */
: set_segment_descriptor_base $per_cpu_segment_descriptors, %esp
:
: movabs per_cpu_segment_selector, %rax
: mov %eax, %gs
: #else
: /*
: * Update the BSP's per_cpu_segment_descriptor to point to the
: * per_cpu_segment_data that was allocated on the stack.
: */
: set_segment_descriptor_base $per_cpu_segment_descriptors, %esp
:
: mov per_cpu_segment_selector, %eax
: mov %eax, %gs
: #endif
Add a comment about removing all of this in the commit message?
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