coreboot-gerrit January 2024

coreboot-gerrit@coreboot.org

1 participants
3043 discussions

[S] Change in coreboot[main]: WIP: mb/google/brox: Add vGPIOs for NVMe
by Shelley Chen (Code Review) 09 Jan '24

09 Jan '24

Shelley Chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/79857?usp=email ) Change subject: WIP: mb/google/brox: Add vGPIOs for NVMe ...................................................................... WIP: mb/google/brox: Add vGPIOs for NVMe BUG=b:311450057,b:300690448, b:319058143 BRANCH=None TEST=to be tested on device Change-Id: Ic8a1fdcedf2ec6c7bf1dd00e02ef7c13e9338aac Signed-off-by: Shelley Chen <shchen(a)google.com> --- M src/mainboard/google/brox/variants/baseboard/brox/gpio.c 1 file changed, 22 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/79857/1 diff --git a/src/mainboard/google/brox/variants/baseboard/brox/gpio.c b/src/mainboard/google/brox/variants/baseboard/brox/gpio.c index 7a988e1..5c4f613 100644 --- a/src/mainboard/google/brox/variants/baseboard/brox/gpio.c +++ b/src/mainboard/google/brox/variants/baseboard/brox/gpio.c @@ -395,6 +395,28 @@ PAD_CFG_NF(GPP_H11, NONE, PLTRST, NF2), /* GPP_S0 : SNDW0_CLL/I2S1_SCLK ==> MEM_CH_SEL */ PAD_CFG_GPI(GPP_S0, NONE, DEEP), + + /* CPU PCIe VGPIO for PEG60 */ + PAD_CFG_NF_VWEN(GPP_vGPIO_PCIE_48, NONE, PLTRST, NF1), + PAD_CFG_NF_VWEN(GPP_vGPIO_PCIE_49, NONE, PLTRST, NF1), + PAD_CFG_NF_VWEN(GPP_vGPIO_PCIE_50, NONE, PLTRST, NF1), + PAD_CFG_NF_VWEN(GPP_vGPIO_PCIE_51, NONE, PLTRST, NF1), + PAD_CFG_NF_VWEN(GPP_vGPIO_PCIE_52, NONE, PLTRST, NF1), + PAD_CFG_NF_VWEN(GPP_vGPIO_PCIE_53, NONE, PLTRST, NF1), + PAD_CFG_NF_VWEN(GPP_vGPIO_PCIE_54, NONE, PLTRST, NF1), + PAD_CFG_NF_VWEN(GPP_vGPIO_PCIE_55, NONE, PLTRST, NF1), + PAD_CFG_NF_VWEN(GPP_vGPIO_PCIE_56, NONE, PLTRST, NF1), + PAD_CFG_NF_VWEN(GPP_vGPIO_PCIE_57, NONE, PLTRST, NF1), + PAD_CFG_NF_VWEN(GPP_vGPIO_PCIE_58, NONE, PLTRST, NF1), + PAD_CFG_NF_VWEN(GPP_vGPIO_PCIE_59, NONE, PLTRST, NF1), + PAD_CFG_NF_VWEN(GPP_vGPIO_PCIE_60, NONE, PLTRST, NF1), + PAD_CFG_NF_VWEN(GPP_vGPIO_PCIE_61, NONE, PLTRST, NF1), + PAD_CFG_NF_VWEN(GPP_vGPIO_PCIE_62, NONE, PLTRST, NF1), + PAD_CFG_NF_VWEN(GPP_vGPIO_PCIE_63, NONE, PLTRST, NF1), + PAD_CFG_NF_VWEN(GPP_vGPIO_PCIE_76, NONE, PLTRST, NF1), + PAD_CFG_NF_VWEN(GPP_vGPIO_PCIE_77, NONE, PLTRST, NF1), + PAD_CFG_NF_VWEN(GPP_vGPIO_PCIE_78, NONE, PLTRST, NF1), + PAD_CFG_NF_VWEN(GPP_vGPIO_PCIE_79, NONE, PLTRST, NF1), }; static const struct pad_config romstage_gpio_table[] = { -- To view, visit https://review.coreboot.org/c/coreboot/+/79857?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic8a1fdcedf2ec6c7bf1dd00e02ef7c13e9338aac Gerrit-Change-Number: 79857 Gerrit-PatchSet: 1 Gerrit-Owner: Shelley Chen <shchen(a)google.com> Gerrit-MessageType: newchange

1 0

[M] Change in coreboot[main]: mb/google/cherry: Use common mtk_display_init()
by Yu-Ping Wu (Code Review) 09 Jan '24

09 Jan '24

Attention is currently required from: Hung-Te Lin, Yidi Lin. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79778?usp=email ) Change subject: mb/google/cherry: Use common mtk_display_init() ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/79778?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie870899226588ac2a2e80f77e434455f4913d387 Gerrit-Change-Number: 79778 Gerrit-PatchSet: 4 Gerrit-Owner: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Comment-Date: Tue, 09 Jan 2024 07:15:34 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

[L] Change in coreboot[main]: mb/google/corsola: Use common mtk_display_init()
by Yu-Ping Wu (Code Review) 09 Jan '24

09 Jan '24

Attention is currently required from: Hung-Te Lin, Yidi Lin. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79777?usp=email ) Change subject: mb/google/corsola: Use common mtk_display_init() ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/79777?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I429218d59389a6ab86b522dd597c07fa5b8ea821 Gerrit-Change-Number: 79777 Gerrit-PatchSet: 4 Gerrit-Owner: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Comment-Date: Tue, 09 Jan 2024 07:14:17 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

[L] Change in coreboot[main]: soc/mediatek: Add common implementation to configure display
by Yu-Ping Wu (Code Review) 09 Jan '24

09 Jan '24

Attention is currently required from: Hung-Te Lin, Paul Menzel, Yidi Lin. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79776?usp=email ) Change subject: soc/mediatek: Add common implementation to configure display ...................................................................... Patch Set 3: (1 comment) File src/soc/mediatek/mt8188/include/soc/ddp.h: https://review.coreboot.org/c/coreboot/+/79776/comment/2b23634d_255a4efd : PS3, Line 286: void mtk_ddp_init(void); : void mtk_ddp_mode_set(const struct edid *edid, enum disp_path_sel path); Since these 2 functions are called from common/display.c, the declarations should also be moved to a common header. -- To view, visit https://review.coreboot.org/c/coreboot/+/79776?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I403bba8a826de5f3fb2ea96a5403725ff194164f Gerrit-Change-Number: 79776 Gerrit-PatchSet: 3 Gerrit-Owner: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Comment-Date: Tue, 09 Jan 2024 07:14:03 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

[XS] Change in coreboot[main]: cpu/x86/smi_trigger: use enum cb_err as apm_control return type
by Eric Lai (Code Review) 09 Jan '24

09 Jan '24

Attention is currently required from: Felix Held. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79835?usp=email ) Change subject: cpu/x86/smi_trigger: use enum cb_err as apm_control return type ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/79835?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I07ced74cae915df52a9d439835b84237d51fdd11 Gerrit-Change-Number: 79835 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 09 Jan 2024 07:10:38 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

[XS] Change in coreboot[main]: libpayload: Move back the ttb_buffer section
by Yi Chou (Code Review) 09 Jan '24

09 Jan '24

Attention is currently required from: Julius Werner, Paul Menzel. Yi Chou has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79800?usp=email ) Change subject: libpayload: Move back the ttb_buffer section ...................................................................... Patch Set 5: (5 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/79800/comment/ca897162_14ea6332 : PS3, Line 9: If the move it into the .ttb_buffer section > Sorry, I do not understand this part. […] Done https://review.coreboot.org/c/coreboot/+/79800/comment/c6a05fd3_8f3d1189 : PS3, Line 10: We should move > So, move it back … Done https://review.coreboot.org/c/coreboot/+/79800/comment/8dd337e5_356a1679 : PS3, Line 13: Boot the device. > It didn’t boot before? Rephrased. File payloads/libpayload/arch/arm64/libpayload.ldscript: https://review.coreboot.org/c/coreboot/+/79800/comment/1e27f13e_aafce608 : PS3, Line 65: *(.bss.ttb_buffer) > I think you might as well remove this completely. […] Done File payloads/libpayload/arch/arm64/mmu.c: https://review.coreboot.org/c/coreboot/+/79800/comment/27fdd667_c8f09904 : PS3, Line 45: /* Don't chage the name of this variable without also changing the name in the > (Would need to change this text a bit then to explain that we refer to this in the linker script for […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/79800?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I9bb08878dd4be01d9ed3f96933f774dd6296f76e Gerrit-Change-Number: 79800 Gerrit-PatchSet: 5 Gerrit-Owner: Yi Chou <yich(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Comment-Date: Tue, 09 Jan 2024 07:08:08 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: comment

1 0

[S] Change in coreboot[main]: mb/google/brox: Set up FW_CONFIG
by Eric Lai (Code Review) 09 Jan '24

09 Jan '24

Attention is currently required from: Shelley Chen. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79854?usp=email ) Change subject: mb/google/brox: Set up FW_CONFIG ...................................................................... Patch Set 2: (1 comment) File src/mainboard/google/brox/variants/baseboard/brox/devicetree.cb: https://review.coreboot.org/c/coreboot/+/79854/comment/147c16ef_e9661858 : PS2, Line 180: device ref pcie4_0 on Probably separate the PCIE with another CL? -- To view, visit https://review.coreboot.org/c/coreboot/+/79854?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iaf43003b7e8210eee9016d779839d7048c15825f Gerrit-Change-Number: 79854 Gerrit-PatchSet: 2 Gerrit-Owner: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Eric Lai <ericllai(a)google.com> Gerrit-CC: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Comment-Date: Tue, 09 Jan 2024 07:07:13 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

[XS] Change in coreboot[main]: mb/google/brox: Disable package c state demotion
by Eric Lai (Code Review) 09 Jan '24

09 Jan '24

Attention is currently required from: Shelley Chen. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79855?usp=email ) Change subject: mb/google/brox: Disable package c state demotion ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/79855?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib7b2484de2d84c980550fd951f1e30efab0ee197 Gerrit-Change-Number: 79855 Gerrit-PatchSet: 2 Gerrit-Owner: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Comment-Date: Tue, 09 Jan 2024 07:04:51 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

[XS] Change in coreboot[main]: libpayload: Move back the ttb_buffer section
by Yi Chou (Code Review) 09 Jan '24

09 Jan '24

Attention is currently required from: Julius Werner, Yi Chou. Hello Julius Werner, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/79800?usp=email to look at the new patch set (#4). The following approvals got outdated and were removed: Code-Review+2 by Julius Werner, Verified+1 by build bot (Jenkins) Change subject: libpayload: Move back the ttb_buffer section ...................................................................... libpayload: Move back the ttb_buffer section Moving it into the .ttb_buffer section will accidentally set the LOAD flag. So, move it back to .bss.ttb_buffer section to prevent the binary size bloating. BUG=b:248610274 TEST=Make sure the device is still bootable with this change. BRANCH=none Cq-Depend: chromium:5173448 Change-Id: I9bb08878dd4be01d9ed3f96933f774dd6296f76e Signed-off-by: Yi Chou <yich(a)google.com> --- M payloads/libpayload/arch/arm64/libpayload.ldscript M payloads/libpayload/arch/arm64/mmu.c 2 files changed, 5 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/79800/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/79800?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I9bb08878dd4be01d9ed3f96933f774dd6296f76e Gerrit-Change-Number: 79800 Gerrit-PatchSet: 4 Gerrit-Owner: Yi Chou <yich(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Yi Chou <yich(a)google.com> Gerrit-MessageType: newpatchset

1 0

[L] Change in coreboot[main]: soc/mediatek: Add common implementation to configure display
by Yu-Ping Wu (Code Review) 09 Jan '24

09 Jan '24

Attention is currently required from: Hung-Te Lin, Paul Menzel, Yidi Lin. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79776?usp=email ) Change subject: soc/mediatek: Add common implementation to configure display ...................................................................... Patch Set 3: (4 comments) File src/mainboard/google/geralt/panel.c: https://review.coreboot.org/c/coreboot/+/79776/comment/4c9bcb4b_75e87af3 : PS3, Line 27: if (!panel || panel->disp_path == DISP_PATH_NONE) { : printk(BIOS_ERR, "%s: Panel %u is not supported.\n", __func__, active_panel_id); : return NULL; : } I think the check can also be moved to `mtk_display_init()`. File src/soc/mediatek/common/display.c: https://review.coreboot.org/c/coreboot/+/79776/comment/87c8d1fe_9e592d91 : PS3, Line 15: void Can we return the pointer `&buffer.s` or NULL on error? https://review.coreboot.org/c/coreboot/+/79776/comment/9f2ef9e6_403e8048 : PS3, Line 88: ( nit: No need for parentheses. File src/soc/mediatek/common/include/soc/display.h: https://review.coreboot.org/c/coreboot/+/79776/comment/9d9d2b17_b8c0bc64 : PS3, Line 20: struct const -- To view, visit https://review.coreboot.org/c/coreboot/+/79776?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I403bba8a826de5f3fb2ea96a5403725ff194164f Gerrit-Change-Number: 79776 Gerrit-PatchSet: 3 Gerrit-Owner: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Comment-Date: Tue, 09 Jan 2024 06:58:47 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit January 2024