coreboot-gerrit January 2024

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[XS] Change in coreboot[master]: mb/google/volteer/eldrid: Set touchsreen reset time back to 30ms
by Casper Chang (Code Review) 10 Jan '24

10 Jan '24

Casper Chang has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/79889?usp=email ) Change subject: mb/google/volteer/eldrid: Set touchsreen reset time back to 30ms ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/79889?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ief94daf95f0bfce922471b5031bea70ed3b30243 Gerrit-Change-Number: 79889 Gerrit-PatchSet: 1 Gerrit-Owner: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: abandon

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[XS] Change in coreboot[main]: .gitignore: Ignore payloads/libpayload/generated/
by Yidi Lin (Code Review) 10 Jan '24

10 Jan '24

Attention is currently required from: Yu-Ping Wu. Yidi Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79873?usp=email ) Change subject: .gitignore: Ignore payloads/libpayload/generated/ ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/79873?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ief7afe3cf6ffcaba6aa5be27f41c6a32de9e6bbb Gerrit-Change-Number: 79873 Gerrit-PatchSet: 1 Gerrit-Owner: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Wed, 10 Jan 2024 08:17:57 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: .gitignore: Ignore payloads/libpayload/generated/
by Yu-Ping Wu (Code Review) 10 Jan '24

10 Jan '24

Yu-Ping Wu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/79873?usp=email ) Change subject: .gitignore: Ignore payloads/libpayload/generated/ ...................................................................... .gitignore: Ignore payloads/libpayload/generated/ Add 'generated/' to .gitignore. Change-Id: Ief7afe3cf6ffcaba6aa5be27f41c6a32de9e6bbb Signed-off-by: Yu-Ping Wu <yupingso(a)chromium.org> --- M .gitignore 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/79873/1 diff --git a/.gitignore b/.gitignore index 126cae6..e813493 100644 --- a/.gitignore +++ b/.gitignore @@ -9,6 +9,7 @@ build/ coreboot-builds/ coreboot-builds*/ +generated/ site-local -- To view, visit https://review.coreboot.org/c/coreboot/+/79873?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ief7afe3cf6ffcaba6aa5be27f41c6a32de9e6bbb Gerrit-Change-Number: 79873 Gerrit-PatchSet: 1 Gerrit-Owner: Yu-Ping Wu <yupingso(a)google.com> Gerrit-MessageType: newchange

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[XS] Change in coreboot[main]: [DNM] cpu/x86/64bit/mode_switch2.S: Support runtime page tables
by Patrick Rudolph (Code Review) 10 Jan '24

10 Jan '24

Attention is currently required from: Benjamin Doron, Jérémy Compostella. Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79863?usp=email ) Change subject: [DNM] cpu/x86/64bit/mode_switch2.S: Support runtime page tables ...................................................................... Patch Set 1: (1 comment) File src/cpu/x86/64bit/mode_switch2.S: https://review.coreboot.org/c/coreboot/+/79863/comment/455caea8_11ff3e6b : PS1, Line 22: page_tables > It compiles, still need to test. If it does work, my guess is that the linker can find the symbol. […] Maybe it compiles as the linker discards long_mode_call_3arg since it's not being used? -- To view, visit https://review.coreboot.org/c/coreboot/+/79863?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic964038fd4dd810015e6a355a171e49db648c8fe Gerrit-Change-Number: 79863 Gerrit-PatchSet: 1 Gerrit-Owner: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Comment-Date: Wed, 10 Jan 2024 07:49:45 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Patrick Rudolph <patrick.rudolph(a)9elements.com> Comment-In-Reply-To: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-MessageType: comment

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[M] Change in coreboot[main]: mb/google/nissa/var/craaskov: Modify thermal table and add fan perfor...
by Rex Chou (Code Review) 10 Jan '24

10 Jan '24

Rex Chou has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/79890?usp=email ) Change subject: mb/google/nissa/var/craaskov: Modify thermal table and add fan performance control ...................................................................... mb/google/nissa/var/craaskov: Modify thermal table and add fan performance control 1. Modify 6w/15w thermal table based on "Project_Craaskov_FW_Thermal_paramters_list_20240104_1.xlsx". 2. Add 6w and 15w fan performance control. 3. 6W MSR power limit_1 power(Watts) please change to 20. 4. 15W MSR power limit_1 power(Watts) please change to 20. BUG=b:290705146, b:318454915 TEST=emerge-nissa coreboot chromeos-bootimage Thermal team test pass. Change-Id: I15fa4b8f7c7088ff56da6493659ae45572913b5a Signed-off-by: Rex Chou <rex_chou(a)compal.corp-partner.google.com> --- M src/mainboard/google/brya/variants/craaskov/overridetree.cb 1 file changed, 86 insertions(+), 12 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/79890/1 diff --git a/src/mainboard/google/brya/variants/craaskov/overridetree.cb b/src/mainboard/google/brya/variants/craaskov/overridetree.cb index cc4ce53..be73526 100644 --- a/src/mainboard/google/brya/variants/craaskov/overridetree.cb +++ b/src/mainboard/google/brya/variants/craaskov/overridetree.cb @@ -98,6 +98,18 @@ register "tcc_offset" = "8" + register "power_limits_config[ADL_N_041_6W_CORE]" = "{ + .tdp_pl1_override = 20, + .tdp_pl2_override = 25, + .tdp_pl4 = 78, + }" + + register "power_limits_config[ADL_N_081_15W_CORE]" = "{ + .tdp_pl1_override = 20, + .tdp_pl2_override = 35, + .tdp_pl4 = 83, + }" + device domain 0 on device ref dtt on chip drivers/intel/dptf @@ -111,13 +123,25 @@ [0] = { .target = DPTF_CPU, .thresholds = { - TEMP_PCT(0, 0), - TEMP_PCT(35, 27), - TEMP_PCT(38, 31), - TEMP_PCT(39, 35), - TEMP_PCT(42, 41), - TEMP_PCT(60, 47), TEMP_PCT(70, 100), + TEMP_PCT(60, 65), + TEMP_PCT(42, 60), + TEMP_PCT(39, 55), + TEMP_PCT(38, 50), + TEMP_PCT(35, 43), + TEMP_PCT(31, 30), + } + }, + [1] = { + .target = DPTF_TEMP_SENSOR_0, + .thresholds = { + TEMP_PCT(60, 100), + TEMP_PCT(55, 65), + TEMP_PCT(52, 60), + TEMP_PCT(50, 55), + TEMP_PCT(48, 50), + TEMP_PCT(45, 43), + TEMP_PCT(41, 30), } } }" @@ -162,6 +186,25 @@ [2] = { 16, 1000 }, [3] = { 8, 500 } }" + + ## Fan Performance Control (Percent, Speed, Noise, Power) + register "controls.fan_perf" = "{ + [0] = { 100, 6000, 220, 2200, }, + [1] = { 92, 5500, 180, 1800, }, + [2] = { 85, 5000, 145, 1450, }, + [3] = { 70, 4400, 115, 1150, }, + [4] = { 56, 3900, 90, 900, }, + [5] = { 45, 3300, 55, 550, }, + [6] = { 38, 3000, 30, 300, }, + [7] = { 33, 2900, 15, 150, }, + [8] = { 10, 800, 10, 100, }, + [9] = { 0, 0, 0, 50, } + }" + + ## Fan options + register "options.fan.fine_grained_control" = "1" + register "options.fan.step_size" = "2" + device generic 0 on probe THERMAL_SOLUTION THERMAL_SOLUTION_6W end @@ -177,13 +220,25 @@ [0] = { .target = DPTF_CPU, .thresholds = { - TEMP_PCT(0, 0), - TEMP_PCT(35, 27), - TEMP_PCT(38, 31), - TEMP_PCT(39, 35), - TEMP_PCT(42, 41), - TEMP_PCT(60, 47), TEMP_PCT(70, 100), + TEMP_PCT(60, 65), + TEMP_PCT(42, 58), + TEMP_PCT(39, 53), + TEMP_PCT(38, 47), + TEMP_PCT(35, 43), + TEMP_PCT(31, 30), + } + }, + [1] = { + .target = DPTF_TEMP_SENSOR_0, + .thresholds = { + TEMP_PCT(60, 100), + TEMP_PCT(55, 65), + TEMP_PCT(52, 58), + TEMP_PCT(50, 53), + TEMP_PCT(48, 47), + TEMP_PCT(45, 43), + TEMP_PCT(41, 30), } } }" @@ -228,6 +283,25 @@ [2] = { 16, 1000 }, [3] = { 8, 500 } }" + + ## Fan Performance Control (Percent, Speed, Noise, Power) + register "controls.fan_perf" = "{ + [0] = { 100, 6000, 220, 2200, }, + [1] = { 92, 5500, 180, 1800, }, + [2] = { 85, 5000, 145, 1450, }, + [3] = { 70, 4400, 115, 1150, }, + [4] = { 56, 3900, 90, 900, }, + [5] = { 45, 3300, 55, 550, }, + [6] = { 38, 3000, 30, 300, }, + [7] = { 33, 2900, 15, 150, }, + [8] = { 10, 800, 10, 100, }, + [9] = { 0, 0, 0, 50, } + }" + + ## Fan options + register "options.fan.fine_grained_control" = "1" + register "options.fan.step_size" = "2" + device generic 1 on probe THERMAL_SOLUTION THERMAL_SOLUTION_15W end -- To view, visit https://review.coreboot.org/c/coreboot/+/79890?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I15fa4b8f7c7088ff56da6493659ae45572913b5a Gerrit-Change-Number: 79890 Gerrit-PatchSet: 1 Gerrit-Owner: Rex Chou <rex_chou(a)compal.corp-partner.google.com> Gerrit-MessageType: newchange

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[XS] Change in coreboot[master]: mb/google/volteer/eldrid: Set touchsreen reset time back to 30ms
by Casper Chang (Code Review) 10 Jan '24

10 Jan '24

Casper Chang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/79889?usp=email ) Change subject: mb/google/volteer/eldrid: Set touchsreen reset time back to 30ms ...................................................................... mb/google/volteer/eldrid: Set touchsreen reset time back to 30ms Set touchscreen reset time back to 30ms for Goodix touchscreen to match resume time requirement (0.5s). TEST=verify Goodix touchscreen functional on Eldrid Change-Id: Ief94daf95f0bfce922471b5031bea70ed3b30243 Signed-off-by: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> --- M src/mainboard/google/volteer/variants/eldrid/overridetree.cb 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/79889/1 diff --git a/src/mainboard/google/volteer/variants/eldrid/overridetree.cb b/src/mainboard/google/volteer/variants/eldrid/overridetree.cb index 7bb91ea..862e4c8 100644 --- a/src/mainboard/google/volteer/variants/eldrid/overridetree.cb +++ b/src/mainboard/google/volteer/variants/eldrid/overridetree.cb @@ -147,7 +147,7 @@ register "generic.detect" = "1" register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C10)" - register "generic.reset_delay_ms" = "120" + register "generic.reset_delay_ms" = "30" register "generic.reset_off_delay_ms" = "3" register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A8)" register "generic.enable_delay_ms" = "12" -- To view, visit https://review.coreboot.org/c/coreboot/+/79889?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ief94daf95f0bfce922471b5031bea70ed3b30243 Gerrit-Change-Number: 79889 Gerrit-PatchSet: 1 Gerrit-Owner: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-MessageType: newchange

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[XS] Change in coreboot[main]: [DNM] cpu/x86/64bit/mode_switch2.S: Support runtime page tables
by Benjamin Doron (Code Review) 10 Jan '24

10 Jan '24

Attention is currently required from: Jérémy Compostella, Patrick Rudolph. Benjamin Doron has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79863?usp=email ) Change subject: [DNM] cpu/x86/64bit/mode_switch2.S: Support runtime page tables ...................................................................... Patch Set 1: (1 comment) File src/cpu/x86/64bit/mode_switch2.S: https://review.coreboot.org/c/coreboot/+/79863/comment/23eabdbd_f4772f01 : PS1, Line 22: page_tables > that's not a global variable It compiles, still need to test. If it does work, my guess is that the linker can find the symbol. To the linker, can symbols actually be private? -- To view, visit https://review.coreboot.org/c/coreboot/+/79863?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic964038fd4dd810015e6a355a171e49db648c8fe Gerrit-Change-Number: 79863 Gerrit-PatchSet: 1 Gerrit-Owner: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Comment-Date: Wed, 10 Jan 2024 06:54:52 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: cpu/x86: Support runtime page tables on APs
by Patrick Rudolph (Code Review) 10 Jan '24

10 Jan '24

Attention is currently required from: Benjamin Doron, Jérémy Compostella. Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79864?usp=email ) Change subject: cpu/x86: Support runtime page tables on APs ...................................................................... Patch Set 1: (1 comment) File src/cpu/x86/mp_init.c: https://review.coreboot.org/c/coreboot/+/79864/comment/0a45c341_2bcde14d : PS1, Line 236: uint32_t should be uint64_t in case cbmem was installed >4GiB -- To view, visit https://review.coreboot.org/c/coreboot/+/79864?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I61aa44e5301aab7a4c127d58a7caf815d3a7d74d Gerrit-Change-Number: 79864 Gerrit-PatchSet: 1 Gerrit-Owner: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Comment-Date: Wed, 10 Jan 2024 06:31:07 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: [DNM] cpu/x86/64bit/mode_switch2.S: Support runtime page tables
by Patrick Rudolph (Code Review) 10 Jan '24

10 Jan '24

Attention is currently required from: Benjamin Doron, Jérémy Compostella. Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79863?usp=email ) Change subject: [DNM] cpu/x86/64bit/mode_switch2.S: Support runtime page tables ...................................................................... Patch Set 1: (1 comment) File src/cpu/x86/64bit/mode_switch2.S: https://review.coreboot.org/c/coreboot/+/79863/comment/28ae6a43_3015814c : PS1, Line 22: page_tables that's not a global variable -- To view, visit https://review.coreboot.org/c/coreboot/+/79863?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic964038fd4dd810015e6a355a171e49db648c8fe Gerrit-Change-Number: 79863 Gerrit-PatchSet: 1 Gerrit-Owner: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Comment-Date: Wed, 10 Jan 2024 06:30:21 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[L] Change in coreboot[main]: arch/x86/mmu: Port armv8 MMU to x86_64
by Patrick Rudolph (Code Review) 10 Jan '24

10 Jan '24

Attention is currently required from: Benjamin Doron. Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79161?usp=email ) Change subject: arch/x86/mmu: Port armv8 MMU to x86_64 ...................................................................... Patch Set 5: (1 comment) File src/arch/x86/mmu-romstage.c: https://review.coreboot.org/c/coreboot/+/79161/comment/02cf15e7_435b7349 : PS5, Line 8: 9 page only if 1 GiB hugepages are supported -- To view, visit https://review.coreboot.org/c/coreboot/+/79161?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6e8b46e65925823a84b8ccd647c7d6848aa20992 Gerrit-Change-Number: 79161 Gerrit-PatchSet: 5 Gerrit-Owner: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Comment-Date: Wed, 10 Jan 2024 06:29:36 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit January 2024