coreboot-gerrit January 2024

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[M] Change in coreboot[main]: device: Add support for multiple PCI segment groups
by Felix Held (Code Review) 12 Jan '24

12 Jan '24

Attention is currently required from: Cliff Huang, Felix Held, Fred Reitberger, Jason Glenesk, Lance Zhao, Matt DeVillier, Nico Huber, Patrick Rudolph, Tim Wawrzynczak. Hello Cliff Huang, Fred Reitberger, Jason Glenesk, Lance Zhao, Matt DeVillier, Nico Huber, Patrick Rudolph, Tim Wawrzynczak, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/79927?usp=email to look at the new patch set (#8). The following approvals got outdated and were removed: Code-Review+1 by Matt DeVillier, Verified+1 by build bot (Jenkins) Change subject: device: Add support for multiple PCI segment groups ...................................................................... device: Add support for multiple PCI segment groups Add initial support for multiple PCI segment groups. Instead of modifying secondary in the bus struct introduce a new variable and keep existing common code. Since all platforms currently only use 1 segment this is not a functional change. On platforms that support more than 1 segment the segment has to be set when creating the PCI domain. Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: Ied3313c41896362dd989ee2ab1b1bcdced840aa8 --- M src/acpi/acpi.c M src/arch/x86/mpspec.c M src/device/Kconfig M src/device/device.c M src/device/device_const.c M src/device/device_util.c M src/device/pci_device.c M src/device/pci_rom.c M src/device/pcix_device.c M src/include/device/device.h M src/include/device/pci_def.h M src/include/device/pci_ops.h M src/lib/smbios.c M src/northbridge/amd/pi/00730F01/northbridge.c M src/soc/amd/common/block/acpi/ivrs.c M src/soc/amd/common/block/data_fabric/domain.c M src/soc/amd/genoa_poc/domain.c M src/soc/intel/xeon_sp/cpx/soc_acpi.c M src/soc/intel/xeon_sp/uncore.c 19 files changed, 100 insertions(+), 42 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/79927/8 -- To view, visit https://review.coreboot.org/c/coreboot/+/79927?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ied3313c41896362dd989ee2ab1b1bcdced840aa8 Gerrit-Change-Number: 79927 Gerrit-PatchSet: 8 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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[L] Change in coreboot[main]: mb/google/poppy: Use chipset dt reference names
by Felix Singer (Code Review) 12 Jan '24

12 Jan '24

Attention is currently required from: Martin L Roth, Marvin Evers. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79439?usp=email ) Change subject: mb/google/poppy: Use chipset dt reference names ...................................................................... Patch Set 6: (1 comment) File src/mainboard/google/poppy/variants/atlas/devicetree.cb: https://review.coreboot.org/c/coreboot/+/79439/comment/b9fdb199_ec3171a6 : PS6, Line 335: # Audio Remove superfluous comment. -- To view, visit https://review.coreboot.org/c/coreboot/+/79439?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I22bcde2dea726f47f8d64a762ca147efde0b610d Gerrit-Change-Number: 79439 Gerrit-PatchSet: 6 Gerrit-Owner: Marvin Evers <marvin.n.evers(a)gmail.com> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Attention: Marvin Evers <marvin.n.evers(a)gmail.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Comment-Date: Fri, 12 Jan 2024 20:55:40 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[main]: device: Add support for multiple PCI segment groups
by Matt DeVillier (Code Review) 12 Jan '24

12 Jan '24

Attention is currently required from: Cliff Huang, Felix Held, Fred Reitberger, Jason Glenesk, Lance Zhao, Nico Huber, Patrick Rudolph, Tim Wawrzynczak. Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79927?usp=email ) Change subject: device: Add support for multiple PCI segment groups ...................................................................... Patch Set 7: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/79927?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ied3313c41896362dd989ee2ab1b1bcdced840aa8 Gerrit-Change-Number: 79927 Gerrit-PatchSet: 7 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 12 Jan 2024 20:47:44 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: soc/cavium/cn81xx/Kconfig: specify ECAM_MMCONF_BUS_NUMBER
by Matt DeVillier (Code Review) 12 Jan '24

12 Jan '24

Attention is currently required from: Felix Held. Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79931?usp=email ) Change subject: soc/cavium/cn81xx/Kconfig: specify ECAM_MMCONF_BUS_NUMBER ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/79931?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic98381e2cc597cf23af249c71911545692e40f64 Gerrit-Change-Number: 79931 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 12 Jan 2024 20:47:36 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[main]: sb/intel: Use boolean for pcie_hotplug_map attribute
by Felix Singer (Code Review) 12 Jan '24

12 Jan '24

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/79932?usp=email to look at the new patch set (#2). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: sb/intel: Use boolean for pcie_hotplug_map attribute ...................................................................... sb/intel: Use boolean for pcie_hotplug_map attribute Change-Id: Ia5e1ee683fa3d8d216ece26426e9870981ede2ba Signed-off-by: Felix Singer <felixsinger(a)posteo.net> --- M src/southbridge/intel/bd82x6x/chip.h M src/southbridge/intel/common/pciehp.c M src/southbridge/intel/common/pciehp.h M src/southbridge/intel/i82801ix/chip.h M src/southbridge/intel/i82801jx/chip.h 5 files changed, 10 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/79932/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/79932?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia5e1ee683fa3d8d216ece26426e9870981ede2ba Gerrit-Change-Number: 79932 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[main]: sb/intel: Use boolean for pcie_hotplug_map attribute
by Felix Singer (Code Review) 12 Jan '24

12 Jan '24

Felix Singer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/79932?usp=email ) Change subject: sb/intel: Use boolean for pcie_hotplug_map attribute ...................................................................... sb/intel: Use boolean for pcie_hotplug_map attribute Change-Id: Ia5e1ee683fa3d8d216ece26426e9870981ede2ba Signed-off-by: Felix Singer <felixsinger(a)posteo.net> --- M src/southbridge/intel/bd82x6x/chip.h M src/southbridge/intel/common/pciehp.c M src/southbridge/intel/common/pciehp.h M src/southbridge/intel/i82801ix/chip.h M src/southbridge/intel/i82801jx/chip.h 5 files changed, 7 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/79932/1 diff --git a/src/southbridge/intel/bd82x6x/chip.h b/src/southbridge/intel/bd82x6x/chip.h index 30c2675..66d5cb1 100644 --- a/src/southbridge/intel/bd82x6x/chip.h +++ b/src/southbridge/intel/bd82x6x/chip.h @@ -65,7 +65,7 @@ int docking_supported; - uint8_t pcie_hotplug_map[8]; + bool pcie_hotplug_map[8]; /* Ports which can be routed to either EHCI or xHCI. */ uint32_t xhci_switchable_ports; diff --git a/src/southbridge/intel/common/pciehp.c b/src/southbridge/intel/common/pciehp.c index b549619..a9da488 100644 --- a/src/southbridge/intel/common/pciehp.c +++ b/src/southbridge/intel/common/pciehp.c @@ -7,7 +7,7 @@ #include "pciehp.h" -void intel_acpi_pcie_hotplug_generator(u8 *hotplug_map, int port_number) +void intel_acpi_pcie_hotplug_generator(bool *hotplug_map, int port_number) { int port; int have_hotplug = 0; diff --git a/src/southbridge/intel/common/pciehp.h b/src/southbridge/intel/common/pciehp.h index b4e65c4..2434b5b 100644 --- a/src/southbridge/intel/common/pciehp.h +++ b/src/southbridge/intel/common/pciehp.h @@ -3,7 +3,7 @@ #ifndef SOUTHBRIDGE_INTEL_COMMON_PCIEHP_H #define SOUTHBRIDGE_INTEL_COMMON_PCIEHP_H -void intel_acpi_pcie_hotplug_generator(u8 *hotplug_map, int port_number); +void intel_acpi_pcie_hotplug_generator(bool *hotplug_map, int port_number); void intel_acpi_pcie_hotplug_scan_slot(struct bus *bus); #endif diff --git a/src/southbridge/intel/i82801ix/chip.h b/src/southbridge/intel/i82801ix/chip.h index ec7b977..d52a0c2 100644 --- a/src/southbridge/intel/i82801ix/chip.h +++ b/src/southbridge/intel/i82801ix/chip.h @@ -3,6 +3,7 @@ #ifndef SOUTHBRIDGE_INTEL_I82801IX_CHIP_H #define SOUTHBRIDGE_INTEL_I82801IX_CHIP_H +#include <stdbool.h> #include <stdint.h> enum { @@ -73,7 +74,7 @@ uint8_t scale : 2; } pcie_power_limits[6]; - uint8_t pcie_hotplug_map[8]; + bool pcie_hotplug_map[8]; /* Additional LPC IO decode ranges */ uint32_t gen1_dec; diff --git a/src/southbridge/intel/i82801jx/chip.h b/src/southbridge/intel/i82801jx/chip.h index ae31d4f..f12a67e 100644 --- a/src/southbridge/intel/i82801jx/chip.h +++ b/src/southbridge/intel/i82801jx/chip.h @@ -3,6 +3,7 @@ #ifndef SOUTHBRIDGE_INTEL_I82801JX_CHIP_H #define SOUTHBRIDGE_INTEL_I82801JX_CHIP_H +#include <stdbool.h> #include <stdint.h> enum { @@ -59,7 +60,7 @@ uint8_t scale : 2; } pcie_power_limits[6]; - uint8_t pcie_hotplug_map[8]; + bool pcie_hotplug_map[8]; /* Additional LPC IO decode ranges */ uint32_t gen1_dec; -- To view, visit https://review.coreboot.org/c/coreboot/+/79932?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia5e1ee683fa3d8d216ece26426e9870981ede2ba Gerrit-Change-Number: 79932 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-MessageType: newchange

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[S] Change in coreboot[main]: sb/intel/i82801{i,j}x/chip.h: Use boolean where appropriate
by Felix Singer (Code Review) 12 Jan '24

12 Jan '24

Attention is currently required from: Alexander Couzens, Elyes Haouas, Felix Held, Felix Singer, Nicholas Chin, Stefan Ott. Felix Singer has uploaded a new patch set (#11) to the change originally created by Elyes Haouas. ( https://review.coreboot.org/c/coreboot/+/77738?usp=email ) Change subject: sb/intel/i82801{i,j}x/chip.h: Use boolean where appropriate ...................................................................... sb/intel/i82801{i,j}x/chip.h: Use boolean where appropriate Change-Id: I867451ae3d6d37033c9e0e57a4d7fd4a06dedbef Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> Signed-off-by: Felix Singer <felixsinger(a)posteo.net> --- M src/southbridge/intel/i82801ix/chip.h M src/southbridge/intel/i82801ix/lpc.c M src/southbridge/intel/i82801jx/chip.h M src/southbridge/intel/i82801jx/lpc.c 4 files changed, 13 insertions(+), 13 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/77738/11 -- To view, visit https://review.coreboot.org/c/coreboot/+/77738?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I867451ae3d6d37033c9e0e57a4d7fd4a06dedbef Gerrit-Change-Number: 77738 Gerrit-PatchSet: 11 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: Stefan Ott <coreboot(a)desire.ch> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Stefan Ott <coreboot(a)desire.ch> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-MessageType: newpatchset

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[XS] Change in coreboot[main]: soc/cavium/cn81xx/Kconfig: specify ECAM_MMCONF_BUS_NUMBER
by Nico Huber (Code Review) 12 Jan '24

12 Jan '24

Attention is currently required from: Felix Held. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79931?usp=email ) Change subject: soc/cavium/cn81xx/Kconfig: specify ECAM_MMCONF_BUS_NUMBER ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/79931?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic98381e2cc597cf23af249c71911545692e40f64 Gerrit-Change-Number: 79931 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 12 Jan 2024 20:24:54 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[main]: sb/intel/i82801{i,j}x/chip.h: Use boolean where appropriate
by Felix Singer (Code Review) 12 Jan '24

12 Jan '24

Attention is currently required from: Alexander Couzens, Elyes Haouas, Felix Held, Felix Singer, Nicholas Chin, Stefan Ott. Felix Singer has uploaded a new patch set (#10) to the change originally created by Elyes Haouas. ( https://review.coreboot.org/c/coreboot/+/77738?usp=email ) The following approvals got outdated and were removed: Verified-1 by build bot (Jenkins) Change subject: sb/intel/i82801{i,j}x/chip.h: Use boolean where appropriate ...................................................................... sb/intel/i82801{i,j}x/chip.h: Use boolean where appropriate Use the boolean type instead of integers for appropriate attributes. Change-Id: I867451ae3d6d37033c9e0e57a4d7fd4a06dedbef Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> Signed-off-by: Felix Singer <felixsinger(a)posteo.net> --- M src/southbridge/intel/common/pciehp.c M src/southbridge/intel/common/pciehp.h M src/southbridge/intel/i82801ix/chip.h M src/southbridge/intel/i82801ix/lpc.c M src/southbridge/intel/i82801jx/chip.h M src/southbridge/intel/i82801jx/lpc.c 6 files changed, 22 insertions(+), 17 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/77738/10 -- To view, visit https://review.coreboot.org/c/coreboot/+/77738?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I867451ae3d6d37033c9e0e57a4d7fd4a06dedbef Gerrit-Change-Number: 77738 Gerrit-PatchSet: 10 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: Stefan Ott <coreboot(a)desire.ch> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Stefan Ott <coreboot(a)desire.ch> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[main]: sb/intel/i82801{i,j}x/chip.h: Use boolean where appropriate
by Felix Singer (Code Review) 12 Jan '24

12 Jan '24

Attention is currently required from: Alexander Couzens, Elyes Haouas, Felix Held, Felix Singer, Nicholas Chin, Stefan Ott. Felix Singer has uploaded a new patch set (#9) to the change originally created by Elyes Haouas. ( https://review.coreboot.org/c/coreboot/+/77738?usp=email ) The following approvals got outdated and were removed: Code-Review+2 by Felix Singer, Verified-1 by build bot (Jenkins) Change subject: sb/intel/i82801{i,j}x/chip.h: Use boolean where appropriate ...................................................................... sb/intel/i82801{i,j}x/chip.h: Use boolean where appropriate Use the boolean type instead of integers for appropriate attributes. Change-Id: I867451ae3d6d37033c9e0e57a4d7fd4a06dedbef Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> Signed-off-by: Felix Singer <felixsinger(a)posteo.net> --- M src/southbridge/intel/common/pciehp.h M src/southbridge/intel/i82801ix/chip.h M src/southbridge/intel/i82801ix/lpc.c M src/southbridge/intel/i82801jx/chip.h M src/southbridge/intel/i82801jx/lpc.c 5 files changed, 20 insertions(+), 16 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/77738/9 -- To view, visit https://review.coreboot.org/c/coreboot/+/77738?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I867451ae3d6d37033c9e0e57a4d7fd4a06dedbef Gerrit-Change-Number: 77738 Gerrit-PatchSet: 9 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Reviewer: Stefan Ott <coreboot(a)desire.ch> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Stefan Ott <coreboot(a)desire.ch> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-MessageType: newpatchset

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coreboot-gerrit January 2024