coreboot-gerrit January 2024

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[S] Change in coreboot[main]: util/superiotool: reformat alternate dump output
by Matt DeVillier (Code Review) 17 Jan '24

17 Jan '24

Attention is currently required from: Paul Menzel. Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80004?usp=email ) Change subject: util/superiotool: reformat alternate dump output ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/80004/comment/8d5214ba_a848c473 : PS1, Line 12: > Maybe paste lines of the old and new output in the commit message? Done -- To view, visit https://review.coreboot.org/c/coreboot/+/80004?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Idef2cc136151328b114620eb297ab8fd62b71bcd Gerrit-Change-Number: 80004 Gerrit-PatchSet: 2 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Wed, 17 Jan 2024 16:34:22 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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[S] Change in coreboot[main]: util/superiotool: reformat alternate dump output
by Matt DeVillier (Code Review) 17 Jan '24

17 Jan '24

Attention is currently required from: Matt DeVillier. Hello Arthur Heymans, Paul Menzel, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/80004?usp=email to look at the new patch set (#2). Change subject: util/superiotool: reformat alternate dump output ...................................................................... util/superiotool: reformat alternate dump output Reformat alternate dump output to show default values before read values, and to use brackets to visually indicate which values differ from the defaults. old output: Register dump: idx val def 0x07: 0x0b (0x00) 0x10: 0xff (0xff) 0x11: 0xff (0xff) ... new output: Register dump: idx def val 0x07: 0x00 [0x0b] 0x10: 0xff 0xff 0x11: 0xff 0xff ... TEST=build/dump registers from Erying SRMJ4 w/Nuvoton NCT6796D. Change-Id: Idef2cc136151328b114620eb297ab8fd62b71bcd Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com> --- M util/superiotool/superiotool.c 1 file changed, 15 insertions(+), 8 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/80004/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/80004?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Idef2cc136151328b114620eb297ab8fd62b71bcd Gerrit-Change-Number: 80004 Gerrit-PatchSet: 2 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-MessageType: newpatchset

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[XS] Change in coreboot[main]: vc/amd/psp: Remove unknown section flags
by Felix Held (Code Review) 17 Jan '24

17 Jan '24

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/79366?usp=email ) Change subject: vc/amd/psp: Remove unknown section flags ...................................................................... vc/amd/psp: Remove unknown section flags The `d` flag used in .section is unknown in LLVM/clang 17 and fails the build. It is also not documented in the ARM compiler manual. The GNU assembler supports the `d` flag but it also seems to compile without. ARM compiler manual: https://developer.arm.com/documentation/101754/0621/armclang-Reference/armc… GNU compiler manual: https://sourceware.org/binutils/docs/as/Section.html `coreboot.rom` does not change between compiling a google skyrim board with or without this patch. However the debug info for the following three files in the build directory changes with this patch: * build/verstage/vendorcode/amd/fsp/mendocino/bl_uapp/bl_uapp_end.o * build/cbfs/fallback/verstage.elf * build/cbfs/fallback/verstage.debug Change-Id: Ie3735b72349b0cfdd27364a39bcdda390af7bfa5 Signed-off-by: Lennart Eichhorn <lennarteichhorn(a)googlemail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/79366 Reviewed-by: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/vendorcode/amd/fsp/cezanne/bl_uapp/bl_uapp_end.S M src/vendorcode/amd/fsp/common/bl_uapp/bl_uapp_end.S M src/vendorcode/amd/fsp/mendocino/bl_uapp/bl_uapp_end.S M src/vendorcode/amd/fsp/picasso/bl_uapp/bl_uapp_end.S 4 files changed, 4 insertions(+), 4 deletions(-) Approvals: build bot (Jenkins): Verified Martin Roth: Looks good to me, approved diff --git a/src/vendorcode/amd/fsp/cezanne/bl_uapp/bl_uapp_end.S b/src/vendorcode/amd/fsp/cezanne/bl_uapp/bl_uapp_end.S index 40ea411..db6556c 100644 --- a/src/vendorcode/amd/fsp/cezanne/bl_uapp/bl_uapp_end.S +++ b/src/vendorcode/amd/fsp/cezanne/bl_uapp/bl_uapp_end.S @@ -29,7 +29,7 @@ .arm .global LastBytes -.section PSP_FOOTER_DATA, "ad", %note +.section PSP_FOOTER_DATA, "a", %note .balign 64 // Note: this is used for determining the size of the binary. It is 64 byte aligned and 64 byte diff --git a/src/vendorcode/amd/fsp/common/bl_uapp/bl_uapp_end.S b/src/vendorcode/amd/fsp/common/bl_uapp/bl_uapp_end.S index 40ea411..db6556c 100644 --- a/src/vendorcode/amd/fsp/common/bl_uapp/bl_uapp_end.S +++ b/src/vendorcode/amd/fsp/common/bl_uapp/bl_uapp_end.S @@ -29,7 +29,7 @@ .arm .global LastBytes -.section PSP_FOOTER_DATA, "ad", %note +.section PSP_FOOTER_DATA, "a", %note .balign 64 // Note: this is used for determining the size of the binary. It is 64 byte aligned and 64 byte diff --git a/src/vendorcode/amd/fsp/mendocino/bl_uapp/bl_uapp_end.S b/src/vendorcode/amd/fsp/mendocino/bl_uapp/bl_uapp_end.S index 40ea411..db6556c 100644 --- a/src/vendorcode/amd/fsp/mendocino/bl_uapp/bl_uapp_end.S +++ b/src/vendorcode/amd/fsp/mendocino/bl_uapp/bl_uapp_end.S @@ -29,7 +29,7 @@ .arm .global LastBytes -.section PSP_FOOTER_DATA, "ad", %note +.section PSP_FOOTER_DATA, "a", %note .balign 64 // Note: this is used for determining the size of the binary. It is 64 byte aligned and 64 byte diff --git a/src/vendorcode/amd/fsp/picasso/bl_uapp/bl_uapp_end.S b/src/vendorcode/amd/fsp/picasso/bl_uapp/bl_uapp_end.S index 40ea411..db6556c 100644 --- a/src/vendorcode/amd/fsp/picasso/bl_uapp/bl_uapp_end.S +++ b/src/vendorcode/amd/fsp/picasso/bl_uapp/bl_uapp_end.S @@ -29,7 +29,7 @@ .arm .global LastBytes -.section PSP_FOOTER_DATA, "ad", %note +.section PSP_FOOTER_DATA, "a", %note .balign 64 // Note: this is used for determining the size of the binary. It is 64 byte aligned and 64 byte -- To view, visit https://review.coreboot.org/c/coreboot/+/79366?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie3735b72349b0cfdd27364a39bcdda390af7bfa5 Gerrit-Change-Number: 79366 Gerrit-PatchSet: 5 Gerrit-Owner: Zebreus <lennarteichhorn(a)googlemail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-CC: Martin L Roth <gaumless(a)gmail.com> Gerrit-MessageType: merged

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[S] Change in coreboot[main]: tree: More use accessor functions for struct region fields
by Felix Held (Code Review) 17 Jan '24

17 Jan '24

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/79955?usp=email ) Change subject: tree: More use accessor functions for struct region fields ...................................................................... tree: More use accessor functions for struct region fields Always use the high-level API region_offset() and region_sz() functions. This excludes the internal `region.c` code as well as unit tests. FIT payload support was also skipped, as it seems it never tried to use the API and would need a bigger overhaul. Change-Id: I18f1e37a06783aecde9024c15876b67bfeed70ee Signed-off-by: Nico Huber <nico.h(a)gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/79955 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Reviewed-by: Julius Werner <jwerner(a)chromium.org> --- M src/soc/amd/common/block/spi/fch_spi_ctrl.c M src/soc/amd/common/psp_verstage/psp_verstage.c M src/soc/qualcomm/common/qclib.c M src/soc/qualcomm/sc7180/soc.c M src/soc/qualcomm/sc7280/soc.c 5 files changed, 16 insertions(+), 12 deletions(-) Approvals: build bot (Jenkins): Verified Matt DeVillier: Looks good to me, but someone else must approve Julius Werner: Looks good to me, approved diff --git a/src/soc/amd/common/block/spi/fch_spi_ctrl.c b/src/soc/amd/common/block/spi/fch_spi_ctrl.c index b3d7c69..ec3eef6 100644 --- a/src/soc/amd/common/block/spi/fch_spi_ctrl.c +++ b/src/soc/amd/common/block/spi/fch_spi_ctrl.c @@ -221,8 +221,8 @@ size_t addr, len, gran_value, total_ranges, range; bool granularity_64k = true; /* assume 64k granularity */ - addr = region->offset; - len = region->size; + addr = region_offset(region); + len = region_sz(region); reg32 = pci_read_config32(SOC_LPC_DEV, ROM_ADDRESS_RANGE2_START); rom_base = WORD_TO_DWORD_UPPER(reg32); diff --git a/src/soc/amd/common/psp_verstage/psp_verstage.c b/src/soc/amd/common/psp_verstage/psp_verstage.c index 7d9ef35..b49acae 100644 --- a/src/soc/amd/common/psp_verstage/psp_verstage.c +++ b/src/soc/amd/common/psp_verstage/psp_verstage.c @@ -85,13 +85,17 @@ if (vboot_is_firmware_slot_a(ctx)) { fname = "apu/amdfw_a"; - if (!fmap_locate_area("FW_MAIN_A", &fw_slot)) - map_base = rdev_mmap(boot_device_ro(), fw_slot.offset, fw_slot.size); + if (!fmap_locate_area("FW_MAIN_A", &fw_slot)) { + map_base = rdev_mmap(boot_device_ro(), + region_offset(&fw_slot), region_sz(&fw_slot)); + } } else { fname = "apu/amdfw_b"; - if (!fmap_locate_area("FW_MAIN_B", &fw_slot)) - map_base = rdev_mmap(boot_device_ro(), fw_slot.offset, fw_slot.size); + if (!fmap_locate_area("FW_MAIN_B", &fw_slot)) { + map_base = rdev_mmap(boot_device_ro(), + region_offset(&fw_slot), region_sz(&fw_slot)); + } } if (!map_base) { @@ -118,7 +122,7 @@ psp_dir_addr = ef_table->new_psp_directory; bios_dir_addr = get_bios_dir_addr(ef_table); psp_dir_in_spi = (uint32_t *)((psp_dir_addr & SPI_ADDR_MASK) + - (uint32_t)map_base - fw_slot.offset); + (uint32_t)map_base - region_offset(&fw_slot)); if (*psp_dir_in_spi != PSP_COOKIE) { printk(BIOS_ERR, "PSP Directory address is not correct.\n"); cbfs_unmap(amdfw_location); @@ -129,7 +133,7 @@ if (bios_dir_addr) { bios_dir_in_spi = (uint32_t *)((bios_dir_addr & SPI_ADDR_MASK) + - (uint32_t)map_base - fw_slot.offset); + (uint32_t)map_base - region_offset(&fw_slot)); if (*bios_dir_in_spi != BHD_COOKIE) { printk(BIOS_ERR, "BIOS Directory address is not correct.\n"); cbfs_unmap(amdfw_location); diff --git a/src/soc/qualcomm/common/qclib.c b/src/soc/qualcomm/common/qclib.c index cfe3e2a..56fd3bf 100644 --- a/src/soc/qualcomm/common/qclib.c +++ b/src/soc/qualcomm/common/qclib.c @@ -106,8 +106,8 @@ ddr_region->size = ddr_size * MiB; /* Use DDR info to configure MMU */ - qc_mmu_dram_config_post_dram_init((void *)ddr_region->offset, - (size_t)ddr_region->size); + qc_mmu_dram_config_post_dram_init( + (void *)(uintptr_t)region_offset(ddr_region), region_sz(ddr_region)); } static void write_qclib_log_to_cbmemc(struct qclib_cb_if_table_entry *te) diff --git a/src/soc/qualcomm/sc7180/soc.c b/src/soc/qualcomm/sc7180/soc.c index d8df98a..cef7e8f 100644 --- a/src/soc/qualcomm/sc7180/soc.c +++ b/src/soc/qualcomm/sc7180/soc.c @@ -12,7 +12,7 @@ void *start = NULL; void *end = NULL; - ram_range(dev, 0, (uintptr_t)ddr_region->offset, ddr_region->size); + ram_range(dev, 0, (uintptr_t)region_offset(ddr_region), region_sz(ddr_region)); reserved_ram_range(dev, 1, (uintptr_t)_dram_aop, REGION_SIZE(dram_aop)); reserved_ram_range(dev, 2, (uintptr_t)_dram_soc, REGION_SIZE(dram_soc)); if (soc_modem_carve_out(&start, &end)) diff --git a/src/soc/qualcomm/sc7280/soc.c b/src/soc/qualcomm/sc7280/soc.c index e6dbf21..783c557 100644 --- a/src/soc/qualcomm/sc7280/soc.c +++ b/src/soc/qualcomm/sc7280/soc.c @@ -19,7 +19,7 @@ void *start = NULL; void *end = NULL; - ram_range(dev, 0, (uintptr_t)ddr_region->offset, ddr_region->size); + ram_range(dev, 0, (uintptr_t)region_offset(ddr_region), region_sz(ddr_region)); reserved_ram_range(dev, 1, (uintptr_t)_dram_soc, REGION_SIZE(dram_soc)); reserved_ram_range(dev, 2, (uintptr_t)_dram_wlan, REGION_SIZE(dram_wlan)); reserved_ram_range(dev, 3, (uintptr_t)_dram_wpss, REGION_SIZE(dram_wpss)); -- To view, visit https://review.coreboot.org/c/coreboot/+/79955?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I18f1e37a06783aecde9024c15876b67bfeed70ee Gerrit-Change-Number: 79955 Gerrit-PatchSet: 3 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[M] Change in coreboot[main]: soc/intel: Unify the definition of TCO registers
by Marek Maślanka (Code Review) 17 Jan '24

17 Jan '24

Attention is currently required from: Arthur Heymans, Christian Walter, Jeff Daly, Johnny Lin, Marek Maślanka, Sean Rhodes, Tim Chu, Vanessa Eusebio. Hello Arthur Heymans, Christian Walter, Jeff Daly, Johnny Lin, Sean Rhodes, Tim Chu, Vanessa Eusebio, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/80005?usp=email to look at the new patch set (#7). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: soc/intel: Unify the definition of TCO registers ...................................................................... soc/intel: Unify the definition of TCO registers Move the definition of the TCO registers used in most boards to a separate file and use it consistently. Only leaves those TCO register definitions that are incompatible. BUG=b:314260167 TEST=none Change-Id: Id64a635d106cea879ab08aa7beca101de14b1ee6 Signed-off-by: Marek Maslanka <mmaslanka(a)google.com> --- M src/soc/intel/apollolake/elog.c M src/soc/intel/apollolake/include/soc/smbus.h M src/soc/intel/common/block/smbus/tco.c M src/soc/intel/common/block/smm/smihandler.c M src/soc/intel/common/pch/include/intelpch/smbus.h A src/soc/intel/common/tco.h M src/soc/intel/denverton_ns/include/soc/pmc.h M src/soc/intel/denverton_ns/romstage.c M src/soc/intel/xeon_sp/include/soc/smbus.h M src/southbridge/intel/common/finalize.c M src/southbridge/intel/common/tco.h M src/southbridge/intel/common/watchdog.c 12 files changed, 65 insertions(+), 80 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/80005/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/80005?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Id64a635d106cea879ab08aa7beca101de14b1ee6 Gerrit-Change-Number: 80005 Gerrit-PatchSet: 7 Gerrit-Owner: Marek Maślanka <mmaslanka(a)google.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Jeff Daly <jeffd(a)silicom-usa.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Marek Maślanka <mmaslanka(a)google.com> Gerrit-Attention: Jeff Daly <jeffd(a)silicom-usa.com> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-MessageType: newpatchset

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[XS] Change in coreboot[main]: vc/amd/psp: Remove unknown section flags
by Martin Roth (Code Review) 17 Jan '24

17 Jan '24

Attention is currently required from: Arthur Heymans, Felix Held, Fred Reitberger, Jason Glenesk, Martin L Roth, Matt DeVillier, Zebreus. Martin Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79366?usp=email ) Change subject: vc/amd/psp: Remove unknown section flags ...................................................................... Patch Set 4: (1 comment) Patchset: PS2: > I tried compiling a google skyrim board with and without this patch. […] Sounds good to me. -- To view, visit https://review.coreboot.org/c/coreboot/+/79366?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie3735b72349b0cfdd27364a39bcdda390af7bfa5 Gerrit-Change-Number: 79366 Gerrit-PatchSet: 4 Gerrit-Owner: Zebreus <lennarteichhorn(a)googlemail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-CC: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Zebreus <lennarteichhorn(a)googlemail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 17 Jan 2024 15:23:36 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Martin L Roth <gaumless(a)gmail.com> Comment-In-Reply-To: Zebreus <lennarteichhorn(a)googlemail.com> Gerrit-MessageType: comment

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[M] Change in coreboot[main]: mb/intel/adlrvp: Add Realtek ALC256 audio verb table
by Subrata Banik (Code Review) 17 Jan '24

17 Jan '24

Attention is currently required from: Arthur Heymans, Karthik Ramasubramanian, Krishna P Bhat D, Nick Vaccaro, Paul Menzel, Poornima Tom, Vamshi Krishna Gopal, Vamshi Krishna Gopal. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79415?usp=email ) The change is no longer submittable: All-Comments-Resolved and Code-Review are unsatisfied now. Change subject: mb/intel/adlrvp: Add Realtek ALC256 audio verb table ...................................................................... Patch Set 7: -Code-Review (1 comment) Patchset: PS7: wondering if the ALC256 verb table is generic? if yes, then can we check that into vendorcode ? so other design can include it ? -- To view, visit https://review.coreboot.org/c/coreboot/+/79415?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I8215e445dae4760ad15f69860968013e88a77af0 Gerrit-Change-Number: 79415 Gerrit-PatchSet: 7 Gerrit-Owner: Poornima Tom <poornima.tom(a)intel.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Vamshi Krishna Gopal <vamshi.krishna.gopal(a)intel.com> Gerrit-Reviewer: Vamshi Krishna Gopal <vamshi.krishna.gopal(a)intel.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Poornima Tom <poornima.tom(a)intel.com> Gerrit-Attention: Vamshi Krishna Gopal <vamshi.krishna.gopal(a)intel.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Vamshi Krishna Gopal <vamshi.krishna.gopal(a)intel.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Wed, 17 Jan 2024 15:23:33 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[main]: mb/intel/adlrvp: Add Realtek ALC256 audio verb table
by Subrata Banik (Code Review) 17 Jan '24

17 Jan '24

Attention is currently required from: Arthur Heymans, Karthik Ramasubramanian, Krishna P Bhat D, Nick Vaccaro, Paul Menzel, Poornima Tom, Vamshi Krishna Gopal, Vamshi Krishna Gopal. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79415?usp=email ) Change subject: mb/intel/adlrvp: Add Realtek ALC256 audio verb table ...................................................................... Patch Set 7: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/79415?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I8215e445dae4760ad15f69860968013e88a77af0 Gerrit-Change-Number: 79415 Gerrit-PatchSet: 7 Gerrit-Owner: Poornima Tom <poornima.tom(a)intel.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Vamshi Krishna Gopal <vamshi.krishna.gopal(a)intel.com> Gerrit-Reviewer: Vamshi Krishna Gopal <vamshi.krishna.gopal(a)intel.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Poornima Tom <poornima.tom(a)intel.com> Gerrit-Attention: Vamshi Krishna Gopal <vamshi.krishna.gopal(a)intel.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Vamshi Krishna Gopal <vamshi.krishna.gopal(a)intel.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Wed, 17 Jan 2024 15:22:46 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: vc/amd/psp: Remove unknown section flags
by Martin Roth (Code Review) 17 Jan '24

17 Jan '24

Attention is currently required from: Arthur Heymans, Felix Held, Fred Reitberger, Jason Glenesk, Martin L Roth, Matt DeVillier, Zebreus. Martin Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79366?usp=email ) Change subject: vc/amd/psp: Remove unknown section flags ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/79366?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie3735b72349b0cfdd27364a39bcdda390af7bfa5 Gerrit-Change-Number: 79366 Gerrit-PatchSet: 4 Gerrit-Owner: Zebreus <lennarteichhorn(a)googlemail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-CC: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Zebreus <lennarteichhorn(a)googlemail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 17 Jan 2024 15:22:42 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[main]: mb/intel/adlrvp: Add Realtek ALC256 audio verb table
by Poornima Tom (Code Review) 17 Jan '24

17 Jan '24

Attention is currently required from: Arthur Heymans, Karthik Ramasubramanian, Krishna P Bhat D, Nick Vaccaro, Paul Menzel, Subrata Banik, Vamshi Krishna Gopal, Vamshi Krishna Gopal. Poornima Tom has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79415?usp=email ) Change subject: mb/intel/adlrvp: Add Realtek ALC256 audio verb table ...................................................................... Patch Set 7: (1 comment) Patchset: PS7: Please review -- To view, visit https://review.coreboot.org/c/coreboot/+/79415?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I8215e445dae4760ad15f69860968013e88a77af0 Gerrit-Change-Number: 79415 Gerrit-PatchSet: 7 Gerrit-Owner: Poornima Tom <poornima.tom(a)intel.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Vamshi Krishna Gopal <vamshi.krishna.gopal(a)intel.com> Gerrit-Reviewer: Vamshi Krishna Gopal <vamshi.krishna.gopal(a)intel.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Vamshi Krishna Gopal <vamshi.krishna.gopal(a)intel.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Vamshi Krishna Gopal <vamshi.krishna.gopal(a)intel.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Wed, 17 Jan 2024 14:46:58 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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