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Change subject: mb/google/dedede/var/cret: Generate new SPD ID for new memory parts
......................................................................
Set Ready For Review
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Change subject: mb/google/rex: enable d3hot for storage devices
......................................................................
Patch Set 3:
(1 comment)
Patchset:
PS2:
> Micron used in Rex and screebo - hence we need changes for both the variants.
d3hot or d3cold here? will this effect another SSD?
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Hello Jakub Czapiga, Kangheui Won, Kapil Porwal, Subrata Banik, Tarun Tuli, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/76835?usp=email
to look at the new patch set (#3).
Change subject: mb/google/rex: enable d3hot for storage devices
......................................................................
mb/google/rex: enable d3hot for storage devices
_DSD "StorageD3Enable" property is needed to set under the root port in
the DSDT or SSDT. The ACPI _DSD method is the preferred way to opt
D3hot support for storage devices.
This feature also bypass the low LTR requirenet from SSD that blocking S0i2.2 LTR soc requirement.
Name (_DSD, Package () {
        ToUUID("5025030F-842F-4AB4-A561-99A5189762D0"),
           Package () {
                Package (2) {"StorageD3Enable", 1},
// 1 - Enable; 0 - Disable
            }
        }
)
BUG=b:289028958
TEST=Check code compiles & boot rex, and verify the "StorageD3Enable"
SSDT entry.
Change-Id: I19decc2706954e73bc28fc2d9c3c4d18d2c384b7
Signed-off-by: Kangheui Won <khwon(a)chromium.org>
Signed-off-by: Sukumar Ghorai <sukumar.ghorai(a)intel.com>
---
M src/mainboard/google/rex/variants/rex0/overridetree.cb
1 file changed, 7 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/76835/3
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Change subject: mb/google/rex: enable d3hot for storage devices
......................................................................
Patch Set 2:
(2 comments)
Patchset:
PS2:
> nit: IMHO it'd better to state that this is a W/A for storage devices in rex.
Acknowledged
PS2:
> Looks like redundant CL of CB:76831
Micron used in Rex and screebo - hence we need changes for both the variants.
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Change subject: mb/google/nissa/var/craaskov: Configure GPIOs according to schematics
......................................................................
Patch Set 11: Code-Review+1
(1 comment)
File src/mainboard/google/brya/variants/craaskov/gpio.c:
https://review.coreboot.org/c/coreboot/+/76636/comment/044776ee_91d8f9e5 :
PS11, Line 68: static const struct pad_config romstage_gpio_table[] = {
you can remove it if empty.
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Change subject: mb/google/nissa/var/craaskov: Add wifi sar table
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Patch Set 11: Code-Review+2
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Change subject: mb/google/nissa/var/craaskov: Add wifi sar table
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Patch Set 11: Code-Review+2
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