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Change subject: mb/google/nissa/var/joxer: support DPTF oem_variables
......................................................................
Patch Set 3:
(1 comment)
File src/mainboard/google/brya/variants/joxer/ramstage.c:
https://review.coreboot.org/c/coreboot/+/76773/comment/4f96724b_932cc4b9 :
PS3, Line 20: static void update_oem_variables(void)
why don't you just put this in variant.c? IMHO, no need for extra file.
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Change subject: mb/google/nissa/var/joxer: support DPTF oem_variables
......................................................................
Patch Set 3: Code-Review+2
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Change subject: mb/google/nissa/var/joxer: support DPTF oem_variables
......................................................................
Patch Set 3:
(1 comment)
File src/mainboard/google/brya/variants/joxer/ramstage.c:
https://review.coreboot.org/c/coreboot/+/76773/comment/6afee221_c365511c :
PS2, Line 31: config->oem_data.oem_variables[0] = 1;
> this will have variables[1] = 1 since you set in device tree..
updated.
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Change subject: mb/google/nissa/var/joxer: support DPTF oem_variables
......................................................................
Patch Set 3:
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Sridhar Siricilla has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/76878?usp=email )
Change subject: arch/x86: Adjust stack pointer to point to dummy argument
......................................................................
arch/x86: Adjust stack pointer to point to dummy argument
The patch pushes dummy argument so that stack pointer points to this
dummy element instead of coreboot table address as depthcharge picks the
second element from top of the stack as coreboot table address.
The change is applicable when system switches from long mode to
protected mode before passing the control to depthcharge.
TEST=Tested in simics environment.64bit coreboot could boot
to OS.
Signed-off-by: Sridhar Siricilla <sridhar.siricilla(a)intel.com>
Change-Id: I6e4034f65f5db23560f774f56e0edfb08e4283ad
---
M src/arch/x86/c_exit.S
1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/78/76878/1
diff --git a/src/arch/x86/c_exit.S b/src/arch/x86/c_exit.S
index 069a66c..869be3f 100644
--- a/src/arch/x86/c_exit.S
+++ b/src/arch/x86/c_exit.S
@@ -31,6 +31,6 @@
andl $0xFFFFFFF0, %esp
subl $12, %esp
pushl %ebx /* Argument 0 */
-
+ pushl $0 /* Dummy argument */
jmp *%eax
#endif
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Stanley Wu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/76877?usp=email )
Change subject: mb/google/dedede/var/boxy: Update power limits
......................................................................
mb/google/dedede/var/boxy: Update power limits
Add ramstage.c in Makefile.inc and update boxy power limits in
Boxy ramstage.c.
BUG=b:290293153
TEST=emerge-dedede coreboot and check psys and PLx value on boxy
Change-Id: I4257dab358f066ebd13b6f251e8a5258a72fbd39
Signed-off-by: Stanley Wu <stanley1.wu(a)lcfc.corp-partner.google.com>
---
M src/mainboard/google/dedede/variants/boxy/Makefile.inc
A src/mainboard/google/dedede/variants/boxy/ramstage.c
2 files changed, 36 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/76877/1
diff --git a/src/mainboard/google/dedede/variants/boxy/Makefile.inc b/src/mainboard/google/dedede/variants/boxy/Makefile.inc
index eb2c9bc..66f0263 100644
--- a/src/mainboard/google/dedede/variants/boxy/Makefile.inc
+++ b/src/mainboard/google/dedede/variants/boxy/Makefile.inc
@@ -1,3 +1,4 @@
## SPDX-License-Identifier: GPL-2.0-or-later
ramstage-y += gpio.c
+ramstage-y += ramstage.c
diff --git a/src/mainboard/google/dedede/variants/boxy/ramstage.c b/src/mainboard/google/dedede/variants/boxy/ramstage.c
new file mode 100644
index 0000000..64510cc
--- /dev/null
+++ b/src/mainboard/google/dedede/variants/boxy/ramstage.c
@@ -0,0 +1,35 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#include <baseboard/variants.h>
+
+/*
+ * Psys_pmax considerations
+ *
+ * Given the hardware design in dibbi, the serial shunt resistor is 0.01ohm.
+ * The full scale of hardware PSYS signal 1.6v maps to system current 6.009A
+ * instead of real system power. The equation is shown below:
+ * PSYS = 1.6v ~= (0.01ohm x 6.009A) x 50 (INA213, gain 50V/V) x R631/(R631 + R638)
+ * R631/(R631 + R638) = 0.5325 = 36K / (36K + 31.6K)
+ *
+ * The Psys_pmax is a SW setting which tells IMVP9.1 the mapping between system input
+ * current and the actual system power. Since there is no voltage information
+ * from PSYS, different voltage input would map to different Psys_pmax settings:
+ * For Type-C 15V, the Psys_pmax should be 15v x 6.009A = 90.135W
+ * For Type-C 20V, the Psys_pmax should be 20v x 6.009A = 120.18W
+ * For a barrel jack, the Psys_pmax should be 19v x 6.009A = 114.171W
+ *
+ * Imagine that there is a type-c 100W (20V/5A) connected to DUT w/ full loading,
+ * and the Psys_pmax setting is 120W. Then IMVP9.1 can calculate the current system
+ * power = 120W * 5A / 6.009A = 100W, which is the actual system power.
+ */
+const struct psys_config psys_config = {
+ .efficiency = 97,
+ .psys_imax_ma = 6009,
+ .bj_volts_mv = 19000,
+ .bj_power_w = 65,
+};
+
+void variant_devtree_update(void)
+{
+ variant_update_psys_power_limits(&psys_config);
+}
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